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/linux/arch/powerpc/platforms/powernv/
H A Dvas-debug.c32 struct pnv_vas_window *window = s->private; in info_show() local
36 /* ensure window is not unmapped */ in info_show()
37 if (!window->hvwc_map) in info_show()
40 seq_printf(s, "Type: %s, %s\n", cop_to_str(window->vas_win.cop), in info_show()
41 window->tx_win ? "Send" : "Receive"); in info_show()
42 seq_printf(s, "Pid : %d\n", vas_window_pid(&window->vas_win)); in info_show()
59 struct pnv_vas_window *window = s->private; in hvwc_show() local
63 /* ensure window is not unmapped */ in hvwc_show()
64 if (!window->hvwc_map) in hvwc_show()
67 print_reg(s, window, VREG(LPID)); in hvwc_show()
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H A Dvas-window.c27 * Compute the paste address region for the window @window using the
30 void vas_win_paste_addr(struct pnv_vas_window *window, u64 *addr, int *len) in vas_win_paste_addr() argument
35 base = window->vinst->paste_base_addr; in vas_win_paste_addr()
36 shift = window->vinst->paste_win_id_shift; in vas_win_paste_addr()
37 winid = window->vas_win.winid; in vas_win_paste_addr()
46 static inline void get_hvwc_mmio_bar(struct pnv_vas_window *window, in get_hvwc_mmio_bar() argument
51 pbaddr = window->vinst->hvwc_bar_start; in get_hvwc_mmio_bar()
52 *start = pbaddr + window->vas_win.winid * VAS_HVWC_SIZE; in get_hvwc_mmio_bar()
56 static inline void get_uwc_mmio_bar(struct pnv_vas_window *window, in get_uwc_mmio_bar() argument
61 pbaddr = window->vinst->uwc_bar_start; in get_uwc_mmio_bar()
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H A Dvas.h31 * Senders and receivers must each connect to a separate window before they
34 * Each window is described by two types of window contexts:
36 * Hypervisor Window Context (HVWC) of size VAS_HVWC_SIZE bytes
38 * OS/User Window Context (UWC) of size VAS_UWC_SIZE bytes.
40 * A window context can be viewed as a set of 64-bit registers. The settings
42 * hardware when messages are sent/received through the window. The registers
45 * the window.
61 * space (hvwc_map and uwc_map). The kernel can then access the window
62 * contexts of a specific window using:
67 * where winid is the window index (0..64K).
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H A Dvas-fault.c21 * The maximum FIFO size for fault window can be 8MB
23 * instance will be having fault window.
51 * It takes credit on fault window, updates nx_fault_stamp in CRB with
54 * pswid - window ID of the window on which the request is sent.
61 * available on fault window. Otherwise, returns with RMA_reject.
63 * Total credits available on fault window: FIFO_SIZE(4MB)/CRBS_SIZE(128)
71 struct pnv_vas_window *window; in vas_fault_thread_fn() local
84 * pswid NX assigns window ID. Set pswid to -1 after in vas_fault_thread_fn()
123 * Return credit for the fault window. in vas_fault_thread_fn()
132 window = vas_pswid_to_window(vinst, in vas_fault_thread_fn()
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/linux/drivers/mtd/maps/
H A Dichxrom.c57 static void ichxrom_cleanup(struct ichxrom_window *window) in ichxrom_cleanup() argument
63 /* Disable writes through the rom window */ in ichxrom_cleanup()
64 ret = pci_read_config_word(window->pdev, BIOS_CNTL, &word); in ichxrom_cleanup()
66 pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1); in ichxrom_cleanup()
67 pci_dev_put(window->pdev); in ichxrom_cleanup()
70 list_for_each_entry_safe(map, scratch, &window->maps, list) { in ichxrom_cleanup()
78 if (window->rsrc.parent) in ichxrom_cleanup()
79 release_resource(&window->rsrc); in ichxrom_cleanup()
80 if (window->virt) { in ichxrom_cleanup()
81 iounmap(window->virt); in ichxrom_cleanup()
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H A Damd76xrom.c48 /* The 2 bits controlling the window size are often set to allow reading
56 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
57 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
58 * 64KiB window.
63 MODULE_PARM_DESC(win_size_bits, "ROM window size bits override for 0x43 byte, normally set by BIOS.…
69 static void amd76xrom_cleanup(struct amd76xrom_window *window) in amd76xrom_cleanup() argument
74 if (window->pdev) { in amd76xrom_cleanup()
75 /* Disable writes through the rom window */ in amd76xrom_cleanup()
76 pci_read_config_byte(window->pdev, 0x40, &byte); in amd76xrom_cleanup()
77 pci_write_config_byte(window->pdev, 0x40, byte & ~1); in amd76xrom_cleanup()
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H A Dck804xrom.c54 * The 2 bits controlling the window size are often set to allow reading
62 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
63 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
64 * 64KiB window.
67 * The 15 bits controlling the window size are distributed as follows:
71 * If all bits are enabled, we have a 16? MiB window
76 MODULE_PARM_DESC(win_size_bits, "ROM window size bits override, normally set by BIOS.");
82 static void ck804xrom_cleanup(struct ck804xrom_window *window) in ck804xrom_cleanup() argument
87 if (window->pdev) { in ck804xrom_cleanup()
88 /* Disable writes through the rom window */ in ck804xrom_cleanup()
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H A Desb2rom.c118 static void esb2rom_cleanup(struct esb2rom_window *window) in esb2rom_cleanup() argument
123 /* Disable writes through the rom window */ in esb2rom_cleanup()
124 pci_read_config_byte(window->pdev, BIOS_CNTL, &byte); in esb2rom_cleanup()
125 pci_write_config_byte(window->pdev, BIOS_CNTL, in esb2rom_cleanup()
129 list_for_each_entry_safe(map, scratch, &window->maps, list) { in esb2rom_cleanup()
137 if (window->rsrc.parent) in esb2rom_cleanup()
138 release_resource(&window->rsrc); in esb2rom_cleanup()
139 if (window->virt) { in esb2rom_cleanup()
140 iounmap(window->virt); in esb2rom_cleanup()
141 window->virt = NULL; in esb2rom_cleanup()
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/linux/arch/sparc/kernel/
H A Dwuf.S3 * wuf.S: Window underflow trap handler for the Sparc.
53 * 1 2 3 4 <-- Window number
57 * O == the window that execution was in when
61 * window
63 * W == this window is the one which is now invalid
67 * I == this window will be the invalid one when we
73 /* On 7-window Sparc the boot code patches fnwin_patch1
83 /* LOCATION: Window 'T' */
86 * the proper window off of the stack.
93 wr %twin_tmp1, 0x0, %wim /* Make window 'I' invalid */
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H A Dwof.S3 * wof.S: Sparc window overflow handler.
29 * accessed when in the 'trap' window, 'G' means
30 * accessible in any window. Do not change these registers
43 #define twin_tmp l4 /* Temp reg, only usable in trap window T */
49 /* On a 7-window Sparc the boot code patches spnwin_*
74 /* LOCATION: Trap Window */
80 * window properly in this trap handler.
105 /* Save into the window which must be saved and do it.
110 save %g0, %g0, %g0 ! save into the window to stash away
114 /* LOCATION: Window to be saved */
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H A Detrap_32.S3 * etrap.S: Sparc trap window preparation for entry into the
33 /* SEVEN WINDOW PATCH INSTRUCTIONS */
54 * to call c-code and the trap cannot be handled in-window)
62 /* 2 3 4 window number
66 * O == Current window before trap
67 * T == Window entered when trap occurred
68 * S == Window we will need to save if (1<<T) == %wim
79 /* Calculate mask of trap window. See if from user
93 /* See if we are in the trap window. */
95 bne trap_setup_kernel_spill ! in trap window, clean up
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H A Dwindows.c2 /* windows.c: Routines to deal with register window management
54 * we still copy the window there, the only case that we don't
64 int window; in synchronize_user_stack() local
71 for(window = tp->w_saved - 1; window >= 0; window--) { in synchronize_user_stack()
72 unsigned long sp = tp->rwbuf_stkptrs[window]; in synchronize_user_stack()
75 if (copy_to_user((char __user *) sp, &tp->reg_window[window], in synchronize_user_stack()
79 shift_window_buffer(window, tp->w_saved - 1, tp); in synchronize_user_stack()
109 /* Try to push the windows in a threads window buffer to the
116 int window; in try_to_clear_window_buffer() local
119 for(window = 0; window < tp->w_saved; window++) { in try_to_clear_window_buffer()
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/linux/arch/powerpc/include/asm/
H A Dvas.h33 * VAS window Linux status bits
37 /* Window is closed in the hypervisor due to lost credit */
39 /* Window is closed due to migration */
66 * Stores pid, mm, and tgid for each window.
78 * Common VAS window struct on PowerNV and PowerVM
82 u32 wcreds_max; /* Window credits */
83 u32 status; /* Window status used in OS */
91 * User space window operations used for powernv and powerVM
119 * if process / thread has any open VAS window (Use in vas_user_win_add_mm_context()
126 * Receive window attributes specified by the (in-kernel) owner of window.
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/linux/lib/zstd/compress/
H A Dzstd_compress_internal.h203 ZSTD_window_t window; /* State for window round buffer management */ member
222 …U32 forceNonContiguous; /* Non-zero if we should force non-contiguous load for the next window upd…
254 ZSTD_window_t window; /* State for the window round buffer management */ member
268 U32 windowLog; /* Window log for the LDM */
863 * over a window of length bytes.
896 * Clears the window containing the history by simply setting it to empty.
898 MEM_STATIC void ZSTD_window_clear(ZSTD_window_t* window) in ZSTD_window_clear() argument
900 size_t const endT = (size_t)(window->nextSrc - window->base); in ZSTD_window_clear()
903 window->lowLimit = end; in ZSTD_window_clear()
904 window->dictLimit = end; in ZSTD_window_clear()
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/linux/Documentation/arch/powerpc/
H A Dpci_iov_resource_on_powernv.rst59 Each window can be configured to be remapped via a "TCE table" (IOMMU
76 window and sixteen M64 windows. They have different characteristics.
81 - The M32 window:
87 32-bit PCIe accesses. We configure that window at boot from FW and
97 to be assigned to PEs on a segment granularity. For a 2GB window,
100 Now, this is the "main" window we use in Linux today (excluding
119 specify the PE# for the entire window. When segmented, a window
124 there's a defined ordering for which window applies.
129 We configure an M64 window to cover the entire region of address space
188 - M32 window: There's one M32 window, and it is split into 256
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/linux/drivers/pci/
H A Dhost-bridge.c55 struct resource_entry *window; in pcibios_resource_to_bus() local
58 resource_list_for_each_entry(window, &bridge->windows) { in pcibios_resource_to_bus()
59 if (resource_contains(window->res, res)) { in pcibios_resource_to_bus()
60 offset = window->offset; in pcibios_resource_to_bus()
80 struct resource_entry *window; in pcibios_bus_to_resource() local
83 resource_list_for_each_entry(window, &bridge->windows) { in pcibios_bus_to_resource()
86 if (resource_type(res) != resource_type(window->res)) in pcibios_bus_to_resource()
89 bus_region.start = window->res->start - window->offset; in pcibios_bus_to_resource()
90 bus_region.end = window->res->end - window->offset; in pcibios_bus_to_resource()
93 offset = window->offset; in pcibios_bus_to_resource()
/linux/arch/powerpc/platforms/pseries/
H A Dvas.c26 /* The hypervisor allows one credit per window right now */
71 * Allocate VAS window hcall
106 * Deallocate VAS window hcall.
127 * Modify VAS window.
128 * After the window is opened with allocate window hcall, configure it
210 * When the fault interrupt is received for each window, query the
242 * during this window, the hypervisor will not deliver this
260 * Allocate window and setup IRQ mapping.
272 * interrupt per window. So the IRQ setup and fault handling in allocate_setup_window()
273 * will be done for each open window separately. in allocate_setup_window()
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/linux/arch/powerpc/platforms/book3s/
H A Dvas-api.c31 * close(fd) or exit process to close window.
69 * Window opened by a child thread may not be closed when in get_vas_user_win_ref()
71 * when the window is free by parent thread. in get_vas_user_win_ref()
91 * Process closes window during exit. In the case of in get_vas_user_win_ref()
93 * window and can exit without closing it. So takes tgid in get_vas_user_win_ref()
94 * reference until window closed to make sure tgid is not in get_vas_user_win_ref()
118 * Parent thread (tgid) will be closing window when it in ref_get_pid_and_task()
182 * Process closes send window after all pending NX requests are in vas_update_csb()
184 * open a window and can exit without closing it. May be some in vas_update_csb()
185 * requests are pending or this window can be used by other in vas_update_csb()
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/linux/fs/ext2/
H A Dballoc.c184 * The reservation window structure operations
221 printk("reservation window 0x%p " in __rsv_window_dump()
244 printk("Window map complete.\n"); in __rsv_window_dump()
255 * @rsv: inode's reservation window
261 * own block reservation window range.
263 * If the reservation window is outside the goal allocation group, return 0;
266 * If the goal block is within the reservation window, return 1;
292 * Find the reserved window which includes the goal, or the previous one
293 * if the goal is not in any window.
329 * ext2_rsv_window_add() -- Insert a window to the block reservation rb tree.
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/linux/Documentation/devicetree/bindings/bus/
H A Dmvebu-mbus.txt20 the second cell for the address offset within the window.
30 within the internal register window (see below).
52 the first one controls the devices decoding window,
53 the second one controls the SDRAM decoding window and
80 ** MBus address decoding window specification
83 the window ID and the second one for the offset within the window.
84 In order to allow to describe valid and non-valid window entries, the
91 S = 0x0 for a MBus valid window
92 S = 0xf for a non-valid window (see below)
96 I = 4-bit window target ID
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/linux/drivers/video/fbdev/
H A Dau1200fb.c136 struct au1200_lcd_window_regs_t window; member
173 /* Default window configuration entry to use (see windows[]) */
210 * Default window configurations
710 winctrl0 = lcd->window[plane].winctrl0; in au1200_setlocation()
711 winctrl1 = lcd->window[plane].winctrl1; in au1200_setlocation()
733 fb_offset += (((0 - xpos) * winbpp(lcd->window[plane].winctrl1))/8); in au1200_setlocation()
757 /* Disable the window while making changes, then restore WINEN */ in au1200_setlocation()
761 lcd->window[plane].winctrl0 = winctrl0; in au1200_setlocation()
762 lcd->window[plane].winctrl1 = winctrl1; in au1200_setlocation()
763 lcd->window[plane].winbuf0 = in au1200_setlocation()
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/linux/arch/powerpc/sysdev/
H A Dfsl_pci.h38 /* PCI/PCI Express outbound window reg */
42 __be32 powbar; /* 0x.8 - Outbound window base address register */
44 __be32 powar; /* 0x.10 - Outbound window attributes register */
48 /* PCI/PCI Express inbound window reg */
52 __be32 piwbar; /* 0x.8 - Inbound window base address register */
53 __be32 piwbear; /* 0x.c - Inbound window base extended address register */
54 __be32 piwar; /* 0x.10 - Inbound window attributes register */
76 /* PCI/PCI Express outbound window 0-4
77 * Window 0 is the default window and is the only window enabled upon reset.
85 /* PCI/PCI Express inbound window 3-0
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/linux/arch/m68k/include/asm/
H A Dm54xxpci.h37 #define PCIIW0BTAR (CONFIG_MBAR + 0xb70) /* Initiator window 0 */
38 #define PCIIW1BTAR (CONFIG_MBAR + 0xb74) /* Initiator window 1 */
39 #define PCIIW2BTAR (CONFIG_MBAR + 0xb78) /* Initiator window 2 */
40 #define PCIIWCR (CONFIG_MBAR + 0xb80) /* Initiator window config */
104 #define PCIIWCR_W0_MEM 0x00000000 /* Window 0 is memory */
105 #define PCIIWCR_W0_IO 0x08000000 /* Window 0 is IO */
106 #define PCIIWCR_W0_MRD 0x00000000 /* Window 0 memory read */
107 #define PCIIWCR_W0_MRDL 0x02000000 /* Window 0 memory read line */
108 #define PCIIWCR_W0_MRDM 0x04000000 /* Window 0 memory read mult */
109 #define PCIIWCR_W0_E 0x01000000 /* Window 0 enable */
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/linux/net/ipv4/
H A Dtcp_cdg.c12 * Parameters window, backoff_beta, and backoff_factor are crucial for
16 * Except for window, knobs are configured via /sys/module/tcp_cdg/parameters/.
17 * Parameter window is only configurable when loading tcp_cdg as a module.
21 * o Add toggle for shadow window mechanism. Suggested by David Hayes.
24 * conversion is given by: backoff_factor = 1000/(G * window).
25 * o Limit shadow window to 2 * cwnd, or to cwnd when application limited.
38 static int window __read_mostly = 8;
46 module_param(window, int, 0444);
47 MODULE_PARM_DESC(window, "gradient window size (power of two <= 256)");
58 MODULE_PARM_DESC(use_shadow, "use shadow window heuristic");
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/linux/Documentation/driver-api/
H A Dntb.rst40 mainly used to perform the proper memory window initialization. Typically
41 there are two types of memory window interfaces supported by the NTB API:
55 So typical scenario of the first type memory window initialization looks:
58 maps corresponding outbound memory window so to have access to the shared
76 outbound memory window so to have access to the shared memory region.
82 1) Allocate memory for a shared window
83 2) Initialize memory window by translated address of the allocated region
84 (it may fail if local memory window initialization is unsupported)
85 3) Send the translated address and memory window index to a peer device
88 1) Initialize memory window with retrieved address of the allocated
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