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/linux/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/
H A Dmmu.json9 "PublicDescription": "Data TLB translation cache hit on S1L2 walk cache entry",
12 "BriefDescription": "Data TLB translation cache hit on S1L2 walk cache entry"
15 "PublicDescription": "Data TLB translation cache hit on S1L1 walk cache entry",
18 "BriefDescription": "Data TLB translation cache hit on S1L1 walk cache entry"
21 "PublicDescription": "Data TLB translation cache hit on S1L0 walk cache entry",
24 "BriefDescription": "Data TLB translation cache hit on S1L0 walk cache entry"
27 "PublicDescription": "Data TLB translation cache hit on S2L2 walk cache entry",
30 "BriefDescription": "Data TLB translation cache hit on S2L2 walk cache entry"
33 "PublicDescrition": "Data TLB translation cache hit on S2L1 walk cache entry",
36 "BriefDescription": "Data TLB translation cache hit on S2L1 walk cache entry"
[all …]
/linux/include/crypto/
H A Dscatterwalk.h29 static inline void scatterwalk_start(struct scatter_walk *walk, in scatterwalk_start() argument
32 walk->sg = sg; in scatterwalk_start()
33 walk->offset = sg->offset; in scatterwalk_start()
37 * This is equivalent to scatterwalk_start(walk, sg) followed by
38 * scatterwalk_skip(walk, pos).
40 static inline void scatterwalk_start_at_pos(struct scatter_walk *walk, in scatterwalk_start_at_pos() argument
48 walk->sg = sg; in scatterwalk_start_at_pos()
49 walk->offset = sg->offset + pos; in scatterwalk_start_at_pos()
52 static inline unsigned int scatterwalk_clamp(struct scatter_walk *walk, in scatterwalk_clamp() argument
58 if (walk->offset >= walk->sg->offset + walk->sg->length) in scatterwalk_clamp()
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/linux/mm/
H A Dpagewalk.c30 unsigned long end, struct mm_walk *walk) in walk_pte_range_inner() argument
32 const struct mm_walk_ops *ops = walk->ops; in walk_pte_range_inner()
40 walk); in walk_pte_range_inner()
44 set_pte_at(walk->mm, addr, pte, new_pte); in walk_pte_range_inner()
46 if (!WARN_ON_ONCE(walk->no_vma)) in walk_pte_range_inner()
47 update_mmu_cache(walk->vma, addr, pte); in walk_pte_range_inner()
49 err = ops->pte_entry(pte, addr, addr + PAGE_SIZE, walk); in walk_pte_range_inner()
62 struct mm_walk *walk) in walk_pte_range() argument
68 if (walk->no_vma) { in walk_pte_range()
73 * and CONFIG_EFI_PGT_DUMP efi_mm goes so far as to walk them. in walk_pte_range()
[all …]
H A Dmapping_dirty_helpers.c11 * struct wp_walk - Private struct for pagetable walk callbacks
29 * @walk: pagetable walk callback argument
35 struct mm_walk *walk) in wp_pte() argument
37 struct wp_walk *wpwalk = walk->private; in wp_pte()
41 pte_t old_pte = ptep_modify_prot_start(walk->vma, addr, pte); in wp_pte()
44 ptep_modify_prot_commit(walk->vma, addr, pte, old_pte, ptent); in wp_pte()
81 * @walk: pagetable walk callback argument
90 unsigned long end, struct mm_walk *walk) in clean_record_pte() argument
92 struct wp_walk *wpwalk = walk->private; in clean_record_pte()
97 pgoff_t pgoff = ((addr - walk->vma->vm_start) >> PAGE_SHIFT) + in clean_record_pte()
[all …]
/linux/arch/arm64/crypto/
H A Daes-neonbs-glue.c92 struct skcipher_walk walk; in __ecb_crypt() local
95 err = skcipher_walk_virt(&walk, req, false); in __ecb_crypt()
97 while (walk.nbytes >= AES_BLOCK_SIZE) { in __ecb_crypt()
98 unsigned int blocks = walk.nbytes / AES_BLOCK_SIZE; in __ecb_crypt()
100 if (walk.nbytes < walk.total) in __ecb_crypt()
102 walk.stride / AES_BLOCK_SIZE); in __ecb_crypt()
105 fn(walk.dst.virt.addr, walk.src.virt.addr, ctx->rk, in __ecb_crypt()
107 err = skcipher_walk_done(&walk, in __ecb_crypt()
108 walk.nbytes - blocks * AES_BLOCK_SIZE); in __ecb_crypt()
154 struct skcipher_walk walk; in cbc_encrypt() local
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H A Dsm4-neon-glue.c38 struct skcipher_walk walk; in sm4_ecb_do_crypt() local
42 err = skcipher_walk_virt(&walk, req, false); in sm4_ecb_do_crypt()
44 while ((nbytes = walk.nbytes) > 0) { in sm4_ecb_do_crypt()
45 const u8 *src = walk.src.virt.addr; in sm4_ecb_do_crypt()
46 u8 *dst = walk.dst.virt.addr; in sm4_ecb_do_crypt()
55 err = skcipher_walk_done(&walk, nbytes % SM4_BLOCK_SIZE); in sm4_ecb_do_crypt()
81 struct skcipher_walk walk; in sm4_cbc_encrypt() local
85 err = skcipher_walk_virt(&walk, req, false); in sm4_cbc_encrypt()
87 while ((nbytes = walk.nbytes) > 0) { in sm4_cbc_encrypt()
88 const u8 *iv = walk.iv; in sm4_cbc_encrypt()
[all …]
H A Dsm4-ce-glue.c108 struct skcipher_walk walk; in sm4_ecb_do_crypt() local
112 err = skcipher_walk_virt(&walk, req, false); in sm4_ecb_do_crypt()
114 while ((nbytes = walk.nbytes) > 0) { in sm4_ecb_do_crypt()
115 const u8 *src = walk.src.virt.addr; in sm4_ecb_do_crypt()
116 u8 *dst = walk.dst.virt.addr; in sm4_ecb_do_crypt()
127 err = skcipher_walk_done(&walk, nbytes); in sm4_ecb_do_crypt()
152 struct skcipher_walk walk; in sm4_cbc_crypt() local
156 err = skcipher_walk_virt(&walk, req, false); in sm4_cbc_crypt()
160 while ((nbytes = walk.nbytes) > 0) { in sm4_cbc_crypt()
161 const u8 *src = walk.src.virt.addr; in sm4_cbc_crypt()
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H A Dsm4-ce-gcm-glue.c77 struct scatter_walk walk; in gcm_calculate_auth_mac() local
80 scatterwalk_start(&walk, req->src); in gcm_calculate_auth_mac()
86 orig_n = scatterwalk_next(&walk, assoclen); in gcm_calculate_auth_mac()
87 p = walk.addr; in gcm_calculate_auth_mac()
119 scatterwalk_done_src(&walk, orig_n); in gcm_calculate_auth_mac()
130 static int gcm_crypt(struct aead_request *req, struct skcipher_walk *walk, in gcm_crypt() argument
145 lengths.b = cpu_to_be64(walk->total * 8); in gcm_crypt()
155 unsigned int tail = walk->nbytes % SM4_BLOCK_SIZE; in gcm_crypt()
156 const u8 *src = walk->src.virt.addr; in gcm_crypt()
157 u8 *dst = walk->dst.virt.addr; in gcm_crypt()
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H A Dsm4-ce-ccm-glue.c96 struct scatter_walk walk; in ccm_calculate_auth_mac() local
111 scatterwalk_start(&walk, req->src); in ccm_calculate_auth_mac()
117 orig_n = scatterwalk_next(&walk, assoclen); in ccm_calculate_auth_mac()
118 p = walk.addr; in ccm_calculate_auth_mac()
151 scatterwalk_done_src(&walk, orig_n); in ccm_calculate_auth_mac()
156 static int ccm_crypt(struct aead_request *req, struct skcipher_walk *walk, in ccm_crypt() argument
166 memcpy(ctr0, walk->iv, SM4_BLOCK_SIZE); in ccm_crypt()
167 crypto_inc(walk->iv, SM4_BLOCK_SIZE); in ccm_crypt()
173 while (walk->nbytes) { in ccm_crypt()
174 unsigned int tail = walk->nbytes % SM4_BLOCK_SIZE; in ccm_crypt()
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/linux/drivers/gpu/drm/xe/
H A Dxe_pt_walk.c9 * The utilities in this file are similar to the CPU page-table walk
28 const struct xe_pt_walk *walk) in xe_pt_addr_end() argument
30 u64 size = 1ull << walk->shifts[level]; in xe_pt_addr_end()
37 unsigned int level, const struct xe_pt_walk *walk) in xe_pt_next() argument
41 /* Shared pt walk skips to the last pagetable */ in xe_pt_next()
42 if (unlikely(walk->shared_pt_mode)) { in xe_pt_next()
43 unsigned int shift = walk->shifts[level]; in xe_pt_next()
59 * xe_pt_walk_range() - Walk a range of a gpu page table tree with callbacks
61 * @parent: The root page table for walk start.
65 * @walk: Walk info.
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H A Dxe_pt_walk.h25 * struct xe_pt_walk - Embeddable struct for walk parameters
28 /** @ops: The walk ops used for the pagewalk */
34 * changed during the walk.
46 /** @staging: Walk staging PT structure */
51 * typedef xe_pt_entry_fn - gpu page-table-walk callback-function
60 * @action: The walk action to take upon return. See <linux/pagewalk.h>.
61 * @walk: The walk parameters.
67 struct xe_pt_walk *walk);
70 * struct xe_pt_walk_ops - Walk callbacks.
88 u64 addr, u64 end, struct xe_pt_walk *walk);
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/linux/tools/perf/pmu-events/arch/x86/skylake/
H A Dvirtual-memory.json7 … data loads that caused a page walk of any page size (4K/2M/4M/1G). This implies it missed in all …
21 …cription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page walk durati…
26 …n": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a load.",
31 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
35 …s. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or wit…
40 "BriefDescription": "Page walk completed due to a demand data load to a 1G page",
44 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
49 "BriefDescription": "Page walk completed due to a demand data load to a 2M/4M page",
53 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
58 "BriefDescription": "Page walk completed due to a demand data load to a 4K page",
[all …]
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A Dvirtual-memory.json7 … data loads that caused a page walk of any page size (4K/2M/4M/1G). This implies it missed in all …
21 …cription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page walk durati…
26 …n": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a load.",
31 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
35 …s. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or wit…
40 "BriefDescription": "Page walk completed due to a demand data load to a 1G page",
44 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
49 "BriefDescription": "Page walk completed due to a demand data load to a 2M/4M page",
53 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
58 "BriefDescription": "Page walk completed due to a demand data load to a 4K page",
[all …]
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A Dvirtual-memory.json7 … data loads that caused a page walk of any page size (4K/2M/4M/1G). This implies it missed in all …
21 …cription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page walk durati…
26 …n": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a load.",
31 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
35 …s. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or wit…
40 "BriefDescription": "Page walk completed due to a demand data load to a 1G page",
44 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
49 "BriefDescription": "Page walk completed due to a demand data load to a 2M/4M page",
53 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
58 "BriefDescription": "Page walk completed due to a demand data load to a 4K page",
[all …]
/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a73/
H A Dmmu.json3 "PublicDescription": "Duration of a translation table walk handled by the MMU",
6 "BriefDescription": "Duration of a translation table walk handled by the MMU"
9 "PublicDescription": "Duration of a Stage 1 translation table walk handled by the MMU",
12 "BriefDescription": "Duration of a Stage 1 translation table walk handled by the MMU"
15 "PublicDescription": "Duration of a Stage 2 translation table walk handled by the MMU",
18 "BriefDescription": "Duration of a Stage 2 translation table walk handled by the MMU"
21 "PublicDescription": "Duration of a translation table walk requested by the LSU",
24 "BriefDescription": "Duration of a translation table walk requested by the LSU"
27 … "PublicDescription": "Duration of a translation table walk requested by the Instruction Side",
30 "BriefDescription": "Duration of a translation table walk requested by the Instruction Side"
[all …]
/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a75/
H A Dmmu.json3 "PublicDescription": "Duration of a translation table walk handled by the MMU",
6 "BriefDescription": "Duration of a translation table walk handled by the MMU"
9 …"PublicDescription": "Duration of a Stage 1 translation table walk handled by the MMU. This event …
12 …"BriefDescription": "Duration of a Stage 1 translation table walk handled by the MMU. This event i…
15 …"PublicDescription": "Duration of a Stage 2 translation table walk handled by the MMU. This event …
18 …"BriefDescription": "Duration of a Stage 2 translation table walk handled by the MMU. This event i…
21 "PublicDescription": "Duration of a translation table walk requested by the LSU",
24 "BriefDescription": "Duration of a translation table walk requested by the LSU"
27 … "PublicDescription": "Duration of a translation table walk requested by the instruction side",
30 "BriefDescription": "Duration of a translation table walk requested by the instruction side"
[all …]
/linux/crypto/
H A Dzstd.c104 struct acomp_walk walk; in zstd_compress() local
114 ret = acomp_walk_virt(&walk, req, true); in zstd_compress()
125 dcur = acomp_walk_next_dst(&walk); in zstd_compress()
132 outbuf.dst = (u8 *)walk.dst.virt.addr; in zstd_compress()
136 scur = acomp_walk_next_src(&walk); in zstd_compress()
138 ret = zstd_compress_one(req, ctx, walk.src.virt.addr, in zstd_compress()
139 walk.dst.virt.addr, &total_out); in zstd_compress()
140 acomp_walk_done_src(&walk, scur); in zstd_compress()
141 acomp_walk_done_dst(&walk, dcur); in zstd_compress()
147 inbuf.src = walk.src.virt.addr; in zstd_compress()
[all …]
H A Dscatterwalk.c18 void scatterwalk_skip(struct scatter_walk *walk, unsigned int nbytes) in scatterwalk_skip() argument
20 struct scatterlist *sg = walk->sg; in scatterwalk_skip()
22 nbytes += walk->offset - sg->offset; in scatterwalk_skip()
28 walk->sg = sg; in scatterwalk_skip()
29 walk->offset = sg->offset + nbytes; in scatterwalk_skip()
33 inline void memcpy_from_scatterwalk(void *buf, struct scatter_walk *walk, in memcpy_from_scatterwalk() argument
39 to_copy = scatterwalk_next(walk, nbytes); in memcpy_from_scatterwalk()
40 memcpy(buf, walk->addr, to_copy); in memcpy_from_scatterwalk()
41 scatterwalk_done_src(walk, to_copy); in memcpy_from_scatterwalk()
48 inline void memcpy_to_scatterwalk(struct scatter_walk *walk, const void *buf, in memcpy_to_scatterwalk() argument
[all …]
/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A Dvirtual-memory.json37 … load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes of a…
46 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
51 …load misses in all DTLB levels that cause a completed page walk (1G page size). The page walk can…
56 … load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes (2M/…
61 … misses in all DTLB levels that cause a completed page walk (2M and 4M page sizes). The page walk …
66 … load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes (4K)…
71 …load misses in all DTLB levels that cause a completed page walk (4K page size). The page walk can …
81 …PublicDescription": "This event counts the number of cycles while PMH is busy with the page walk.",
134 …tore misses in all DTLB levels that cause a completed page walk (1G page size). The page walk can…
144 … misses in all DTLB levels that cause a completed page walk (2M and 4M page sizes). The page walk …
[all …]
/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A Dvirtual-memory.json37 … load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes of a…
46 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
51 …load misses in all DTLB levels that cause a completed page walk (1G page size). The page walk can…
56 … load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes (2M/…
61 … misses in all DTLB levels that cause a completed page walk (2M and 4M page sizes). The page walk …
66 … load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes (4K)…
71 …load misses in all DTLB levels that cause a completed page walk (4K page size). The page walk can …
81 …PublicDescription": "This event counts the number of cycles while PMH is busy with the page walk.",
134 …tore misses in all DTLB levels that cause a completed page walk (1G page size). The page walk can…
144 … misses in all DTLB levels that cause a completed page walk (2M and 4M page sizes). The page walk …
[all …]
/linux/tools/perf/pmu-events/arch/x86/broadwell/
H A Dvirtual-memory.json37 … load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes of a…
46 "BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (1G)",
51 …load misses in all DTLB levels that cause a completed page walk (1G page size). The page walk can…
56 … load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes (2M/…
61 … misses in all DTLB levels that cause a completed page walk (2M and 4M page sizes). The page walk …
66 … load Miss in all translation lookaside buffer (TLB) levels causes a page walk that completes (4K)…
71 …load misses in all DTLB levels that cause a completed page walk (4K page size). The page walk can …
81 …PublicDescription": "This event counts the number of cycles while PMH is busy with the page walk.",
134 …tore misses in all DTLB levels that cause a completed page walk (1G page size). The page walk can…
144 … misses in all DTLB levels that cause a completed page walk (2M and 4M page sizes). The page walk …
[all …]
/linux/tools/perf/pmu-events/arch/x86/meteorlake/
H A Dvirtual-memory.json3 …sses but second level hits due to a demand load that did not start a page walk. Accounts for all p…
22 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
27 …unts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.",
42 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
46 …s. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or wit…
56 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
76 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
96 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
106 …cycle. A PMH page walk is outstanding from page walk start till PMH becomes idle again (ready to …
122 … TLB misses but second level hits due to stores that did not start a page walk. Accounts for all p…
[all …]
/linux/tools/perf/pmu-events/arch/x86/silvermont/
H A Dvirtual-memory.json17 …ption": "This event counts every cycle when a data (D) page walk or instruction (I) page walk is i…
26 … counts every cycle when a D-side (walks due to a load) page walk is in progress. Page walk durati…
36 …scription": "This event counts when a data (D) page walk is completed or started. Since a page wa…
45 …cycle when a I-side (walks due to an instruction fetch) page walk is in progress. Page walk durati…
55 …n": "This event counts when an instruction (I) page walk is completed or started. Since a page wa…
65 …s event counts when a data (D) page walk or an instruction (I) page walk is completed or started. …
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A Dvirtual-memory.json12 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
17 …unts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.",
22 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
26 …s. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or wit…
35 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
44 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
53 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
76 "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a store.",
81 …": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a store.",
86 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
[all …]
/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A Dvirtual-memory.json12 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
17 …unts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.",
22 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
26 …s. This implies it missed in the DTLB and further levels of TLB. The page walk can end with or wit…
35 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
44 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
53 …dress translations missed in the DTLB and further levels of TLB. The page walk can end with or wit…
76 "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a store.",
81 …": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a store.",
86 …"BriefDescription": "Store misses in all TLB levels causes a page walk that completes. (All page s…
[all …]

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