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/linux/arch/arm64/kvm/
H A Dat.c13 static void fail_s1_walk(struct s1_walk_result *wr, u8 fst, bool s1ptw) in fail_s1_walk() argument
15 wr->fst = fst; in fail_s1_walk()
16 wr->ptw = s1ptw; in fail_s1_walk()
17 wr->s2 = s1ptw; in fail_s1_walk()
18 wr->failed = true; in fail_s1_walk()
139 struct s1_walk_result *wr, u64 va) in setup_s1_walk() argument
249 wr->level = S1_MMU_DISABLED; in setup_s1_walk()
256 wr->level = S1_MMU_DISABLED; in setup_s1_walk()
260 if (wr->level == S1_MMU_DISABLED) { in setup_s1_walk()
264 wr->pa = va; in setup_s1_walk()
[all …]
/linux/drivers/media/dvb-frontends/
H A Ddib3000mb.c148 wr(DIB3000MB_REG_LOCK1_MASK, DIB3000MB_LOCK1_SEARCH_4); in dib3000mb_set_frontend()
153 wr(DIB3000MB_REG_FFT, DIB3000_TRANSMISSION_MODE_2K); in dib3000mb_set_frontend()
157 wr(DIB3000MB_REG_FFT, DIB3000_TRANSMISSION_MODE_8K); in dib3000mb_set_frontend()
169 wr(DIB3000MB_REG_GUARD_TIME, DIB3000_GUARD_TIME_1_32); in dib3000mb_set_frontend()
173 wr(DIB3000MB_REG_GUARD_TIME, DIB3000_GUARD_TIME_1_16); in dib3000mb_set_frontend()
177 wr(DIB3000MB_REG_GUARD_TIME, DIB3000_GUARD_TIME_1_8); in dib3000mb_set_frontend()
181 wr(DIB3000MB_REG_GUARD_TIME, DIB3000_GUARD_TIME_1_4); in dib3000mb_set_frontend()
193 wr(DIB3000MB_REG_DDS_INV, DIB3000_DDS_INVERSION_OFF); in dib3000mb_set_frontend()
200 wr(DIB3000MB_REG_DDS_INV, DIB3000_DDS_INVERSION_ON); in dib3000mb_set_frontend()
209 wr(DIB3000MB_REG_QAM, DIB3000_CONSTELLATION_QPSK); in dib3000mb_set_frontend()
[all …]
/linux/lib/
H A Ddecompress_unlzma.c294 static inline size_t INIT get_pos(struct writer *wr) in get_pos() argument
297 wr->global_pos + wr->buffer_pos; in get_pos()
300 static inline uint8_t INIT peek_old_byte(struct writer *wr, in peek_old_byte() argument
303 if (!wr->flush) { in peek_old_byte()
305 while (offs > wr->header->dict_size) in peek_old_byte()
306 offs -= wr->header->dict_size; in peek_old_byte()
307 pos = wr->buffer_pos - offs; in peek_old_byte()
308 return wr->buffer[pos]; in peek_old_byte()
310 uint32_t pos = wr->buffer_pos - offs; in peek_old_byte()
311 while (pos >= wr->header->dict_size) in peek_old_byte()
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/linux/drivers/infiniband/hw/mlx5/
H A Dwr.c9 #include "wr.h"
54 static void set_eth_seg(const struct ib_send_wr *wr, struct mlx5_ib_qp *qp, in set_eth_seg() argument
61 if (wr->send_flags & IB_SEND_IP_CSUM) in set_eth_seg()
65 if (wr->opcode == IB_WR_LSO) { in set_eth_seg()
66 struct ib_ud_wr *ud_wr = container_of(wr, struct ib_ud_wr, wr); in set_eth_seg()
103 const struct ib_send_wr *wr) in set_datagram_seg() argument
105 memcpy(&dseg->av, &to_mah(ud_wr(wr)->ah)->av, sizeof(struct mlx5_av)); in set_datagram_seg()
107 cpu_to_be32(ud_wr(wr)->remote_qpn | MLX5_EXTENDED_UD_AV); in set_datagram_seg()
108 dseg->av.key.qkey.qkey = cpu_to_be32(ud_wr(wr)->remote_qkey); in set_datagram_seg()
228 static __be32 send_ieth(const struct ib_send_wr *wr) in send_ieth() argument
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/linux/tools/testing/selftests/bpf/
H A Djson_writer.c311 json_writer_t *wr = jsonw_new(stdout); in main() local
313 jsonw_start_object(wr); in main()
314 jsonw_pretty(wr, true); in main()
315 jsonw_name(wr, "Vyatta"); in main()
316 jsonw_start_object(wr); in main()
317 jsonw_string_field(wr, "url", "http://vyatta.com"); in main()
318 jsonw_uint_field(wr, "downloads", 2000000ul); in main()
319 jsonw_float_field(wr, "stock", 8.16); in main()
321 jsonw_name(wr, "ARGV"); in main()
322 jsonw_start_array(wr); in main()
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/linux/tools/bpf/bpftool/
H A Djson_writer.c311 json_writer_t *wr = jsonw_new(stdout); in main() local
313 jsonw_start_object(wr); in main()
314 jsonw_pretty(wr, true); in main()
315 jsonw_name(wr, "Vyatta"); in main()
316 jsonw_start_object(wr); in main()
317 jsonw_string_field(wr, "url", "http://vyatta.com"); in main()
318 jsonw_uint_field(wr, "downloads", 2000000ul); in main()
319 jsonw_float_field(wr, "stock", 8.16); in main()
321 jsonw_name(wr, "ARGV"); in main()
322 jsonw_start_array(wr); in main()
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/linux/include/trace/events/
H A Dib_mad.h24 TP_PROTO(struct ib_mad_send_wr_private *wr,
26 TP_ARGS(wr, qp_info),
55 __entry->dev_index = wr->mad_agent_priv->agent.device->index;
56 __entry->port_num = wr->mad_agent_priv->agent.port_num;
57 __entry->qp_num = wr->mad_agent_priv->qp_info->qp->qp_num;
58 __entry->agent_priv = wr->mad_agent_priv;
59 __entry->wrtid = wr->tid;
60 __entry->max_retries = wr->max_retries;
61 __entry->retries_left = wr->retries_left;
62 __entry->retry = wr->retry;
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/linux/fs/orangefs/
H A Dinode.c23 struct orangefs_write_range *wr = NULL; in orangefs_writepage_locked() local
34 wr = folio->private; in orangefs_writepage_locked()
35 off = wr->pos; in orangefs_writepage_locked()
36 if ((off + wr->len > len) && (off <= len)) in orangefs_writepage_locked()
39 wlen = wr->len; in orangefs_writepage_locked()
41 wlen = wr->len; in orangefs_writepage_locked()
56 len, wr, NULL, NULL); in orangefs_writepage_locked()
82 struct orangefs_write_range *wrp, wr; in orangefs_writepages_work() local
105 wr.uid = ow->uid; in orangefs_writepages_work()
106 wr.gid = ow->gid; in orangefs_writepages_work()
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/linux/drivers/ata/pata_parport/
H A Dbpck.c93 #define WR(r,v) bpck_write_regr(pi,2,r,v) macro
103 WR(4, 0x40); in bpck_write_block()
109 WR(4, 0); in bpck_write_block()
113 WR(4, 0x50); in bpck_write_block()
119 WR(4, 0x10); in bpck_write_block()
123 WR(4, 0x48); in bpck_write_block()
128 WR(4, 8); in bpck_write_block()
132 WR(4, 0x48); in bpck_write_block()
137 WR(4, 8); in bpck_write_block()
141 WR(4, 0x48); in bpck_write_block()
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H A Depia.c94 #define WR(r, v) epia_write_regr(pi, 0, r, v) macro
114 WR(0x86, 8); in epia_connect()
119 /* WR(0x84,0x10); */ in epia_disconnect()
167 WR(0x84, 3); in epia_read_block()
171 w2(4); WR(0x84, 0); in epia_read_block()
175 WR(0x84, 3); in epia_read_block()
179 w2(4); WR(0x84, 0); in epia_read_block()
183 WR(0x84, 3); in epia_read_block()
187 w2(4); WR(0x84, 0); in epia_read_block()
215 WR(0x84, 1); in epia_write_block()
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/linux/drivers/isdn/hardware/mISDN/
H A Dipac.h122 #define IPAC_MASKB 0x20 /* WR */
124 #define IPAC_CMDRB 0x21 /* WR */
128 #define IPAC_RAH1 0x26 /* WR */
129 #define IPAC_RAH2 0x27 /* WR */
132 #define IPAC_RAL2 0x29 /* WR */
134 #define IPAC_XBCL 0x2A /* WR */
137 #define IPAC_XBCH 0x2D /* WR */
139 #define IPAC_RLCR 0x2E /* WR */
141 #define IPAC_TSAX 0x30 /* WR */
142 #define IPAC_TSAR 0x31 /* WR */
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/linux/drivers/infiniband/core/
H A Drw.c81 reg->inv_wr.next = &reg->reg_wr.wr; in rdma_rw_inv_key()
112 reg->reg_wr.wr.opcode = IB_WR_REG_MR; in rdma_rw_init_one_mr()
152 prev->wr.wr.next = &reg->inv_wr; in rdma_rw_init_mr_wrs()
154 prev->wr.wr.next = &reg->reg_wr.wr; in rdma_rw_init_mr_wrs()
157 reg->reg_wr.wr.next = &reg->wr.wr; in rdma_rw_init_mr_wrs()
159 reg->wr.wr.sg_list = &reg->sge; in rdma_rw_init_mr_wrs()
160 reg->wr.wr.num_sge = 1; in rdma_rw_init_mr_wrs()
161 reg->wr.remote_addr = remote_addr; in rdma_rw_init_mr_wrs()
162 reg->wr.rkey = rkey; in rdma_rw_init_mr_wrs()
164 reg->wr.wr.opcode = IB_WR_RDMA_WRITE; in rdma_rw_init_mr_wrs()
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/linux/drivers/infiniband/hw/vmw_pvrdma/
H A Dpvrdma_qp.c647 const struct ib_reg_wr *wr) in set_reg_seg() argument
649 struct pvrdma_user_mr *mr = to_vmr(wr->mr); in set_reg_seg()
651 wqe_hdr->wr.fast_reg.iova_start = mr->ibmr.iova; in set_reg_seg()
652 wqe_hdr->wr.fast_reg.pl_pdir_dma = mr->pdir.dir_dma; in set_reg_seg()
653 wqe_hdr->wr.fast_reg.page_shift = mr->page_shift; in set_reg_seg()
654 wqe_hdr->wr.fast_reg.page_list_len = mr->npages; in set_reg_seg()
655 wqe_hdr->wr.fast_reg.length = mr->ibmr.length; in set_reg_seg()
656 wqe_hdr->wr.fast_reg.access_flags = wr->access; in set_reg_seg()
657 wqe_hdr->wr.fast_reg.rkey = wr->key; in set_reg_seg()
666 * @wr: work request list to post
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/linux/drivers/infiniband/ulp/iser/
H A Diser_memory.c257 struct ib_reg_wr *wr = &tx_desc->reg_wr; in iser_reg_sig_mr() local
268 iser_inv_rkey(&tx_desc->inv_wr, mr, cqe, &wr->wr); in iser_reg_sig_mr()
280 memset(wr, 0, sizeof(*wr)); in iser_reg_sig_mr()
281 wr->wr.next = &tx_desc->send_wr; in iser_reg_sig_mr()
282 wr->wr.opcode = IB_WR_REG_MR_INTEGRITY; in iser_reg_sig_mr()
283 wr->wr.wr_cqe = cqe; in iser_reg_sig_mr()
284 wr->wr.num_sge = 0; in iser_reg_sig_mr()
285 wr->wr.send_flags = 0; in iser_reg_sig_mr()
286 wr->mr = mr; in iser_reg_sig_mr()
287 wr->key = mr->rkey; in iser_reg_sig_mr()
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/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a55/
H A Dpipeline.json27 …issue is stalled and there is an interlock. Stall cycles due to a stall in Wr (typically awaiting …
30 …issue is stalled and there is an interlock. Stall cycles due to a stall in Wr (typically awaiting …
33 …r data to calculate the address in the AGU. Stall cycles due to a stall in Wr (typically awaiting …
36 …r data to calculate the address in the AGU. Stall cycles due to a stall in Wr (typically awaiting …
39 …that is due to an FPU/NEON instruction. Stall cycles due to a stall in the Wr stage (typically awa…
42 …that is due to an FPU/NEON instruction. Stall cycles due to a stall in the Wr stage (typically awa…
45 …to the backend, load.This event counts every cycle there is a stall in the Wr stage due to a load",
48 … to the backend, load.This event counts every cycle there is a stall in the Wr stage due to a load"
51 …o the backend, store.This event counts every cycle there is a stall in the Wr stage due to a store…
54 …o the backend, store.This event counts every cycle there is a stall in the Wr stage due to a store"
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/linux/drivers/infiniband/sw/rxe/
H A Drxe_mw.c83 if (unlikely(!mr || wqe->wr.wr.mw.length == 0)) { in rxe_check_bind_mw()
117 if (unlikely(wqe->wr.wr.mw.length > mr->ibmr.length)) { in rxe_check_bind_mw()
123 if (unlikely((wqe->wr.wr.mw.addr < mr->ibmr.iova) || in rxe_check_bind_mw()
124 ((wqe->wr.wr.mw.addr + wqe->wr.wr.mw.length) > in rxe_check_bind_mw()
138 u32 key = wqe->wr.wr.mw.rkey & 0xff; in rxe_do_bind_mw()
143 mw->addr = wqe->wr.wr.mw.addr; in rxe_do_bind_mw()
144 mw->length = wqe->wr.wr.mw.length; in rxe_do_bind_mw()
170 u32 mw_rkey = wqe->wr.wr.mw.mw_rkey; in rxe_bind_mw()
171 u32 mr_lkey = wqe->wr.wr.mw.mr_lkey; in rxe_bind_mw()
172 int access = wqe->wr.wr.mw.access; in rxe_bind_mw()
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/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/
H A Dpipeline.json39 …on is stalled and there is an interlock. Stall cycles due to a stall in the Wr stage are excluded",
42 …ion is stalled and there is an interlock. Stall cycles due to a stall in the Wr stage are excluded"
45 …iting for data to calculate the address. Stall cycles due to a stall in the Wr stage are excluded",
48 …aiting for data to calculate the address. Stall cycles due to a stall in the Wr stage are excluded"
51 …ock that is caused by a VPU instruction. Stall cycles due to a stall in the Wr stage are excluded",
54 …lock that is caused by a VPU instruction. Stall cycles due to a stall in the Wr stage are excluded"
57 …backend, load. This event counts every cycle where there is a stall in the Wr stage due to a load",
60 … backend, load. This event counts every cycle where there is a stall in the Wr stage due to a load"
63 …ackend, store. This event counts every cycle where there is a stall in the Wr stage due to a store…
66 …ackend, store. This event counts every cycle where there is a stall in the Wr stage due to a store"
[all …]
/linux/drivers/infiniband/hw/mthca/
H A Dmthca_qp.c1501 const struct ib_ud_wr *wr, in build_mlx_header() argument
1511 mthca_ah_grh_present(to_mah(wr->ah)), 0, 0, 0, in build_mlx_header()
1514 err = mthca_read_ah(dev, to_mah(wr->ah), &sqp->ud_header); in build_mlx_header()
1525 switch (wr->wr.opcode) { in build_mlx_header()
1533 sqp->ud_header.immediate_data = wr->wr.ex.imm_data; in build_mlx_header()
1542 sqp->ud_header.bth.solicited_event = !!(wr->wr.send_flags & IB_SEND_SOLICITED); in build_mlx_header()
1547 ib_get_cached_pkey(&dev->ib_dev, qp->port, wr->pkey_index, in build_mlx_header()
1550 sqp->ud_header.bth.destination_qpn = cpu_to_be32(wr->remote_qpn); in build_mlx_header()
1552 sqp->ud_header.deth.qkey = cpu_to_be32(wr->remote_qkey & 0x80000000 ? in build_mlx_header()
1553 sqp->qkey : wr->remote_qkey); in build_mlx_header()
[all …]
/linux/drivers/scsi/csiostor/
H A Dcsio_scsi.c193 * csio_scsi_init_cmd_wr - Initialize the SCSI CMD WR.
196 * @size: Size of WR (including FW WR + immed data + rsp SG entry
205 struct fw_scsi_cmd_wr *wr = (struct fw_scsi_cmd_wr *)addr; in csio_scsi_init_cmd_wr() local
209 wr->op_immdlen = cpu_to_be32(FW_WR_OP_V(FW_SCSI_CMD_WR) | in csio_scsi_init_cmd_wr()
211 wr->flowid_len16 = cpu_to_be32(FW_WR_FLOWID_V(rn->flowid) | in csio_scsi_init_cmd_wr()
215 wr->cookie = (uintptr_t) req; in csio_scsi_init_cmd_wr()
216 wr->iqid = cpu_to_be16(csio_q_physiqid(hw, req->iq_idx)); in csio_scsi_init_cmd_wr()
217 wr->tmo_val = (uint8_t) req->tmo; in csio_scsi_init_cmd_wr()
218 wr->r3 = 0; in csio_scsi_init_cmd_wr()
219 memset(&wr->r5, 0, 8); in csio_scsi_init_cmd_wr()
[all …]
/linux/tools/testing/selftests/breakpoints/
H A Dbreakpoint_test_arm64.c33 static void child(int size, int wr) in child() argument
35 volatile uint8_t *addr = &var[32 + wr]; in child()
112 static bool run_test(int wr_size, int wp_size, int wr, int wp) in run_test() argument
125 child(wr_size, wr); in run_test()
204 int wr, wp, size; in main() local
215 for (wr = 0; wr <= 32; wr = wr + size) { in main()
216 for (wp = wr - size; wp <= wr + size; wp = wp + size) { in main()
217 result = run_test(size, MIN(size, 8), wr, wp); in main()
218 if ((result && wr == wp) || in main()
219 (!result && wr != wp)) in main()
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/linux/arch/mips/mm/
H A Dtlbex.c1996 struct work_registers wr = build_get_work_registers(p); in build_r4000_tlbchange_handler_head() local
1999 build_get_pmde64(p, l, r, wr.r1, wr.r2); /* get pmd in ptr */ in build_r4000_tlbchange_handler_head()
2001 build_get_pgde32(p, wr.r1, wr.r2); /* get pgd in ptr */ in build_r4000_tlbchange_handler_head()
2010 build_is_huge_pte(p, r, wr.r1, wr.r2, label_tlb_huge_update); in build_r4000_tlbchange_handler_head()
2013 UASM_i_MFC0(p, wr.r1, C0_BADVADDR); in build_r4000_tlbchange_handler_head()
2014 UASM_i_LW(p, wr.r2, 0, wr.r2); in build_r4000_tlbchange_handler_head()
2015 UASM_i_SRL(p, wr.r1, wr.r1, PAGE_SHIFT - PTE_T_LOG2); in build_r4000_tlbchange_handler_head()
2016 uasm_i_andi(p, wr.r1, wr.r1, (PTRS_PER_PTE - 1) << PTE_T_LOG2); in build_r4000_tlbchange_handler_head()
2017 UASM_i_ADDU(p, wr.r2, wr.r2, wr.r1); in build_r4000_tlbchange_handler_head()
2022 iPTE_LW(p, wr.r1, wr.r2); /* get even pte */ in build_r4000_tlbchange_handler_head()
[all …]
/linux/arch/sparc/kernel/
H A Dentry.S159 wr %l0, 0x0, %psr
181 wr %l4, 0x0, %psr
183 wr %l4, PSR_ET, %psr
200 wr %l0, PSR_ET, %psr
230 wr %g2, 0x0, %psr
232 wr %g2, PSR_ET, %psr
239 wr %g2, PSR_ET, %psr ! keep ET up
249 wr %g2, 0x0, %psr
251 wr %g2, PSR_ET, %psr
255 wr %l0, PSR_ET, %psr
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/linux/drivers/infiniband/ulp/rtrs/
H A Drtrs-srv.c206 struct ib_rdma_wr *wr = NULL; in rdma_write_sg() local
223 wr = &id->tx_wr; in rdma_write_sg()
228 /* WR will fail with length error in rdma_write_sg()
239 wr->wr.sg_list = plist; in rdma_write_sg()
240 wr->wr.num_sge = 1; in rdma_write_sg()
241 wr->remote_addr = le64_to_cpu(id->rd_msg->desc[0].addr); in rdma_write_sg()
242 wr->rkey = le32_to_cpu(id->rd_msg->desc[0].key); in rdma_write_sg()
244 rkey = wr->rkey; in rdma_write_sg()
247 WARN_ON_ONCE(rkey != wr->rkey); in rdma_write_sg()
249 wr->wr.opcode = IB_WR_RDMA_WRITE; in rdma_write_sg()
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/linux/include/linux/ceph/
H A Drados.h228 f(WRITE, __CEPH_OSD_OP(WR, DATA, 1), "write") \
229 f(WRITEFULL, __CEPH_OSD_OP(WR, DATA, 2), "writefull") \
230 f(TRUNCATE, __CEPH_OSD_OP(WR, DATA, 3), "truncate") \
231 f(ZERO, __CEPH_OSD_OP(WR, DATA, 4), "zero") \
232 f(DELETE, __CEPH_OSD_OP(WR, DATA, 5), "delete") \
235 f(APPEND, __CEPH_OSD_OP(WR, DATA, 6), "append") \
236 f(SETTRUNC, __CEPH_OSD_OP(WR, DATA, 8), "settrunc") \
237 f(TRIMTRUNC, __CEPH_OSD_OP(WR, DATA, 9), "trimtrunc") \
240 f(TMAPPUT, __CEPH_OSD_OP(WR, DATA, 11), "tmapput") \
243 f(CREATE, __CEPH_OSD_OP(WR, DATA, 13), "create") \
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/linux/include/linux/
H A Dhdlcdrv.h28 unsigned rd, wr; member
35 unsigned int wr; member
49 buf->buffer[buf->wr] = buf->shreg; in hdlcdrv_add_bitbuffer()
50 buf->wr = (buf->wr+1) % sizeof(buf->buffer); in hdlcdrv_add_bitbuffer()
58 buf->buffer[buf->wr] = bits & 0xff; in hdlcdrv_add_bitbuffer_word()
59 buf->wr = (buf->wr+1) % sizeof(buf->buffer); in hdlcdrv_add_bitbuffer_word()
60 buf->buffer[buf->wr] = (bits >> 8) & 0xff; in hdlcdrv_add_bitbuffer_word()
61 buf->wr = (buf->wr+1) % sizeof(buf->buffer); in hdlcdrv_add_bitbuffer_word()
164 ret = !((HDLCDRV_HDLCBUFFER - 1 + hb->rd - hb->wr) % HDLCDRV_HDLCBUFFER); in hdlcdrv_hbuf_full()
177 ret = (hb->rd == hb->wr); in hdlcdrv_hbuf_empty()
[all …]

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