Searched full:vsel0 (Results 1 – 14 of 14) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/regulator/ |
H A D | tps62360-regulator.txt | 14 - ti,vsel0-gpio: GPIO for controlling VSEL0 line. 16 for vsel0 control. 20 - ti,vsel0-state-high: Initial state of vsel0 input is high. 37 ti,vsel0-gpio = <&gpio1 16 0>; 39 ti,vsel0-state-high;
|
H A D | ti,tps62360.yaml | 35 ti,vsel0-gpio: 37 GPIO for controlling VSEL0 line. If this property 39 VSEL0 control. 57 ti,vsel0-state-high: 59 Initial state of VSEL0 input is high. If this property 89 ti,vsel0-gpio = <&gpio1 16 GPIO_ACTIVE_HIGH>; 91 ti,vsel0-state-high;
|
H A D | fcs,fan53555.yaml | 48 VSEL0 register. When this pin is HIGH, VOUT is set by the VSEL1 register.
|
H A D | richtek,rt5739.yaml | 36 Else, use the 'VSEL0' register group. This depends on external hardware
|
/freebsd/sys/dev/iicbus/pmic/silergy/ |
H A D | syr827.c | 48 #define VSEL0 0x00 macro 208 reg_sc->suspend_reg = VSEL0; in syr827_reg_attach() 213 reg_sc->volt_reg = VSEL0; in syr827_reg_attach()
|
/freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
H A D | tegra30-asus-nexus7-grouper-ti-pmic.dtsi | 139 ti,vsel0-state-high;
|
H A D | tegra30-cardhu.dtsi | 371 ti,vsel0-state-high;
|
H A D | tegra30-asus-transformer-common.dtsi | 1349 ti,vsel0-state-high;
|
H A D | tegra30-beaver.dts | 1893 ti,vsel0-state-high;
|
H A D | tegra30-pegatron-chagall.dts | 1426 ti,vsel0-state-high;
|
H A D | tegra30-ouya.dts | 2187 ti,vsel0-state-high;
|
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | am437x-idk-evm.dts | 350 ti,vsel0-state-high;
|
/freebsd/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-am654-base-board.dts | 368 ti,vsel0-state-high;
|
H A D | k3-am65-iot2050-common.dtsi | 430 ti,vsel0-state-high;
|