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/linux/arch/arm64/kvm/vgic/
H A Dvgic-debug.c14 #include "vgic.h"
17 * Structure to control looping through the entire vgic state. We start at
35 struct vgic_dist *dist = &kvm->arch.vgic; in iter_next()
66 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_count_lpis()
87 iter->nr_spis = kvm->arch.vgic.nr_spis; in iter_init()
243 print_dist_state(s, &kvm->arch.vgic, iter); in vgic_debug_show()
247 if (!kvm->arch.vgic.initialized) in vgic_debug_show()
280 debugfs_create_file("vgic-state", 0444, kvm->debugfs_dentry, kvm, in vgic_debug_init()
289 * struct vgic_its_iter - Iterator for traversing VGIC ITS device tables.
320 * @its: The VGIC ITS structure.
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H A Dvgic-mmio-v3.c18 #include "vgic.h"
19 #include "vgic-mmio.h"
43 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_has_its()
71 return kvm->arch.vgic.nassgicap; in vgic_supports_direct_sgis()
84 struct vgic_dist *vgic = &vcpu->kvm->arch.vgic; in vgic_mmio_read_v3_misc() local
89 if (vgic->enabled) in vgic_mmio_read_v3_misc()
92 if (vgic->nassgireq) in vgic_mmio_read_v3_misc()
96 value = vgic->nr_spis + VGIC_NR_PRIVATE_IRQS; in vgic_mmio_read_v3_misc()
111 (vgic->implementation_rev << GICD_IIDR_REVISION_SHIFT) | in vgic_mmio_read_v3_misc()
125 struct vgic_dist *dist = &vcpu->kvm->arch.vgic; in vgic_mmio_write_v3_misc()
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H A Dvgic-mmio-v2.c14 #include "vgic.h"
15 #include "vgic-mmio.h"
28 struct vgic_dist *vgic = &vcpu->kvm->arch.vgic; in vgic_mmio_read_v2_misc() local
33 value = vgic->enabled ? GICD_ENABLE : 0; in vgic_mmio_read_v2_misc()
36 value = vgic->nr_spis + VGIC_NR_PRIVATE_IRQS; in vgic_mmio_read_v2_misc()
42 (vgic->implementation_rev << GICD_IIDR_REVISION_SHIFT) | in vgic_mmio_read_v2_misc()
56 struct vgic_dist *dist = &vcpu->kvm->arch.vgic; in vgic_mmio_write_v2_misc()
76 struct vgic_dist *dist = &vcpu->kvm->arch.vgic; in vgic_mmio_uaccess_write_v2_misc()
98 vcpu->kvm->arch.vgic.v2_groups_user_writable = true; in vgic_mmio_uaccess_write_v2_misc()
114 if (vcpu->kvm->arch.vgic.v2_groups_user_writable) in vgic_mmio_uaccess_write_v2_group()
H A Dvgic-v4.c13 #include "vgic.h"
18 * The vgic-v4 layer acts as a bridge between several entities:
192 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_v4_configure_vsgis()
239 * vgic is initialized. In both cases, the number of vcpus
244 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_v4_init()
320 struct its_vm *its_vm = &kvm->arch.vgic.its_vm; in vgic_v4_teardown()
389 err = its_make_vpe_resident(vpe, false, vcpu->kvm->arch.vgic.enabled); in vgic_v4_load()
476 .vm = &kvm->arch.vgic.its_vm, in kvm_vgic_v4_set_forwarding()
520 xa_for_each(&kvm->arch.vgic.lpi_xa, idx, irq) { in __vgic_host_irq_get_vlpi()
H A Dtrace.h33 #define TRACE_INCLUDE_PATH ../../arch/arm64/kvm/vgic
H A Dvgic-mmio.h62 * Some VGIC registers store per-IRQ information, with a different number
/linux/Documentation/virt/kvm/devices/
H A Darm-vgic.rst4 ARM Virtual Generic Interrupt Controller v2 (VGIC)
11 Only one VGIC instance may be instantiated through either this API or the
12 legacy KVM_CREATE_IRQCHIP API. The created VGIC will act as the VM interrupt
14 VGIC instead of directly to CPUs.
18 device and guest ITS devices, see arm-vgic-v3.txt. It is not possible to
146 request the initialization of the VGIC or ITS, no additional parameter
152 -ENXIO VGIC not properly configured as required prior to calling
155 -ENOMEM memory shortage when allocating vgic internal data
H A Darm-vgic-v3.rst11 Only one VGIC instance may be instantiated through this API. The created VGIC
13 to inject interrupts to the VGIC instead of directly to CPUs. It is not
112 VGIC's internal state.
127 initialization of the VGIC:
141 without an active state. At VGIC creation the field resets to the
305 request the initialization of the VGIC, no additional parameter in
315 -ENXIO VGIC not properly configured as required prior to calling
318 -ENOMEM memory shortage when allocating vgic internal data
375 The vINTID specifies which interrupt is generated when the vGIC
/linux/tools/testing/selftests/kvm/arm64/
H A Dno-vgic.c284 pr_info("Testing no-vgic-v3\n"); in main()
287 pr_info("No GICv3 support: skipping no-vgic-v3 test\n"); in main()
291 pr_info("Testing no-vgic-v5\n"); in main()
294 pr_info("No GICv5 support: skipping no-vgic-v5 test\n"); in main()
H A Dvgic_init.c3 * vgic init sequence tests
17 #include "vgic.h"
332 * VGIC KVM device is created and initialized before the secondary CPUs
355 /* All the VCPUs are created before the VGIC KVM device gets initialized */
433 TEST_ASSERT(ret == -EBUSY, "running without vgic explicit init"); in test_v3_new_redist_regions()
712 "Changed nASSGIcap after initializing the VGIC"); in test_v3_nassgicap()
H A Dvgic_v5.c13 #include "vgic.h"
H A Darch_timer.c14 #include "vgic.h"
H A Dvgic_lpi_stress.c19 #include "vgic.h"
H A Dvgic_irq.c20 #include "vgic.h"
1022 printf(" -n: specify number of IRQs to setup the vgic with. " in help()
H A Dvpmu_counter_access.c18 #include <vgic.h>
H A Darch_timer_edge_cases.c23 #include "vgic.h"
/linux/tools/testing/selftests/kvm/lib/arm64/
H A Dvgic.c14 #include "vgic.h"
30 * vGIC-v3 default host setup
40 * The function creates a vGIC-v3 device and maps the distributor and
H A Dgic_v3_its.c13 #include "vgic.h"
H A Dprocessor.c15 #include "vgic.h"
/linux/include/linux/irqchip/
H A Darm-gic-common.h10 #include <linux/irqchip/arm-vgic-info.h>
H A Darm-vgic-info.h3 * include/linux/irqchip/arm-vgic-info.h
/linux/arch/arm64/kvm/
H A Dtrace_arm.h113 (__entry->type == KVM_ARM_IRQ_TYPE_PPI) ? "VGIC PPI" :
114 (__entry->type == KVM_ARM_IRQ_TYPE_SPI) ? "VGIC SPI" : "UNKNOWN",
/linux/tools/testing/selftests/kvm/
H A DMakefile.kvm41 LIBKVM_arm64 += lib/arm64/vgic.c
195 TEST_GEN_PROGS_arm64 += arm64/no-vgic
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,gic-v5.yaml66 The VGIC maintenance interrupt.
/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex.dtsi109 /* VGIC maintenance interrupt */

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