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/linux/arch/arm64/kvm/
H A DMakefile19 vgic-sys-reg-v3.o fpsimd.o pkvm.o \
21 vgic/vgic.o vgic/vgic-init.o \
22 vgic/vgic-irqfd.o vgic/vgic-v2.o \
23 vgic/vgic-v3.o vgic/vgic-v4.o \
24 vgic/vgic-mmio.o vgic/vgic-mmio-v2.o \
25 vgic/vgic-mmio-v3.o vgic/vgic-kvm-device.o \
26 vgic/vgic-its.o vgic/vgic-debug.o vgic/vgic-v3-nested.o \
27 vgic/vgic-v5.o
H A Dvgic-sys-reg-v3.c3 * VGIC system registers handling functions for AArch64 mode
10 #include "vgic/vgic.h"
/linux/arch/arm64/kvm/vgic/
H A Dvgic-init.c13 #include "vgic.h"
16 * Initialization rules: there are multiple stages to the vgic
18 * idea is that even though the VGIC is not functional or not requested from
19 * user space, the critical path of the run loop can still call VGIC functions
39 * already allocated at vgic-creation time.
45 * kvm_vgic_early_init() - Initialize static VGIC VCPU data structures
46 * @kvm: The VM whose VGIC districutor should be initialized
54 struct vgic_dist *dist = &kvm->arch.vgic; in kvm_vgic_early_init()
64 * kvm_vgic_create: triggered by the instantiation of the VGIC device by
107 * - Taking the config_lock which protects VGIC data structures such in kvm_vgic_create()
[all …]
H A Dvgic-kvm-device.c3 * VGIC: KVM DEVICE API
14 #include "vgic.h"
40 if (kvm->arch.vgic.vgic_model != type_needed) in vgic_check_type()
48 struct vgic_dist *vgic = &kvm->arch.vgic; in kvm_set_legacy_vgic_v2_addr() local
56 r = vgic_check_iorange(kvm, vgic->vgic_dist_base, dev_addr->addr, in kvm_set_legacy_vgic_v2_addr()
59 vgic->vgic_dist_base = dev_addr->addr; in kvm_set_legacy_vgic_v2_addr()
64 r = vgic_check_iorange(kvm, vgic->vgic_cpu_base, dev_addr->addr, in kvm_set_legacy_vgic_v2_addr()
67 vgic->vgic_cpu_base = dev_addr->addr; in kvm_set_legacy_vgic_v2_addr()
79 * kvm_vgic_addr - set or get vgic VM base addresses
85 * Set or get the vgic base addresses for the distributor and the virtual CPU
[all …]
H A Dvgic-debug.c14 #include "vgic.h"
17 * Structure to control looping through the entire vgic state. We start at
37 struct vgic_dist *dist = &kvm->arch.vgic; in iter_next()
66 struct vgic_dist *dist = &kvm->arch.vgic; in iter_mark_lpis()
88 struct vgic_dist *dist = &kvm->arch.vgic; in iter_unmark_lpis()
110 iter->nr_spis = kvm->arch.vgic.nr_spis; in iter_init()
111 if (kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) in iter_init()
133 iter = kvm->arch.vgic.iter; in vgic_debug_start()
146 kvm->arch.vgic.iter = iter; in vgic_debug_start()
158 struct vgic_state_iter *iter = kvm->arch.vgic.iter; in vgic_debug_next()
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H A Dvgic-v3.c15 #include "vgic-mmio.h"
16 #include "vgic.h"
64 atomic_read(&vcpu->kvm->arch.vgic.active_spis)) in vgic_v3_configure_hcr()
81 if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) { in vgic_v3_fold_lr()
130 atomic_dec_if_positive(&vcpu->kvm->arch.vgic.active_spis); in vgic_v3_fold_lr()
199 u32 model = vcpu->kvm->arch.vgic.vgic_model; in vgic_v3_deactivate()
219 val >= vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS) in vgic_v3_deactivate()
300 u32 model = vcpu->kvm->arch.vgic.vgic_model; in vgic_v3_compute_lr()
368 u32 model = vcpu->kvm->arch.vgic.vgic_model; in vgic_v3_populate_lr()
389 * rising edges as input to the VGIC. We therefore lower the line in vgic_v3_populate_lr()
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H A Dvgic-mmio-v3.c18 #include "vgic.h"
19 #include "vgic-mmio.h"
43 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_has_its()
71 return kvm->arch.vgic.nassgicap; in vgic_supports_direct_sgis()
84 struct vgic_dist *vgic = &vcpu->kvm->arch.vgic; in vgic_mmio_read_v3_misc() local
89 if (vgic->enabled) in vgic_mmio_read_v3_misc()
92 if (vgic->nassgireq) in vgic_mmio_read_v3_misc()
96 value = vgic->nr_spis + VGIC_NR_PRIVATE_IRQS; in vgic_mmio_read_v3_misc()
111 (vgic->implementation_rev << GICD_IIDR_REVISION_SHIFT) | in vgic_mmio_read_v3_misc()
125 struct vgic_dist *dist = &vcpu->kvm->arch.vgic; in vgic_mmio_write_v3_misc()
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H A Dvgic-mmio-v2.c14 #include "vgic.h"
15 #include "vgic-mmio.h"
28 struct vgic_dist *vgic = &vcpu->kvm->arch.vgic; in vgic_mmio_read_v2_misc() local
33 value = vgic->enabled ? GICD_ENABLE : 0; in vgic_mmio_read_v2_misc()
36 value = vgic->nr_spis + VGIC_NR_PRIVATE_IRQS; in vgic_mmio_read_v2_misc()
42 (vgic->implementation_rev << GICD_IIDR_REVISION_SHIFT) | in vgic_mmio_read_v2_misc()
56 struct vgic_dist *dist = &vcpu->kvm->arch.vgic; in vgic_mmio_write_v2_misc()
76 struct vgic_dist *dist = &vcpu->kvm->arch.vgic; in vgic_mmio_uaccess_write_v2_misc()
98 vcpu->kvm->arch.vgic.v2_groups_user_writable = true; in vgic_mmio_uaccess_write_v2_misc()
114 if (vcpu->kvm->arch.vgic.v2_groups_user_writable) in vgic_mmio_uaccess_write_v2_group()
H A Dvgic-v2.c12 #include "vgic-mmio.h"
13 #include "vgic.h"
321 * rising edges as input to the VGIC. We therefore lower the line in vgic_v2_populate_lr()
422 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_v2_map_resources()
428 kvm_debug("Need to set vgic cpu and dist addresses first\n"); in vgic_v2_map_resources()
433 kvm_debug("VGIC CPU and dist frames overlap\n"); in vgic_v2_map_resources()
438 * Initialize the vgic if this hasn't already been done on demand by in vgic_v2_map_resources()
439 * accessing the vgic state from userspace. in vgic_v2_map_resources()
443 kvm_err("Unable to initialize VGIC dynamic data structures\n"); in vgic_v2_map_resources()
462 kvm_err("Unable to remap VGIC CPU to VCPU\n"); in vgic_v2_map_resources()
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H A Dvgic-mmio.c3 * VGIC MMIO handling functions
16 #include "vgic.h"
17 #include "vgic-mmio.h"
148 * while the interrupt was disabled at the VGIC level. in vgic_mmio_write_senable()
249 * Refer to Documentation/virt/kvm/devices/arm-vgic-v3.rst in __read_pending()
264 switch (vcpu->kvm->arch.vgic.vgic_model) { in __read_pending()
301 vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2); in is_vgic_v2_sgi()
380 * can happen is an additional vgic injection. We also clear in vgic_hw_irq_cpending()
467 * userspace accesses to the VGIC state already require all VCPUs to be
473 if ((vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3 && in vgic_access_active_prepare()
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H A Dvgic-v4.c13 #include "vgic.h"
18 * The vgic-v4 layer acts as a bridge between several entities:
192 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_v4_configure_vsgis()
239 * vgic is initialized. In both cases, the number of vcpus
244 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_v4_init()
320 struct its_vm *its_vm = &kvm->arch.vgic.its_vm; in vgic_v4_teardown()
389 err = its_make_vpe_resident(vpe, false, vcpu->kvm->arch.vgic.enabled); in vgic_v4_load()
476 .vm = &kvm->arch.vgic.its_vm, in kvm_vgic_v4_set_forwarding()
520 xa_for_each(&kvm->arch.vgic.lpi_xa, idx, irq) { in __vgic_host_irq_get_vlpi()
H A Dvgic-v3-nested.c16 #include "vgic.h"
63 * - on L2 load: move the in-memory L1 vGIC configuration into a shadow,
73 * - there is nothing to do on L2 entry apart from enabling the vgic, as
84 * Since the L2 guest runs the vgic in its full glory, MIs get delivered and
96 * quality of emulation is poor: L1 can setup the vgic so that an MI would
395 vcpu->kvm->arch.vgic.mi_intid, state, vcpu); in vgic_v3_handle_nested_maint_irq()
406 vcpu->kvm->arch.vgic.mi_intid, level, vcpu); in vgic_v3_nested_update_mi()
H A Dvgic.c15 #include "vgic.h"
56 * Since the VGIC must support injecting virtual interrupts from ISRs, we have
68 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_get_lpi()
91 intid < (kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) { in vgic_get_irq()
92 intid = array_index_nospec(intid, kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS); in vgic_get_irq()
93 return &kvm->arch.vgic.spis[intid - VGIC_NR_PRIVATE_IRQS]; in vgic_get_irq()
143 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_put_irq()
165 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_release_deleted_lpis()
263 !irq->target_vcpu->kvm->arch.vgic.enabled)) in vgic_target_oracle()
388 kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3); in vgic_model_needs_bcst_kick()
[all …]
H A Dvgic-irqfd.c10 #include "vgic.h"
126 * as long as the damn vgic is initialized. in kvm_arch_set_irq_inatomic()
139 struct vgic_dist *dist = &kvm->arch.vgic; in kvm_vgic_setup_default_irq_routing()
H A Dvgic.h39 * Below macro converts vgic userspace format to MPIDR reg format.
47 * As per Documentation/virt/kvm/devices/arm-vgic-v3.rst,
86 * As per Documentation/virt/kvm/devices/arm-vgic-its.rst,
123 return vcpu->kvm->arch.vgic.implementation_rev; in vgic_get_implementation_rev()
157 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_write_guest_lock()
410 struct vgic_dist *d = &kvm->arch.vgic; in vgic_dist_overlap()
H A Dvgic-its.c23 #include "vgic.h"
24 #include "vgic-mmio.h"
79 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_add_lpi()
283 u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser); in update_lpi_config()
344 * is targeting) to the VGIC's view, which deals with target VCPUs.
392 struct vgic_dist *dist = &vcpu->kvm->arch.vgic; in its_sync_lpi_pending_table()
1047 lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser)) in vgic_its_cmd_handle_mapi()
1297 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_its_invall()
1352 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_its_cmd_handle_movall()
1881 dev->kvm->arch.vgic.msis_require_devid = true; in vgic_its_create()
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/linux/arch/arm64/kvm/hyp/
H A Dvgic-v2-cpuif-proxy.c40 struct vgic_dist *vgic = &kvm->arch.vgic; in __vgic_v2_perform_cpuif_access() local
50 if (fault_ipa < vgic->vgic_cpu_base || in __vgic_v2_perform_cpuif_access()
51 fault_ipa >= (vgic->vgic_cpu_base + KVM_VGIC_V2_CPU_SIZE)) in __vgic_v2_perform_cpuif_access()
67 if ((fault_ipa - vgic->vgic_cpu_base) >= GIC_CPU_DEACTIVATE) in __vgic_v2_perform_cpuif_access()
72 addr += fault_ipa - vgic->vgic_cpu_base; in __vgic_v2_perform_cpuif_access()
H A Dvgic-v3-sr.c17 #include "../../vgic/vgic.h"
292 * However, if the vgic is disabled (ICH_HCR_EL2.EN==0), no GIC is in __vgic_v3_activate_traps()
333 * vgic at all). In any case, no need to provide MI configuration. in __vgic_v3_activate_traps()
357 * If we were trapping system registers, we enabled the VGIC even if in __vgic_v3_deactivate_traps()
1169 if (kern_hyp_va(vcpu->kvm)->arch.vgic.vgic_model != KVM_DEV_TYPE_ARM_VGIC_V3) in __vgic_v3_perform_cpuif_access()
/linux/Documentation/virt/kvm/devices/
H A Darm-vgic.rst4 ARM Virtual Generic Interrupt Controller v2 (VGIC)
11 Only one VGIC instance may be instantiated through either this API or the
12 legacy KVM_CREATE_IRQCHIP API. The created VGIC will act as the VM interrupt
14 VGIC instead of directly to CPUs.
18 device and guest ITS devices, see arm-vgic-v3.txt. It is not possible to
146 request the initialization of the VGIC or ITS, no additional parameter
152 -ENXIO VGIC not properly configured as required prior to calling
155 -ENOMEM memory shortage when allocating vgic internal data
H A Dindex.rst10 arm-vgic-its
11 arm-vgic
12 arm-vgic-v3
H A Darm-vgic-v3.rst11 Only one VGIC instance may be instantiated through this API. The created VGIC
13 to inject interrupts to the VGIC instead of directly to CPUs. It is not
112 VGIC's internal state.
127 initialization of the VGIC:
141 without an active state. At VGIC creation the field resets to the
305 request the initialization of the VGIC, no additional parameter in
315 -ENXIO VGIC not properly configured as required prior to calling
318 -ENOMEM memory shortage when allocating vgic internal data
375 The vINTID specifies which interrupt is generated when the vGIC
/linux/include/kvm/
H A Darm_vgic.h49 /* Physical address of vgic virtual cpu interface */
246 /* vGIC model the kernel emulates for the guest (GICv2 or GICv3) */
306 /* used by vgic-debug */
419 #define irqchip_in_kernel(k) (!!((k)->arch.vgic.in_kernel))
420 #define vgic_initialized(k) ((k)->arch.vgic.initialized)
422 ((i) < (k)->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS))
/linux/arch/arm64/kvm/hyp/vhe/
H A DMakefile12 obj-y += ../vgic-v3-sr.o ../aarch32.o ../vgic-v2-cpuif-proxy.o ../entry.o \
/linux/include/linux/irqchip/
H A Darm-gic-common.h10 #include <linux/irqchip/arm-vgic-info.h>
/linux/tools/testing/selftests/kvm/arm64/
H A Dvgic_init.c3 * vgic init sequence tests
17 #include "vgic.h"
332 * VGIC KVM device is created and initialized before the secondary CPUs
355 /* All the VCPUs are created before the VGIC KVM device gets initialized */
433 TEST_ASSERT(ret == -EBUSY, "running without vgic explicit init"); in test_v3_new_redist_regions()
712 "Changed nASSGIcap after initializing the VGIC"); in test_v3_nassgicap()

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