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/linux/arch/arm64/kvm/
H A DMakefile19 vgic-sys-reg-v3.o fpsimd.o pkvm.o \
21 vgic/vgic.o vgic/vgic-init.o \
22 vgic/vgic-irqfd.o vgic/vgic-v2.o \
23 vgic/vgic-v3.o vgic/vgic-v4.o \
24 vgic/vgic-mmio.o vgic/vgic-mmio-v2.o \
25 vgic/vgic-mmio-v3.o vgic/vgic-kvm-device.o \
26 vgic/vgic-its.o vgic/vgic-debug.o vgic/vgic-v3-nested.o \
27 vgic/vgic-v5.o
H A Dvgic-sys-reg-v3.c3 * VGIC system registers handling functions for AArch64 mode
10 #include "vgic/vgic.h"
H A Darm.c408 r = kvm->arch.vgic.msis_require_devid; in kvm_vm_ioctl_check_extension()
617 vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3 && in kvm_vcpu_should_clear_twi()
619 vcpu->kvm->arch.vgic.nassgireq); in kvm_vcpu_should_clear_twi()
672 * The timer must be loaded before the vgic to correctly set up physical in kvm_arch_vcpu_load()
899 * Map the VGIC hardware resources before running a vcpu the in kvm_arch_vcpu_run_pid_change()
1303 * We must sync the PMU state before the vgic state so in kvm_arch_vcpu_ioctl_run()
1304 * that the vgic can properly sample the updated state of the in kvm_arch_vcpu_ioctl_run()
1311 * Sync the vgic state before syncing the timer state because in kvm_arch_vcpu_ioctl_run()
2371 * Init HYP view of VGIC in init_subsystems()
2381 * No VGIC? No pKVM for you. in init_subsystems()
[all …]
H A Dtrace_arm.h113 (__entry->type == KVM_ARM_IRQ_TYPE_PPI) ? "VGIC PPI" :
114 (__entry->type == KVM_ARM_IRQ_TYPE_SPI) ? "VGIC SPI" : "UNKNOWN",
/linux/arch/arm64/kvm/vgic/
H A Dvgic-init.c13 #include "vgic.h"
16 * Initialization rules: there are multiple stages to the vgic
18 * idea is that even though the VGIC is not functional or not requested from
19 * user space, the critical path of the run loop can still call VGIC functions
39 * already allocated at vgic-creation time.
45 * kvm_vgic_early_init() - Initialize static VGIC VCPU data structures
46 * @kvm: The VM whose VGIC districutor should be initialized
54 struct vgic_dist *dist = &kvm->arch.vgic; in kvm_vgic_early_init()
64 * kvm_vgic_create: triggered by the instantiation of the VGIC device by
107 * - Taking the config_lock which protects VGIC data structures such in kvm_vgic_create()
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H A Dvgic-kvm-device.c3 * VGIC: KVM DEVICE API
14 #include "vgic.h"
40 if (kvm->arch.vgic.vgic_model != type_needed) in vgic_check_type()
48 struct vgic_dist *vgic = &kvm->arch.vgic; in kvm_set_legacy_vgic_v2_addr() local
56 r = vgic_check_iorange(kvm, vgic->vgic_dist_base, dev_addr->addr, in kvm_set_legacy_vgic_v2_addr()
59 vgic->vgic_dist_base = dev_addr->addr; in kvm_set_legacy_vgic_v2_addr()
64 r = vgic_check_iorange(kvm, vgic->vgic_cpu_base, dev_addr->addr, in kvm_set_legacy_vgic_v2_addr()
67 vgic->vgic_cpu_base = dev_addr->addr; in kvm_set_legacy_vgic_v2_addr()
79 * kvm_vgic_addr - set or get vgic VM base addresses
85 * Set or get the vgic base addresses for the distributor and the virtual CPU
[all …]
H A Dvgic-debug.c14 #include "vgic.h"
17 * Structure to control looping through the entire vgic state. We start at
35 struct vgic_dist *dist = &kvm->arch.vgic; in iter_next()
66 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_count_lpis()
87 iter->nr_spis = kvm->arch.vgic.nr_spis; in iter_init()
243 print_dist_state(s, &kvm->arch.vgic, iter); in vgic_debug_show()
247 if (!kvm->arch.vgic.initialized) in vgic_debug_show()
280 debugfs_create_file("vgic-state", 0444, kvm->debugfs_dentry, kvm, in vgic_debug_init()
289 * struct vgic_its_iter - Iterator for traversing VGIC ITS device tables.
320 * @its: The VGIC ITS structure.
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H A Dvgic-mmio-v3.c18 #include "vgic.h"
19 #include "vgic-mmio.h"
43 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_has_its()
71 return kvm->arch.vgic.nassgicap; in vgic_supports_direct_sgis()
84 struct vgic_dist *vgic = &vcpu->kvm->arch.vgic; in vgic_mmio_read_v3_misc() local
89 if (vgic->enabled) in vgic_mmio_read_v3_misc()
92 if (vgic->nassgireq) in vgic_mmio_read_v3_misc()
96 value = vgic->nr_spis + VGIC_NR_PRIVATE_IRQS; in vgic_mmio_read_v3_misc()
111 (vgic->implementation_rev << GICD_IIDR_REVISION_SHIFT) | in vgic_mmio_read_v3_misc()
125 struct vgic_dist *dist = &vcpu->kvm->arch.vgic; in vgic_mmio_write_v3_misc()
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H A Dvgic-mmio-v2.c14 #include "vgic.h"
15 #include "vgic-mmio.h"
28 struct vgic_dist *vgic = &vcpu->kvm->arch.vgic; in vgic_mmio_read_v2_misc() local
33 value = vgic->enabled ? GICD_ENABLE : 0; in vgic_mmio_read_v2_misc()
36 value = vgic->nr_spis + VGIC_NR_PRIVATE_IRQS; in vgic_mmio_read_v2_misc()
42 (vgic->implementation_rev << GICD_IIDR_REVISION_SHIFT) | in vgic_mmio_read_v2_misc()
56 struct vgic_dist *dist = &vcpu->kvm->arch.vgic; in vgic_mmio_write_v2_misc()
76 struct vgic_dist *dist = &vcpu->kvm->arch.vgic; in vgic_mmio_uaccess_write_v2_misc()
98 vcpu->kvm->arch.vgic.v2_groups_user_writable = true; in vgic_mmio_uaccess_write_v2_misc()
114 if (vcpu->kvm->arch.vgic.v2_groups_user_writable) in vgic_mmio_uaccess_write_v2_group()
H A Dvgic-mmio.c3 * VGIC MMIO handling functions
16 #include "vgic.h"
17 #include "vgic-mmio.h"
148 * while the interrupt was disabled at the VGIC level. in vgic_mmio_write_senable()
249 * Refer to Documentation/virt/kvm/devices/arm-vgic-v3.rst in __read_pending()
264 switch (vcpu->kvm->arch.vgic.vgic_model) { in __read_pending()
301 vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2); in is_vgic_v2_sgi()
380 * can happen is an additional vgic injection. We also clear in vgic_hw_irq_cpending()
467 * userspace accesses to the VGIC state already require all VCPUs to be
473 if ((vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3 && in vgic_access_active_prepare()
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H A Dvgic-v2.c12 #include "vgic-mmio.h"
13 #include "vgic.h"
321 * rising edges as input to the VGIC. We therefore lower the line in vgic_v2_populate_lr()
422 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_v2_map_resources()
428 kvm_debug("Need to set vgic cpu and dist addresses first\n"); in vgic_v2_map_resources()
433 kvm_debug("VGIC CPU and dist frames overlap\n"); in vgic_v2_map_resources()
438 * Initialize the vgic if this hasn't already been done on demand by in vgic_v2_map_resources()
439 * accessing the vgic state from userspace. in vgic_v2_map_resources()
443 kvm_err("Unable to initialize VGIC dynamic data structures\n"); in vgic_v2_map_resources()
462 kvm_err("Unable to remap VGIC CPU to VCPU\n"); in vgic_v2_map_resources()
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H A Dvgic-v4.c13 #include "vgic.h"
18 * The vgic-v4 layer acts as a bridge between several entities:
192 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_v4_configure_vsgis()
239 * vgic is initialized. In both cases, the number of vcpus
244 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_v4_init()
320 struct its_vm *its_vm = &kvm->arch.vgic.its_vm; in vgic_v4_teardown()
389 err = its_make_vpe_resident(vpe, false, vcpu->kvm->arch.vgic.enabled); in vgic_v4_load()
476 .vm = &kvm->arch.vgic.its_vm, in kvm_vgic_v4_set_forwarding()
520 xa_for_each(&kvm->arch.vgic.lpi_xa, idx, irq) { in __vgic_host_irq_get_vlpi()
H A Dvgic.c15 #include "vgic.h"
56 * Since the VGIC must support injecting virtual interrupts from ISRs, we have
68 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_get_lpi()
91 intid < (kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS)) { in vgic_get_irq()
92 intid = array_index_nospec(intid, kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS); in vgic_get_irq()
93 return &kvm->arch.vgic.spis[intid - VGIC_NR_PRIVATE_IRQS]; in vgic_get_irq()
143 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_put_irq()
165 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_release_deleted_lpis()
263 !irq->target_vcpu->kvm->arch.vgic.enabled)) in vgic_target_oracle()
388 kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3); in vgic_model_needs_bcst_kick()
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H A Dvgic-irqfd.c10 #include "vgic.h"
126 * as long as the damn vgic is initialized. in kvm_arch_set_irq_inatomic()
139 struct vgic_dist *dist = &kvm->arch.vgic; in kvm_vgic_setup_default_irq_routing()
H A Dvgic-its.c23 #include "vgic.h"
24 #include "vgic-mmio.h"
79 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_add_lpi()
283 u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser); in update_lpi_config()
344 * is targeting) to the VGIC's view, which deals with target VCPUs.
392 struct vgic_dist *dist = &vcpu->kvm->arch.vgic; in its_sync_lpi_pending_table()
1047 lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser)) in vgic_its_cmd_handle_mapi()
1297 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_its_invall()
1352 struct vgic_dist *dist = &kvm->arch.vgic; in vgic_its_cmd_handle_movall()
1881 dev->kvm->arch.vgic.msis_require_devid = true; in vgic_its_create()
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H A Dtrace.h33 #define TRACE_INCLUDE_PATH ../../arch/arm64/kvm/vgic
/linux/Documentation/virt/kvm/devices/
H A Darm-vgic.rst4 ARM Virtual Generic Interrupt Controller v2 (VGIC)
11 Only one VGIC instance may be instantiated through either this API or the
12 legacy KVM_CREATE_IRQCHIP API. The created VGIC will act as the VM interrupt
14 VGIC instead of directly to CPUs.
18 device and guest ITS devices, see arm-vgic-v3.txt. It is not possible to
146 request the initialization of the VGIC or ITS, no additional parameter
152 -ENXIO VGIC not properly configured as required prior to calling
155 -ENOMEM memory shortage when allocating vgic internal data
H A Dindex.rst10 arm-vgic-its
11 arm-vgic
12 arm-vgic-v3
H A Darm-vgic-v3.rst11 Only one VGIC instance may be instantiated through this API. The created VGIC
13 to inject interrupts to the VGIC instead of directly to CPUs. It is not
112 VGIC's internal state.
127 initialization of the VGIC:
141 without an active state. At VGIC creation the field resets to the
305 request the initialization of the VGIC, no additional parameter in
315 -ENXIO VGIC not properly configured as required prior to calling
318 -ENOMEM memory shortage when allocating vgic internal data
375 The vINTID specifies which interrupt is generated when the vGIC
/linux/arch/arm64/kvm/hyp/vhe/
H A DMakefile12 obj-y += ../vgic-v3-sr.o ../aarch32.o ../vgic-v2-cpuif-proxy.o ../entry.o \
/linux/include/linux/irqchip/
H A Darm-gic-common.h10 #include <linux/irqchip/arm-vgic-info.h>
H A Darm-vgic-info.h3 * include/linux/irqchip/arm-vgic-info.h
/linux/tools/testing/selftests/kvm/arm64/
H A Dvgic_init.c3 * vgic init sequence tests
17 #include "vgic.h"
332 * VGIC KVM device is created and initialized before the secondary CPUs
355 /* All the VCPUs are created before the VGIC KVM device gets initialized */
433 TEST_ASSERT(ret == -EBUSY, "running without vgic explicit init"); in test_v3_new_redist_regions()
712 "Changed nASSGIcap after initializing the VGIC"); in test_v3_nassgicap()
/linux/arch/arm64/boot/dts/intel/
H A Dkeembay-soc.dtsi59 /* VGIC maintenance interrupt */
/linux/drivers/irqchip/
H A Dirq-apple-aic.c53 #include <linux/irqchip/arm-vgic-info.h>
407 * vGIC maintenance interrupts end up here too, so we need to check in aic_handle_irq()
421 pr_err_ratelimited("vGIC IRQ fired and not handled by KVM (MISR=%llx), disabling.\n", in aic_handle_irq()
860 /* vGIC maintenance IRQ */ in aic_init_cpu()

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