/freebsd/sys/arm/arm/ |
H A D | vfp.c | 69 * We should need simply .fpu vfpv3, but clang 3.5 has a quirk where setting 70 * vfpv3 doesn't imply that vfp2 features are also available -- both have to be 77 * syntax such as .push fpu=vfpv3; ...; .pop fpu; and that would be ideal for 85 __asm __volatile(" .fpu vfpv2\n .fpu vfpv3\n" \ 90 __asm __volatile(" .fpu vfpv2\n .fpu vfpv3\n" \ 308 /* On vfpv3 we may need to restore FPINST and FPINST2 */ in vfp_restore() 319 " .fpu vfpv3\n" in vfp_restore() 345 /* On vfpv3 we may need to save FPINST and FPINST2 */ in vfp_store() 355 " .fpu vfpv3\n" in vfp_store()
|
/freebsd/contrib/llvm-project/llvm/lib/TargetParser/ |
H A D | ARMTargetParser.cpp | 174 {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None}, in getFPUFeatures() 175 {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16}, in getFPUFeatures() 176 {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16}, in getFPUFeatures() 177 {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None}, in getFPUFeatures() 189 {"+d32", "-d32", FPUVersion::VFPV3, FPURestriction::None}, in getFPUFeatures() 238 .Case("vfp3", "vfpv3") in getFPUSynonym() 240 .Case("vfp3-d16", "vfpv3-d16") in getFPUSynonym() 246 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3. in getFPUSynonym() 247 .Case("neon-vfpv3", "neon") in getFPUSynonym()
|
H A D | Host.cpp | 1973 .Case("vfpv3", "vfp3") in getHostCPUFeatures()
|
/freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/ |
H A D | ARMTargetParser.def | 26 ARM_FPU("vfpv3", FK_VFPV3, FPUVersion::VFPV3, NeonSupportLevel::None, 28 ARM_FPU("vfpv3-fp16", FK_VFPV3_FP16, FPUVersion::VFPV3_FP16, 30 ARM_FPU("vfpv3-d16", FK_VFPV3_D16, FPUVersion::VFPV3, NeonSupportLevel::None, 32 ARM_FPU("vfpv3-d16-fp16", FK_VFPV3_D16_FP16, FPUVersion::VFPV3_FP16, 34 ARM_FPU("vfpv3xd", FK_VFPV3XD, FPUVersion::VFPV3, NeonSupportLevel::None, 55 ARM_FPU("neon", FK_NEON, FPUVersion::VFPV3, NeonSupportLevel::Neon,
|
H A D | ARMTargetParser.h | 132 VFPV3, enumerator
|
/freebsd/sys/contrib/libsodium/dist-build/ |
H A D | android-armv7-a.sh | 3 export CFLAGS="-Os -mfloat-abi=softfp -mfpu=vfpv3-d16 -mthumb -marm -march=${TARGET_ARCH}"
|
/freebsd/contrib/llvm-project/llvm/lib/Support/ |
H A D | ARMAttributeParser.cpp | 127 "Not Permitted", "VFPv1", "VFPv2", "VFPv3", "VFPv3-D16", in FP_arch() 322 static const char *strings[] = {"Not Permitted", "IEEE-754", "VFPv3"}; in ABI_FP_16bit_format()
|
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM64/ |
H A D | EmulateInstructionARM64.cpp | 64 #define VFPv3 (1u << 3) macro 67 #define VFPv1_ABOVE (VFPv1 | VFPv2 | VFPv3 | AdvancedSIMD) 68 #define VFPv2_ABOVE (VFPv2 | VFPv3 | AdvancedSIMD) 69 #define VFPv2v3 (VFPv2 | VFPv3)
|
/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
H A D | RegisterContextDarwin_arm.h | 112 // struct VFPv3
|
/freebsd/contrib/llvm-project/libunwind/src/ |
H A D | UnwindRegistersRestore.S | 757 .fpu vfpv3-d16 778 .fpu vfpv3-d16 792 .fpu vfpv3
|
H A D | UnwindRegistersSave.S | 830 .fpu vfpv3-d16 844 .fpu vfpv3-d16 858 .fpu vfpv3
|
H A D | Registers.hpp | 2112 /// NOTE: Assumes VFPv3. On ARM processors without a floating point unit, 2205 // Whether VFPv3 D16-D31 are saved. 2209 // VFPv3 registers D16-D31, always saved using FSTMD
|
/freebsd/sys/contrib/device-tree/Bindings/remoteproc/ |
H A D | xlnx,zynqmp-r5fss.yaml | 17 floating-point unit that implements the Arm VFPv3 instruction set.
|
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMTargetStreamer.cpp | 223 * neon/neon-fp-armv8/neon-vfpv4/vfpv3/vfpv2 for .fpu parameters */ in emitTargetAttributes()
|
/freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/ |
H A D | CodeViewRegisters.def | 437 // ARM VFPv3/NEON registers
|
/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/ |
H A D | ARM.cpp | 528 // "+vfpv2" and "+vfpv3" or having "+neon" and "-fp64". in handleTargetFeatures() 1389 // 31: VFPv3 40: VFPv4 in getVisualStudioDefines()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMFeatures.td | 53 // True if subtarget has the full 32 double precision FP registers for VFPv3.
|
H A D | ARMAsmPrinter.cpp | 704 // In VFPv4, VFPv4U, VFPv3, or VFPv3U, it is preserved. That is, in emitAttributes()
|
/freebsd/sys/arm64/arm64/ |
H A D | identcpu.c | 2079 MRS_FIELD_VALUE(MVFR0_FPDP_VFP_v3_v4, "DP VFPv3+v4"), 2092 MRS_FIELD_VALUE(MVFR0_FPSP_VFP_v3_v4, "SP VFPv3+v4"),
|
/freebsd/contrib/elftoolchain/readelf/ |
H A D | readelf.c | 1501 case 3: return "VFPv3"; in aeabi_fp_arch() 1502 case 4: return "VFPv3-D16"; in aeabi_fp_arch() 1789 case 2: return "VFPv3/Advanced SIMD (alternative format)"; in aeabi_fp_16bit_format()
|
/freebsd/crypto/libecc/ |
H A D | README.md | 1312 …x-gnueabihf-gcc EXTRA_CFLAGS="-Wall -Wextra -O3 -g3 -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -…
|
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 697 #define VFPv3 (1u << 3) macro 700 #define VFPv1_ABOVE (VFPv1 | VFPv2 | VFPv3 | AdvancedSIMD) 701 #define VFPv2_ABOVE (VFPv2 | VFPv3 | AdvancedSIMD) 702 #define VFPv2v3 (VFPv2 | VFPv3)
|