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/linux/tools/perf/pmu-events/arch/nds32/n13/
H A Datcpmu.json6 "BriefDescription": "V3 Conditional branch"
12 "BriefDescription": "V3 Taken Conditional branch"
18 "BriefDescription": "V3 Prefetch Instruction"
24 "BriefDescription": "V3 RET Inst"
30 "BriefDescription": "V3 JR(non-RET) instructions"
36 "BriefDescription": "V3 JAL/JRAL instructions"
42 "BriefDescription": "V3 NOP instructions"
48 "BriefDescription": "V3 SCW instructions"
54 "BriefDescription": "V3 ISB/DSB instructions"
60 "BriefDescription": "V3 CCTL instructions"
[all …]
/linux/drivers/pci/controller/
H A Dpci-v3-semi.c3 * Support for V3 Semiconductor PCI Local Bus to PCI Bridge
249 * The V3 PCI interface chip in Integrator provides several windows from
262 * There are three V3 windows, each described by a pair of V3 registers.
289 * The V3 chip translates an address by checking its range within
293 * LB_BASE1/LB_MAP1, the V3 will use the translation from
313 struct v3_pci *v3 = bus->sysdata; in v3_map_bus() local
365 writel(v3_addr_to_lb_base(v3->non_pre_mem) | in v3_map_bus()
367 v3->base + V3_LB_BASE0); in v3_map_bus()
373 writel(v3_addr_to_lb_base(v3->config_mem) | in v3_map_bus()
375 v3->base + V3_LB_BASE1); in v3_map_bus()
[all …]
/linux/include/uapi/linux/
H A Dnfs.h47 NFS_OK = 0, /* v2 v3 v4 */
48 NFSERR_PERM = 1, /* v2 v3 v4 */
49 NFSERR_NOENT = 2, /* v2 v3 v4 */
50 NFSERR_IO = 5, /* v2 v3 v4 */
51 NFSERR_NXIO = 6, /* v2 v3 v4 */
52 NFSERR_ACCES = 13, /* v2 v3 v4 */
53 NFSERR_EXIST = 17, /* v2 v3 v4 */
54 NFSERR_XDEV = 18, /* v3 v4 */
55 NFSERR_NODEV = 19, /* v2 v3 v4 */
56 NFSERR_NOTDIR = 20, /* v2 v3 v4 */
[all …]
/linux/arch/s390/include/asm/
H A Dfpu-insn-asm.h103 .ifc \vxr,%v3
204 * @v3: Vector register designated operand whose MSB is stored in
211 * Note: In most vector instruction formats [1] V1, V2, V3, and V4 directly
212 * correspond to @v1, @v2, @v3, and @v4. But there are exceptions, such as but
219 .macro RXB rxb v1 v2=0 v3=0 v4=0
227 .if \v3 & 0x10
240 * @v3: Third vector register designated operand (for RXB)
243 * Note: For @v1, @v2, @v3, and @v4 also refer to the RXB macro
246 .macro MRXB m v1 v2=0 v3=0 v4=0
248 RXB rxb, \v1, \v2, \v3, \v4
[all …]
/linux/lib/
H A Dsiphash.c20 #define SIPROUND SIPHASH_PERMUTATION(v0, v1, v2, v3)
26 u64 v3 = SIPHASH_CONST_3; \
28 v3 ^= key->key[1]; \
34 v3 ^= b; \
43 return (v0 ^ v1) ^ (v2 ^ v3);
54 v3 ^= m; in __siphash_aligned()
87 v3 ^= m; in __siphash_unaligned()
119 v3 ^= first; in siphash_1u64()
136 v3 ^= first; in siphash_2u64()
140 v3 ^= second; in siphash_2u64()
[all …]
H A Dxxhash.c97 uint32_t v3 = seed + 0; in xxh32() local
105 v3 = xxh32_round(v3, get_unaligned_le32(p)); in xxh32()
112 xxh_rotl32(v3, 12) + xxh_rotl32(v4, 18); in xxh32()
167 uint64_t v3 = seed + 0; in xxh64() local
175 v3 = xxh64_round(v3, get_unaligned_le64(p)); in xxh64()
182 xxh_rotl64(v3, 12) + xxh_rotl64(v4, 18); in xxh64()
185 h64 = xxh64_merge_round(h64, v3); in xxh64()
235 state.v3 = seed + 0; in xxh64_reset()
267 state->v3 = xxh64_round(state->v3, get_unaligned_le64(p64)); in xxh64_update()
279 uint64_t v3 = state->v3; in xxh64_update() local
[all …]
/linux/arch/arm64/crypto/
H A Dsm4-ce-core.S64 sm4ekey v3.4s, v2.4s, v27.4s;
65 sm4ekey v4.4s, v3.4s, v28.4s;
73 st1 {v0.16b-v3.16b}, [x1], #64;
80 tbl v20.16b, {v3.16b}, v24.16b
121 ld1 {v0.16b-v3.16b}, [x2], #64;
124 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7);
126 st1 {v0.16b-v3.16b}, [x1], #64;
139 ld1 {v0.16b-v3.16b}, [x2], #64;
140 SM4_CRYPT_BLK4(v0, v1, v2, v3);
141 st1 {v0.16b-v3.16b}, [x1], #64;
[all …]
H A Dsm4-neon-core.S273 ld4 {v0.4s-v3.4s}, [x2], #64
276 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7)
278 st1 {v0.16b-v3.16b}, [x1], #64
291 ld4 {v0.4s-v3.4s}, [x2], #64
293 SM4_CRYPT_BLK4(v0, v1, v2, v3)
295 st1 {v0.16b-v3.16b}, [x1], #64
308 transpose_4x4(v0, v1, v2, v3)
310 SM4_CRYPT_BLK4(v0, v1, v2, v3)
340 ld4 {v0.4s-v3.4s}, [x2], #64
343 SM4_CRYPT_BLK8_norotate(v0, v1, v2, v3, v4, v5, v6, v7)
[all …]
H A Dsm4-ce-gcm-core.S236 /* can be the same as input v0-v3 */
240 #define RR7 v3
322 ld1 {v0.16b-v3.16b}, [x2], #64
327 rbit v3.16b, v3.16b
340 RR6, RR7, v3, RH1, RTMP6, RTMP7)
413 inc32_le128(v3) /* +3 */
417 SM4_CRYPT_BLK4(v0, v1, v2, v3)
422 eor v3.16b, v3.16b, RTMP3.16b
423 st1 {v0.16b-v3.16b}, [x1], #64
430 rbit v3.16b, v3.16b
[all …]
H A Daes-neonbs-core.S408 cmtst v3.16b, v7.16b, v11.16b
442 eor v13.16b, v3.16b, v9.16b
445 tbl v3.16b, {v13.16b}, v8.16b
454 bitslice v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11
460 shift_rows v0, v1, v2, v3, v4, v5, v6, v7, v24
462 sbox v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11, v12, \
469 mix_cols v0, v1, v4, v6, v3, v7, v2, v5, v8, v9, v10, v11, v12, \
472 add_round_key v0, v1, v2, v3, v4, v5, v6, v7
481 bitslice v0, v1, v4, v6, v3, v7, v2, v5, v8, v9, v10, v11
487 eor v3.16b, v3.16b, v12.16b
[all …]
/linux/include/pcmcia/
H A Ddevice_id.h34 #define PCMCIA_DEVICE_PROD_ID3(v3, vh3) { \ argument
36 .prod_id = { NULL, NULL, (v3), NULL }, \
45 #define PCMCIA_DEVICE_PROD_ID13(v1, v3, vh1, vh3) { \ argument
48 .prod_id = { (v1), NULL, (v3), NULL }, \
57 #define PCMCIA_DEVICE_PROD_ID123(v1, v2, v3, vh1, vh2, vh3) { \ argument
61 .prod_id = { (v1), (v2), (v3), NULL },\
71 #define PCMCIA_DEVICE_PROD_ID134(v1, v3, v4, vh1, vh3, vh4) { \ argument
75 .prod_id = { (v1), NULL, (v3), (v4) }, \
78 #define PCMCIA_DEVICE_PROD_ID1234(v1, v2, v3, v4, vh1, vh2, vh3, vh4) { \ argument
83 .prod_id = { (v1), (v2), (v3), (v4) }, \
[all …]
/linux/Documentation/devicetree/bindings/hwmon/
H A Dltc2990.txt15 2: V1-V2, V3, V4
16 3: TR1, V3, V4
17 4: TR1, V3-V4
19 6: V1-V2, V3-V4
20 7: V1, V2, V3, V4
27 2: TR2, V3 or V3-V4 only per mode
35 lltc,meas-mode = <7 3>; /* V1, V2, V3, V4 */
/linux/drivers/gpu/drm/amd/amdgpu/
H A Datombios_crtc.c237 ENABLE_SPREAD_SPECTRUM_ON_PPLL_V3 v3; member
277 args.v3.usSpreadSpectrumAmountFrac = cpu_to_le16(0); in amdgpu_atombios_crtc_program_ss()
278 args.v3.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; in amdgpu_atombios_crtc_program_ss()
281 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P1PLL; in amdgpu_atombios_crtc_program_ss()
284 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P2PLL; in amdgpu_atombios_crtc_program_ss()
287 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_DCPLL; in amdgpu_atombios_crtc_program_ss()
292 args.v3.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); in amdgpu_atombios_crtc_program_ss()
293 args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step); in amdgpu_atombios_crtc_program_ss()
294 args.v3.ucEnable = enable; in amdgpu_atombios_crtc_program_ss()
301 ADJUST_DISPLAY_PLL_PS_ALLOCATION_V3 v3; member
[all …]
H A Datombios_encoders.c554 DIG_ENCODER_CONTROL_PARAMETERS_V3 v3; member
601 args.v3.ucPanelMode = panel_mode; in amdgpu_atombios_encoder_setup_dig_encoder()
633 args.v3.ucAction = action; in amdgpu_atombios_encoder_setup_dig_encoder()
634 args.v3.usPixelClock = cpu_to_le16(amdgpu_encoder->pixel_clock / 10); in amdgpu_atombios_encoder_setup_dig_encoder()
636 args.v3.ucPanelMode = panel_mode; in amdgpu_atombios_encoder_setup_dig_encoder()
638 args.v3.ucEncoderMode = amdgpu_atombios_encoder_get_encoder_mode(encoder); in amdgpu_atombios_encoder_setup_dig_encoder()
640 if (ENCODER_MODE_IS_DP(args.v3.ucEncoderMode)) in amdgpu_atombios_encoder_setup_dig_encoder()
641 args.v3.ucLaneNum = dp_lane_count; in amdgpu_atombios_encoder_setup_dig_encoder()
643 args.v3.ucLaneNum = 8; in amdgpu_atombios_encoder_setup_dig_encoder()
645 args.v3.ucLaneNum = 4; in amdgpu_atombios_encoder_setup_dig_encoder()
[all …]
/linux/lib/raid6/
H A Drvv.c38 /* v0:wp0, v1:wq0, v2:wd0/w20, v3:w10 */ in raid6_rvv1_gen_syndrome_real()
63 "vsll.vi v3, v1, 1\n" in raid6_rvv1_gen_syndrome_real()
65 "vxor.vv v3, v3, v2\n" in raid6_rvv1_gen_syndrome_real()
67 "vxor.vv v1, v3, v2\n" in raid6_rvv1_gen_syndrome_real()
113 /* v0:wp0, v1:wq0, v2:wd0/w20, v3:w10 */ in raid6_rvv1_xor_syndrome_real()
139 "vsll.vi v3, v1, 1\n" in raid6_rvv1_xor_syndrome_real()
141 "vxor.vv v3, v3, v2\n" in raid6_rvv1_xor_syndrome_real()
143 "vxor.vv v1, v3, v2\n" in raid6_rvv1_xor_syndrome_real()
163 "vsll.vi v3, v1, 1\n" in raid6_rvv1_xor_syndrome_real()
165 "vxor.vv v1, v3, v2\n" in raid6_rvv1_xor_syndrome_real()
[all …]
/linux/Documentation/hwmon/
H A Dpeci-dimmtemp.rst8 * Intel Xeon E5/E7 v3 server processors
9 Intel Xeon E5-14xx v3 family
10 Intel Xeon E5-24xx v3 family
11 Intel Xeon E5-16xx v3 family
12 Intel Xeon E5-26xx v3 family
13 Intel Xeon E5-46xx v3 family
14 Intel Xeon E7-48xx v3 family
15 Intel Xeon E7-88xx v3 family
H A Dpeci-cputemp.rst8 * Intel Xeon E5/E7 v3 server processors
9 Intel Xeon E5-14xx v3 family
10 Intel Xeon E5-24xx v3 family
11 Intel Xeon E5-16xx v3 family
12 Intel Xeon E5-26xx v3 family
13 Intel Xeon E5-46xx v3 family
14 Intel Xeon E7-48xx v3 family
15 Intel Xeon E7-88xx v3 family
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_standalone_libraries/
H A Dlib_float_math.c69 double math_max3(double v1, double v2, double v3) in math_max3() argument
71 return v3 > math_max2(v1, v2) ? v3 : math_max2(v1, v2); in math_max3()
74 double math_max4(double v1, double v2, double v3, double v4) in math_max4() argument
76 return v4 > math_max3(v1, v2, v3) ? v4 : math_max3(v1, v2, v3); in math_max4()
79 double math_max5(double v1, double v2, double v3, double v4, double v5) in math_max5() argument
81 return math_max3(v1, v2, v3) > math_max2(v4, v5) ? math_max3(v1, v2, v3) : math_max2(v4, v5); in math_max5()
/linux/tools/testing/selftests/bpf/progs/
H A Dtest_siphash.h26 #define SIPROUND SIPHASH_PERMUTATION(v0, v1, v2, v3)
32 u64 v3 = SIPHASH_CONST_3; \
34 v3 ^= key->key[1]; \
40 v3 ^= b; \
49 return (v0 ^ v1) ^ (v2 ^ v3);
54 v3 ^= first; in siphash_2u64()
58 v3 ^= second; in siphash_2u64()
/linux/arch/arm64/boot/dts/freescale/
H A Dqoriq-fman3-0.dtsi3 * QorIQ FMan v3 device tree
33 compatible = "fsl,fman-v3-port-oh";
39 compatible = "fsl,fman-v3-port-oh";
45 compatible = "fsl,fman-v3-port-oh";
51 compatible = "fsl,fman-v3-port-oh";
57 compatible = "fsl,fman-v3-port-oh";
63 compatible = "fsl,fman-v3-port-oh";
/linux/lib/crc/powerpc/
H A Dcrc-vpmsum-template.S160 vxor v3,v3,v3
274 vxor v3,v3,v11
325 vxor v3,v3,v11
350 vxor v3,v3,v11
366 vsldoi v3,v3,zeroes,4
396 vxor v19,v3,v11
425 lvx v3,off48,r3
435 VPMSUMW(v3,v19,v3)
495 vxor v2,v2,v3
641 lvx v3,off48,r4
[all …]
/linux/drivers/net/ipa/
H A Dipa_reg.h69 IPA_TX_CFG, /* IPA v3.5+ */
70 FLAVOR_0, /* IPA v3.5+ */
71 IDLE_INDICATION_CFG, /* IPA v3.5+ */
77 SRC_RSRC_GRP_45_RSRC_TYPE, /* Not IPA v3.5+; IPA v4.5, IPA v5.0 */
78 SRC_RSRC_GRP_67_RSRC_TYPE, /* Not IPA v3.5+; IPA v5.0 */
81 DST_RSRC_GRP_45_RSRC_TYPE, /* Not IPA v3.5+; IPA v4.5, IPA v5.0 */
82 DST_RSRC_GRP_67_RSRC_TYPE, /* Not IPA v3.5+; IPA v5.0 */
106 IRQ_SUSPEND_EN, /* IPA v3.1+ */
107 IRQ_SUSPEND_CLR, /* IPA v3.1+ */
160 NTF_TX_CMDQS, /* IPA v3.5+ */
[all …]
/linux/Documentation/devicetree/bindings/mmc/
H A Dnvidia,tegra20-sdhci.yaml122 nvidia,pad-autocal-pull-down-offset-3v3:
127 nvidia,pad-autocal-pull-down-offset-3v3-timeout:
150 nvidia,pad-autocal-pull-up-offset-3v3:
162 nvidia,pad-autocal-pull-up-offset-3v3-timeout:
228 - const: sdmmc-3v3
232 - const: sdmmc-3v3-drv
237 - const: sdmmc-3v3-drv
257 - const: sdmmc-3v3
296 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
297 "sdmmc-3v3-drv", "sdmmc-1v8-drv";
[all …]
/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.h70 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
74 FN(reg, f3), v3)
76 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
80 FN(reg, f3), v3, \
97 #define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \ argument
101 FN(reg, f3), v3)
103 #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
107 FN(reg, f3), v3, \
/linux/arch/powerpc/boot/dts/fsl/
H A Dqoriq-fman3-1.dtsi2 * QorIQ FMan v3 device tree stub [ controller @ offset 0x500000 ]
55 compatible = "fsl,fman-v3-port-oh";
61 compatible = "fsl,fman-v3-port-oh";
67 compatible = "fsl,fman-v3-port-oh";
73 compatible = "fsl,fman-v3-port-oh";
79 compatible = "fsl,fman-v3-port-oh";
85 compatible = "fsl,fman-v3-port-oh";

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