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/linux/net/ceph/
H A Dmessenger_v2.c114 iov_iter_is_discard(&con->v2.in_iter) ? "discard" : "need", in ceph_tcp_recv()
115 iov_iter_count(&con->v2.in_iter)); in ceph_tcp_recv()
116 ret = do_recvmsg(con->sock, &con->v2.in_iter); in ceph_tcp_recv()
118 iov_iter_count(&con->v2.in_iter)); in ceph_tcp_recv()
201 iov_iter_count(&con->v2.out_iter), con->v2.out_iter_sendpage); in ceph_tcp_send()
202 if (con->v2.out_iter_sendpage) in ceph_tcp_send()
203 ret = do_try_sendpage(con->sock, &con->v2.out_iter); in ceph_tcp_send()
205 ret = do_sendmsg(con->sock, &con->v2.out_iter); in ceph_tcp_send()
207 iov_iter_count(&con->v2.out_iter)); in ceph_tcp_send()
213 BUG_ON(con->v2.in_kvec_cnt >= ARRAY_SIZE(con->v2.in_kvecs)); in add_in_kvec()
[all …]
/linux/tools/testing/selftests/powerpc/math/
H A Dvmx_asm.S9 # Should be safe from C, only touches r4, r5 and v0,v1,v2
17 vmr v2,v1
22 vand v2,v2,v1
27 vand v2,v2,v1
32 vand v2,v2,v1
37 vand v2,v2,v1
42 vand v2,v2,v1
47 vand v2,v2,v1
52 vand v2,v2,v1
57 vand v2,v2,v1
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/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dreg_helper.h67 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ argument
70 FN(reg, f2), v2)
72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
75 FN(reg, f2), v2,\
78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
81 FN(reg, f2), v2,\
85 #define REG_SET_5(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
89 FN(reg, f2), v2,\
94 #define REG_SET_6(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \ argument
98 FN(reg, f2), v2,\
[all …]
/linux/arch/loongarch/lib/
H A Dxor_template.c18 const unsigned long * __restrict v2)
25 LD_AND_XOR_LINE(v2)
27 : : [v1] "r"(v1), [v2] "r"(v2) : "memory"
31 v2 += LINE_WIDTH / sizeof(unsigned long);
37 const unsigned long * __restrict v2,
45 LD_AND_XOR_LINE(v2)
48 : : [v1] "r"(v1), [v2] "r"(v2), [v3] "r"(v3) : "memory"
52 v2 += LINE_WIDTH / sizeof(unsigned long);
59 const unsigned long * __restrict v2,
68 LD_AND_XOR_LINE(v2)
[all …]
/linux/arch/s390/include/asm/
H A Dfpu-insn-asm.h100 .ifc \vxr,%v2
201 * @v2: Vector register designated operand whose MSB is stored in
211 * Note: In most vector instruction formats [1] V1, V2, V3, and V4 directly
212 * correspond to @v1, @v2, @v3, and @v4. But there are exceptions, such as but
219 .macro RXB rxb v1 v2=0 v3=0 v4=0
224 .if \v2 & 0x10
239 * @v2: Second vector register designated operand (for RXB)
243 * Note: For @v1, @v2, @v3, and @v4 also refer to the RXB macro
246 .macro MRXB m v1 v2=0 v3=0 v4=0
248 RXB rxb, \v1, \v2, \v3, \v4
[all …]
H A Dfpu-insn.h146 static __always_inline void fpu_vab(u8 v1, u8 v2, u8 v3) in fpu_vab() argument
148 asm volatile("VAB %[v1],%[v2],%[v3]" in fpu_vab()
150 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vab()
154 static __always_inline void fpu_vcksm(u8 v1, u8 v2, u8 v3) in fpu_vcksm() argument
156 asm volatile("VCKSM %[v1],%[v2],%[v3]" in fpu_vcksm()
158 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vcksm()
162 static __always_inline void fpu_vesravb(u8 v1, u8 v2, u8 v3) in fpu_vesravb() argument
164 asm volatile("VESRAVB %[v1],%[v2],%[v3]" in fpu_vesravb()
166 : [v1] "I" (v1), [v2] "I" (v2), [v3] "I" (v3) in fpu_vesravb()
170 static __always_inline void fpu_vgfmag(u8 v1, u8 v2, u8 v3, u8 v4) in fpu_vgfmag() argument
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/linux/arch/powerpc/lib/
H A Dxor_vmx.c44 #define XOR(V1, V2) \ argument
46 V1##_0 = vec_xor(V1##_0, V2##_0); \
47 V1##_1 = vec_xor(V1##_1, V2##_1); \
48 V1##_2 = vec_xor(V1##_2, V2##_2); \
49 V1##_3 = vec_xor(V1##_3, V2##_3); \
57 DEFINE(v2); in __xor_altivec_2()
62 LOAD(v2); in __xor_altivec_2()
63 XOR(v1, v2); in __xor_altivec_2()
67 v2 += 4; in __xor_altivec_2()
77 DEFINE(v2); in __xor_altivec_3()
[all …]
/linux/include/uapi/linux/
H A Dnfs.h43 * Error codes that have a `--' in the v2 column are not part of the
47 NFS_OK = 0, /* v2 v3 v4 */
48 NFSERR_PERM = 1, /* v2 v3 v4 */
49 NFSERR_NOENT = 2, /* v2 v3 v4 */
50 NFSERR_IO = 5, /* v2 v3 v4 */
51 NFSERR_NXIO = 6, /* v2 v3 v4 */
52 NFSERR_EAGAIN = 11, /* v2 v3 */
53 NFSERR_ACCES = 13, /* v2 v3 v4 */
54 NFSERR_EXIST = 17, /* v2 v3 v4 */
56 NFSERR_NODEV = 19, /* v2 v3 v4 */
[all …]
/linux/Documentation/arch/powerpc/
H A Disa-versions.rst14 Power8 Power ISA v2.07
15 e6500 Power ISA v2.06 with some exceptions
16 e5500 Power ISA v2.06 with some exceptions, no Altivec
17 Power7 Power ISA v2.06
18 Power6 Power ISA v2.05
19 PA6T Power ISA v2.04
20 Cell PPU - Power ISA v2.02 with some minor exceptions
22 Power5++ Power ISA v2.04 (no VMX)
23 Power5+ Power ISA v2.03
24 Power5 - PowerPC User Instruction Set Architecture Book I v2.02
[all …]
/linux/include/pcmcia/
H A Ddevice_id.h29 #define PCMCIA_DEVICE_PROD_ID2(v2, vh2) { \ argument
31 .prod_id = { NULL, (v2), NULL, NULL }, \
39 #define PCMCIA_DEVICE_PROD_ID12(v1, v2, vh1, vh2) { \ argument
42 .prod_id = { (v1), (v2), NULL, NULL }, \
57 #define PCMCIA_DEVICE_PROD_ID123(v1, v2, v3, vh1, vh2, vh3) { \ argument
61 .prod_id = { (v1), (v2), (v3), NULL },\
64 #define PCMCIA_DEVICE_PROD_ID124(v1, v2, v4, vh1, vh2, vh4) { \ argument
68 .prod_id = { (v1), (v2), NULL, (v4) }, \
78 #define PCMCIA_DEVICE_PROD_ID1234(v1, v2, v3, v4, vh1, vh2, vh3, vh4) { \ argument
83 .prod_id = { (v1), (v2), (v3), (v4) }, \
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/linux/arch/arm64/lib/
H A Dxor-neon.c19 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_2() local
26 v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); in xor_arm64_neon_2()
32 vst1q_u64(dp1 + 4, v2); in xor_arm64_neon_2()
48 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_3() local
55 v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); in xor_arm64_neon_3()
61 v2 = veorq_u64(v2, vld1q_u64(dp3 + 4)); in xor_arm64_neon_3()
67 vst1q_u64(dp1 + 4, v2); in xor_arm64_neon_3()
86 register uint64x2_t v0, v1, v2, v3; in xor_arm64_neon_4() local
93 v2 = veorq_u64(vld1q_u64(dp1 + 4), vld1q_u64(dp2 + 4)); in xor_arm64_neon_4()
99 v2 = veorq_u64(v2, vld1q_u64(dp3 + 4)); in xor_arm64_neon_4()
[all …]
/linux/Documentation/userspace-api/gpio/
H A Dchardev.rst7 This is latest version (v2) of the character device API, as defined in
28 The API is based around two major objects, the :ref:`gpio-v2-chip` and the
29 :ref:`gpio-v2-line-request`.
31 .. _gpio-v2-chip:
43 Lines are requested from the chip using gpio-v2-get-line-ioctl.rst
58 Get Line <gpio-v2-get-line-ioctl>
60 Get Line Info <gpio-v2-get-lineinfo-ioctl>
61 Watch Line Info <gpio-v2-get-lineinfo-watch-ioctl>
63 Read Line Info Changed Events <gpio-v2-lineinfo-changed-read>
65 .. _gpio-v2-line-request:
[all …]
/linux/drivers/char/mwave/
H A Dmwavedd.h84 #define PRINTK_3(f,s,v1,v2) \ argument
86 printk(s,v1,v2); \
89 #define PRINTK_4(f,s,v1,v2,v3) \ argument
91 printk(s,v1,v2,v3); \
94 #define PRINTK_5(f,s,v1,v2,v3,v4) \ argument
96 printk(s,v1,v2,v3,v4); \
99 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \ argument
101 printk(s,v1,v2,v3,v4,v5); \
104 #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) \ argument
106 printk(s,v1,v2,v3,v4,v5,v6); \
[all …]
/linux/drivers/hid/
H A Dhid-uclogic-rdesc.h119 /* Report ID for v2 pen reports */
122 /* Fixed report descriptor template for (tweaked) v2 pen reports */
133 /* Report ID for tweaked v2 frame button reports */
136 /* Fixed report descriptor for (tweaked) v2 frame button reports */
140 /* Report ID for tweaked v2 frame touch ring/strip reports */
143 /* Fixed report descriptor for (tweaked) v2 frame touch ring reports */
147 /* Fixed report descriptor for (tweaked) v2 frame touch strip reports */
151 /* Device ID byte offset in v2 frame touch ring/strip reports */
154 /* Report ID for tweaked v2 frame dial reports */
157 /* Fixed report descriptor for (tweaked) v2 frame dial reports */
[all …]
/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2.yaml4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml#
13 - $ref: opp-v2-base.yaml#
17 const: operating-points-v2
39 operating-points-v2 = <&cpu0_opp_table0>;
50 operating-points-v2 = <&cpu0_opp_table0>;
55 compatible = "operating-points-v2";
96 operating-points-v2 = <&cpu_opp_table>;
107 operating-points-v2 = <&cpu_opp_table>;
118 operating-points-v2 = <&cpu_opp_table>;
129 operating-points-v2 = <&cpu_opp_table>;
[all …]
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433-bus.dtsi14 operating-points-v2 = <&bus_g2d_400_opp_table>;
22 operating-points-v2 = <&bus_g2d_266_opp_table>;
30 operating-points-v2 = <&bus_gscl_opp_table>;
38 operating-points-v2 = <&bus_hevc_opp_table>;
46 operating-points-v2 = <&bus_g2d_400_opp_table>;
54 operating-points-v2 = <&bus_g2d_400_opp_table>;
62 operating-points-v2 = <&bus_g2d_400_opp_table>;
70 operating-points-v2 = <&bus_hevc_opp_table>;
78 operating-points-v2 = <&bus_hevc_opp_table>;
86 operating-points-v2 = <&bus_noc2_opp_table>;
[all …]
/linux/arch/arm64/crypto/
H A Dsm4-ce-core.S63 sm4ekey v2.4s, v1.4s, v26.4s;
64 sm4ekey v3.4s, v2.4s, v27.4s;
81 tbl v21.16b, {v2.16b}, v24.16b
124 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7);
140 SM4_CRYPT_BLK4(v0, v1, v2, v3);
183 eor v2.16b, v2.16b, v1.16b
184 SM4_CRYPT_BLK(v2)
185 eor v3.16b, v3.16b, v2.16b
235 rev32 v10.16b, v2.16b
247 eor v11.16b, v11.16b, v2.16b
[all …]
H A Daes-ce-ccm-core.S65 ld1 {v2.16b}, [x1], #16 /* load next input block */
67 eor v2.16b, v2.16b, v5.16b /* final round enc+mac */
68 eor v6.16b, v1.16b, v2.16b /* xor with crypted ctr */
70 eor v2.16b, v2.16b, v1.16b /* xor with crypted ctr */
71 eor v6.16b, v2.16b, v5.16b /* final round enc */
73 eor v0.16b, v0.16b, v2.16b /* xor mac with pt ^ rk[last] */
96 ld1 {v2.16b}, [x1] /* load a full block of input */
98 eor v7.16b, v2.16b, v1.16b /* encrypt partial input block */
99 bif v2.16b, v7.16b, v22.16b /* select plaintext */
101 tbl v2.16b, {v2.16b}, v9.16b /* copy plaintext to start of v2 */
[all …]
H A Dsm3-ce-core.S97 CPU_LE( rev32 v2.16b, v2.16b )
102 qround a, v0, v1, v2, v3, v4
103 qround a, v1, v2, v3, v4, v0
104 qround a, v2, v3, v4, v0, v1
105 qround a, v3, v4, v0, v1, v2
109 qround b, v4, v0, v1, v2, v3
110 qround b, v0, v1, v2, v3, v4
111 qround b, v1, v2, v3, v4, v0
112 qround b, v2, v3, v4, v0, v1
113 qround b, v3, v4, v0, v1, v2
[all …]
/linux/lib/
H A Dxxhash.c111 uint32_t v2 = seed + PRIME32_2; in xxh32() local
118 v2 = xxh32_round(v2, get_unaligned_le32(p)); in xxh32()
126 h32 = xxh_rotl32(v1, 1) + xxh_rotl32(v2, 7) + in xxh32()
181 uint64_t v2 = seed + PRIME64_2; in xxh64() local
188 v2 = xxh64_round(v2, get_unaligned_le64(p)); in xxh64()
196 h64 = xxh_rotl64(v1, 1) + xxh_rotl64(v2, 7) + in xxh64()
199 h64 = xxh64_merge_round(h64, v2); in xxh64()
249 state.v2 = seed + PRIME32_2; in xxh32_reset()
263 state.v2 = seed + PRIME64_2; in xxh64_reset()
295 state->v2 = xxh32_round(state->v2, get_unaligned_le32(p32)); in xxh32_update()
[all …]
/linux/Documentation/devicetree/bindings/iommu/
H A Darm,smmu.yaml26 - description: Qcom SoCs implementing "arm,smmu-v2"
29 - qcom,msm8996-smmu-v2
30 - qcom,msm8998-smmu-v2
31 - qcom,sdm630-smmu-v2
32 - qcom,sm6375-smmu-v2
33 - const: qcom,smmu-v2
116 - description: Qcom Adreno GPUs implementing "arm,smmu-v2"
119 - qcom,msm8996-smmu-v2
120 - qcom,sc7180-smmu-v2
121 - qcom,sdm630-smmu-v2
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588j.dtsi11 compatible = "operating-points-v2";
33 compatible = "operating-points-v2";
59 compatible = "operating-points-v2";
85 compatible = "operating-points-v2";
115 operating-points-v2 = <&cluster1_opp_table>;
119 operating-points-v2 = <&cluster1_opp_table>;
123 operating-points-v2 = <&cluster2_opp_table>;
127 operating-points-v2 = <&cluster2_opp_table>;
131 operating-points-v2 = <&cluster0_opp_table>;
135 operating-points-v2 = <&cluster0_opp_table>;
[all …]
H A Drk3399-op1.dtsi10 compatible = "operating-points-v2";
45 compatible = "operating-points-v2";
88 compatible = "operating-points-v2";
117 compatible = "operating-points-v2";
139 operating-points-v2 = <&cluster0_opp>;
143 operating-points-v2 = <&cluster0_opp>;
147 operating-points-v2 = <&cluster0_opp>;
151 operating-points-v2 = <&cluster0_opp>;
155 operating-points-v2 = <&cluster1_opp>;
159 operating-points-v2 = <&cluster1_opp>;
[all …]
H A Drk3399-t.dtsi11 compatible = "operating-points-v2";
34 compatible = "operating-points-v2";
69 compatible = "operating-points-v2";
91 operating-points-v2 = <&cluster0_opp>;
95 operating-points-v2 = <&cluster0_opp>;
99 operating-points-v2 = <&cluster0_opp>;
103 operating-points-v2 = <&cluster0_opp>;
107 operating-points-v2 = <&cluster1_opp>;
111 operating-points-v2 = <&cluster1_opp>;
115 operating-points-v2 = <&gpu_opp_table>;
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,saw2.yaml38 - qcom,msm8226-saw2-v2.1-cpu
39 - qcom,msm8226-saw2-v2.1-l2
41 - qcom,msm8974-saw2-v2.1-cpu
42 - qcom,msm8974-saw2-v2.1-l2
43 - qcom,msm8976-gold-saw2-v2.3-l2
44 - qcom,msm8976-silver-saw2-v2.3-l2
45 - qcom,apq8084-saw2-v2.1-cpu
46 - qcom,apq8084-saw2-v2.1-l2
70 /* Example 1: SoC using SAW2 and kpss-acc-v2 CPUIdle */
78 enable-method = "qcom,kpss-acc-v2";
[all …]

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