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/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Drenesas,rz-mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/renesas,rz-mtu
[all...]
/freebsd/lib/libpmc/pmu-events/arch/x86/broadwellde/
H A Dfrontend.json12 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
17-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of th…
32 … "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction-cache miss.",
47 … number of instruction cache, streaming buffer and victim cache misses. Counting includes UC acces…
58 …nstruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops tha…
69 …nstruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops tha…
80 …s were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops tha…
91 …ps were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops tha…
102 …nstruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops tha…
112 …nstruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops tha…
[all …]
H A Dcache.json8 …opportunistic replacements, and replacements that require stall-for-replace or block-for-replace.",
28-demand loads and gets hit at least once by demand. The valid outstanding interval is defined unti…
70 …ption": "This event counts the number of L2 cache lines filling the L2. Counting does not cover re…
80 …nts the number of L2 cache lines in the Exclusive state filling the L2. Counting does not cover re…
90 …ts the number of L2 cache lines in the Invalidate state filling the L2. Counting does not cover re…
100 …counts the number of L2 cache lines in the Shared state filling the L2. Counting does not cover re…
356 "BriefDescription": "Core-originated cacheable demand requests missed L3",
361 …"PublicDescription": "This event counts core-originated cacheable demand requests that miss the la…
366 "BriefDescription": "Core-originated cacheable demand requests that refer to L3",
371 …"PublicDescription": "This event counts core-originated cacheable demand requests that refer to th…
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/freebsd/lib/libpmc/pmu-events/arch/x86/broadwell/
H A Dfrontend.json12 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
17-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of th…
32 … "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction-cache miss.",
47 … number of instruction cache, streaming buffer and victim cache misses. Counting includes UC acces…
58 …nstruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops tha…
69 …nstruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops tha…
80 …s were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops tha…
91 …ps were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops tha…
102 …nstruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops tha…
112 …nstruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops tha…
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/broadwellx/
H A Dfrontend.json12 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
17-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of th…
32 … "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction-cache miss.",
47 … number of instruction cache, streaming buffer and victim cache misses. Counting includes UC acces…
58 …nstruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops tha…
69 …nstruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops tha…
80 …s were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops tha…
91 …ps were delivered to Instruction Decode Queue (IDQ) from the MITE path. Counting includes uops tha…
102 …nstruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops tha…
112 …nstruction Decode Queue (IDQ) from the Decode Stream Buffer (DSB) path. Counting includes uops tha…
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/freebsd/lib/libpmc/
H A Dpmc.31 .\" Copyright (c) 2003-2008 Joseph Koshy. All rights reserved.
40 The library is implemented using the lower-level facilities offered by
50 .Bl -bullet
53 These PMCs measure events in a whole-system manner, i.e., independent
57 Non-privileged process are allowed to allocate system scope PMCs if the
61 is non-zero.
72 .Bl -bullet
74 Counting PMCs measure events according to their scope
90 The library uses human-readable strings to name the event being
99 Additionally, process-scope PMCs have to be attached to one or more
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/freebsd/sys/contrib/device-tree/Bindings/pwm/
H A Drenesas,rzg2l-gpt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/renesas,rzg2l-gpt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 RZ/G2L General PWM Timer (GPT) composed of 8 channels with 32-bit timer
16 * Up-counting or down-counting (saw waves) or up/down-counting
26 * Registers for setting up frame cycles in each channel (with capability
31 * Starting, stopping, clearing and up/down counters in response to input
33 * Starting, clearing, stopping and up/down counters in response to a
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/freebsd/sys/contrib/device-tree/Bindings/arc/
H A Darchs-pct.txt3 The ARC HS can be configured with a pipeline performance monitor for counting
5 are 100+ hardware conditions dynamically mapped to up to 32 counters.
10 - compatible : should contain
11 "snps,archs-pct"
16 compatible = "snps,archs-pct";
H A Dpct.txt3 The ARC700 can be configured with a pipeline performance monitor for counting
5 are 100+ hardware conditions dynamically mapped to up to 32 counters
13 - compatible : should contain
14 "snps,arc700-pct"
19 compatible = "snps,arc700-pct";
H A Dsnps,archs-pct.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arc/snps,archs-pct.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Aryabhatta Dey <aryabhattadey35@gmail.com>
13 The ARC HS can be configured with a pipeline performance monitor for counting
15 are 100+ hardware conditions dynamically mapped to up to 32 counters.
20 const: snps,archs-pct
29 - compatible
30 - reg
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/freebsd/share/man/man9/
H A Dlocking.91 .\" Copyright (c) 2007 Julian Elischer (julian - freebsd org )
98 .Ss Read-Mostly Locks
99 Read-mostly locks are similar to
102 .Em Read-mostly
104 using a caller-supplied
111 .Ss Sleepable Read-Mostly Locks
112 Sleepable read-mostly locks are a variation on read-mostly locks.
146 .Ss Non-blocking synchronization
151 which can be used to provide read-only access to a data structure while one or
160 Thus, they are a useful building block in the construction of lock-free
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/freebsd/lib/libpmc/pmu-events/arch/x86/skylake/
H A Dfrontend.json8 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch…
13 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches",
18 …e Decode Stream Buffer (DSB)-to-MITE switches including all misses because of missing Decode Strea…
23 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
28-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of th…
41 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
55 …ode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to …
101 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
109 …er an interval where the front-end delivered no uops for a period of at least 1 cycle which was no…
115 …after an interval where the front-end delivered no uops for a period of 128 cycles which was not i…
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/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A Dfrontend.json8 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch…
13 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches",
18 …e Decode Stream Buffer (DSB)-to-MITE switches including all misses because of missing Decode Strea…
23 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
28-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of th…
41 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
55 …ode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to …
101 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
109 …er an interval where the front-end delivered no uops for a period of at least 1 cycle which was no…
115 …after an interval where the front-end delivered no uops for a period of 128 cycles which was not i…
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/
H A Dfrontend.json8 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch…
13 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches",
18 …e Decode Stream Buffer (DSB)-to-MITE switches including all misses because of missing Decode Strea…
23 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.",
28-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of th…
41 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
55 …ode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to …
101 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle",
109 …er an interval where the front-end delivered no uops for a period of at least 1 cycle which was no…
115 …after an interval where the front-end delivered no uops for a period of 128 cycles which was not i…
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/freebsd/share/doc/psd/01.cacm/
H A Dp628 301,700 512-byte secondary storage blocks used
33 to soak up any idle \*sCPU\*n time.
34 It has been used to produce a million-digit
36 and other semi-infinite problems.
37 Not counting this background work, we average daily:
46 240 log-ins
/freebsd/usr.sbin/cron/doc/
H A DTHANKS10 answer even though it made me clean up some really awful things in the code.
15 its brothers and sisters; he also sent some diffs that lead cron toward compil-
18 number counting. Brian Reid made suggestions which led to the run queue and
19 the source-file labelling in installed crontabs.
23 -> sendmail won't time out if the command is slow to generate output
24 -> day-of-week names aren't off by one anymore
25 -> crontab says the right thing if you do something you shouldn't do
26 -> crontab(5) man page is longer and more informative
27 -> misc changes related to the side effects of fclose()
28 -> Sequent "universe" support added (may also help on Pyramids)
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/freebsd/contrib/ntp/util/
H A Dprecision.c5 #define DEFAULT_SYS_PRECISION -99
36 * THEN this machine is "counting" with the low order bits
38 * THEN this machine *WAS* counting, and has now stepped
42 * otherwise, take the log2(observered difference, rounded UP)
47 * chance of MINSTEP-1 other processes getting in and calling gettimeofday
75 for (i = - --minsteps; i< MAXLOOPS; i++) { in default_get_resolution()
77 diff = tp.tv_usec - last; in default_get_resolution()
79 if (diff > MINSTEP) if (minsteps-- <= 0) break; in default_get_resolution()
95 " (The resolution is less than the time to read the clock -- Assume 1us)\n"); in default_get_resolution()
98 for (i=0, val=HUSECS; val>0; i--, val >>= 1) if (diff >= val) return i; in default_get_resolution()
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/freebsd/usr.sbin/pmcstat/
H A Dpmcstat.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2003-2008, Joseph Koshy
73 * the system-wide and per-process variety. Each of these could be in
74 * 'counting mode' or in 'sampling mode'.
76 * For 'counting mode' PMCs, pmcstat(8) will periodically issue a
90 * - parent creates a socketpair for two way communication and
92 * - subsequently:
96 * - Wait for child's token.
97 * - Sends token.
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/freebsd/crypto/openssh/
H A DFREEBSD-upgrade1 FreeBSD maintainer's guide to OpenSSH-portable
9 01) Make sure your mail spool has plenty of free space. It'll fill up
12 02) Download the latest OpenSSH-portable tarball and signature from
17 $ gpg --verify openssh-X.YpZ.tar.gz.asc
21 $ tar xf openssh-X.YpZ.tar.gz
28 $ rsync --archive --delete --exclude=.git /path/to/openssh-X.YpZ/ ./
32 $ git add -A
36 $ git commit -m "Vendor import of OpenSSH X.YpZ"
40 $ git tag -a -m "Tag OpenSSH X.YpZ" vendor/openssh/X.YpZ
51 --dry-run first to ensure that no undesired tags will be pushed:
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/freebsd/secure/lib/libcrypto/man/man3/
H A DENGINE_add.31 .\" -*- mode: troff; coding: utf-8 -*-
58 .TH ENGINE_ADD 3ossl 2025-09-30 3.5.4 OpenSSL
102 \&\- ENGINE cryptographic module support
238 reference-counted mechanism to allow them to be dynamically loaded in and
245 \& RSA_METHOD \- for providing alternative RSA implementations
247 \& \- similarly for other OpenSSL APIs
248 \& EVP_CIPHER \- potentially multiple cipher algorithms (indexed by \*(Aqnid\*(Aq)
249 \& EVP_DIGEST \- potentially multiple hash algorithms (indexed by \*(Aqnid\*(Aq)
250 \& key\-loading \- loading public and/or private EVP_PKEY keys
252 .SS "Reference counting and handles"
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/freebsd/crypto/openssl/doc/internal/man3/
H A Dossl_method_construct.pod6 - generic method constructor
64 reference counting and acts accordingly (i.e. it will call the
86 Look up an already existing method from a store by name.
93 The method to be looked up should be identified with data found in I<data>
151 Copyright 2019-2021 The OpenSSL Project Authors. All Rights Reserved.
/freebsd/crypto/krb5/src/plugins/kdb/db2/libdb2/hash/
H A Dhash_bigkey.c1 /*-
67 #include "db-int.h"
83 * -1 ==> ERROR
92 key_data = (int8_t *)key->data; in __big_insert()
93 key_size = key->size; in __big_insert()
94 val_data = (int8_t *)val->data; in __big_insert()
95 val_size = val->size; in __big_insert()
102 __add_bigpage(hashp, pagep, NUM_ENT(pagep) - 1, base_page); in __big_insert()
104 return (-1); in __big_insert()
114 MIN(FREESPACE(pagep) - key_move_bytes, val_size); in __big_insert()
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/freebsd/lib/libkvm/
H A Dkvm_private.c1 /*-
7 * BG 91-66 and contributed to Berkeley.
72 * Report an error using printf style arguments. "program" is kd->program
88 (void)vsnprintf(kd->errbuf, in _kvm_err()
89 sizeof(kd->errbuf), fmt, ap); in _kvm_err()
106 char *cp = kd->errbuf; in _kvm_syserr()
108 (void)vsnprintf(cp, sizeof(kd->errbuf), fmt, ap); in _kvm_syserr()
110 (void)snprintf(&cp[n], sizeof(kd->errbuf) - n, ": %s", in _kvm_syserr()
122 _kvm_err(kd, kd->program, "can't allocate %zu bytes: %s", in _kvm_malloc()
131 return (kd->nlehdr.e_ident[EI_CLASS] == class && in _kvm_probe_elf_kernel()
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/freebsd/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/
H A DMIGChecker.cpp1 //== MIGChecker.cpp - MIG calling convention checker ------------*- C++ -*--==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 // - When a server routine returns an error code that represents success, it
14 // - Additionally, when returning success, all out-parameters must be
16 // - When it returns any other error code, it must not take ownership,
17 // because the message and its out-of-line parameters will be destroyed
20 // use-after-free exploits.
22 //===----------------------------------------------------------------------===//
41 BugType BT{this, "Use-after-free (MIG calling convention violation)",
[all …]
/freebsd/contrib/llvm-project/openmp/runtime/src/
H A Dkmp_collapse.h2 * kmp_collapse.h -- header for loop collapse feature
5 //===----------------------------------------------------------------------===//
9 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
11 //===----------------------------------------------------------------------===//
127 //-------------------------------------------------------------------------
175 // Did we adjust loop bounds (not counting canonicalization)?
190 // Did we adjust loop bounds (not counting canonicalization)?
194 //----------APIs for rectangular loop nests--------------------------------
213 // OMPTODO: special case 2, 3 nested loops - if it'll be possible to inline
221 //----------Init API for non-rectangular loops--------------------------------
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