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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dmarvell,armada-cp110-utmi-phy.yaml5 $id: http://devicetree.org/schemas/phy/marvell,armada-cp110-utmi-phy.yaml#
8 title: Marvell Armada CP110/CP115 UTMI PHY
15 Each of two exiting UTMI PHYs could be connected to either USB host or USB device
17 The USB device controller can only be connected to a single UTMI PHY port
19 UTMI PHY0 --------/
23 UTMI PHY1 --------\
28 const: marvell,cp110-utmi-phy
56 Each UTMI PHY port must be represented as a sub-node.
83 cp0_utmi: utmi@580000 {
84 compatible = "marvell,cp110-utmi-phy";
[all …]
H A Dnvidia,tegra20-usb-phy.txt13 - The register set of the PHY containing the UTMI pad control registers.
14 Present if-and-only-if phy_type == utmi.
15 - phy_type : Should be one of "utmi", "ulpi" or "hsic".
21 - timer: The timeout clock (clk_m). Present if phy_type == utmi.
22 - utmi-pads: The clock needed to access the UTMI pad control registers.
23 Present if phy_type == utmi.
32 - utmi-pads: The reset of the PHY containing the chip-wide UTMI pad control
38 Required PHY timing params for utmi phy, for all chips:
53 Required PHY timing params for utmi phy, only on Tegra30 and above:
70 - nvidia,has-utmi-pad-registers : boolean indicates whether this controller
[all …]
H A Dnvidia,tegra20-usb-phy.yaml50 - description: UTMI pads control registers clock
55 - description: UTMI timeout clock
56 - description: UTMI pads control registers clock
72 - const: utmi-pads
78 - const: utmi-pads
90 - description: UTMI pads reset
98 - const: utmi-pads
105 enum: [utmi, ulpi, hsic]
128 nvidia,has-utmi-pad-registers:
130 Indicates whether this controller contains the UTMI pad control
[all …]
H A Dmarvell,armada-3700-utmi-phy.yaml5 $id: http://devicetree.org/schemas/phy/marvell,armada-3700-utmi-phy.yaml#
8 title: Marvell Armada UTMI/UTMI+ PHY
17 a slightly different UTMI PHY.
22 - marvell,a3700-utmi-host-phy
23 - marvell,a3700-utmi-otg-phy
48 compatible = "marvell,a3700-utmi-host-phy";
H A Dphy-mvebu-utmi.txt1 MVEBU A3700 UTMI PHY
4 USB2 UTMI+ PHY controllers can be found on the following Marvell MVEBU SoCs:
10 different UTMI PHY.
15 * "marvell,a3700-utmi-host-phy" for the PHY connected to
17 * "marvell,a3700-utmi-otg-phy" for the PHY connected to
29 compatible = "marvell,armada-3700-utmi-host-phy";
H A Dphy-stm32-usbphyc.txt3 The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
4 switch. It controls PHY configuration and status, and the UTMI+ switch that
16 |_ UTMI switch_______| OTG controller
H A Dphy-stm32-usbphyc.yaml11 The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
12 switch. It controls PHY configuration and status, and the UTMI+ switch that
24 |_ UTMI switch_______| OTG controller
216 The value is used to select UTMI switch output.
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Domap-usb-host.txt43 * "refclk_60m_int" - 60MHz internal reference clock for UTMI clock mux
44 * "refclk_60m_ext_p1" - 60MHz external ref. clock for Port 1's UTMI clock mux.
45 * "refclk_60m_ext_p2" - 60MHz external ref. clock for Port 2's UTMI clock mux
46 * "utmi_p1_gfclk" - Port 1 UTMI clock mux.
47 * "utmi_p2_gfclk" - Port 2 UTMI clock mux.
48 * "usb_host_hs_utmi_p1_clk" - Port 1 UTMI clock gate.
49 * "usb_host_hs_utmi_p2_clk" - Port 2 UTMI clock gate.
50 * "usb_host_hs_utmi_p3_clk" - Port 3 UTMI clock gate.
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dusb.yaml38 UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is selected, UTMI+ low
44 enum: [utmi, utmi_wide, ulpi, serial, hsic]
H A Datmel-usb.txt37 - clocks: Should reference the peripheral and the UTMI clocks
40 "usb_clk" for the UTMI clock
44 "utmi", or "hsic".
50 clocks = <&utmi>, <&uhphs_clk>;
122 clocks = <&utmi>, <&udphs_clk>;
H A Domap-usb.txt13 specifying ULPI and UTMI respectively.
55 - utmi-mode : controls the source of UTMI/PIPE status for VBUS and OTG ID.
77 utmi-mode = <2>;
H A Dhisilicon,histb-xhci.txt13 "utmi": for utmi clock
40 clock-names = "bus", "utmi", "pipe", "suspend";
H A Dhisilicon,hi3798mv200-dwc3.yaml31 - description: Controller utmi clock
41 - const: utmi
82 clock-names = "bus", "suspend", "ref", "gm", "gs", "utmi", "pipe";
H A Dgeneric.txt16 a UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is
17 selected. Valid arguments are "utmi" and "utmi_wide".
H A Ddwc3.txt84 - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
87 - snps,hsphy_interface: High-Speed PHY interface selection between "utmi" for
88 UTMI+ and "ulpi" for ULPI when the DWC_USB3_HSPHY_INTERFACE has value 3.
H A Dstarfive,jh7110-usb.yaml43 - description: UTMI APB clock
58 - description: UTMI APB clock reset
/freebsd/sys/arm/nvidia/
H A Dtegra_usbphy.c276 /* UTMI params */
403 "Cannot unreset 'utmi-pads' reset\n"); in usbphy_utmi_enable()
409 "Cannot enable 'utmi-pads' clock\n"); in usbphy_utmi_enable()
427 "Cannot disable 'utmi-pads' clock\n"); in usbphy_utmi_enable()
540 "Cannot enable 'utmi-pads' clock\n"); in usbphy_utmi_disable()
551 "Cannot disable 'utmi-pads' clock\n"); in usbphy_utmi_disable()
570 "Only UTMI interface is supported.\n"); in usbphy_phy_enable()
593 if (strcmp(tmpstr, "utmi") == 0) in usb_get_ifc_mode()
739 rv = hwreset_get_by_ofw_name(sc->dev, 0, "utmi-pads", &sc->reset_pads); in usbphy_attach()
741 device_printf(dev, "Cannot get 'utmi-pads' reset\n"); in usbphy_attach()
[all …]
/freebsd/sys/arm/freescale/vybrid/
H A Dvf_ehci.c95 #define USBPHY_DEBUG0_STATUS 0x60 /* UTMI Debug Status Register 0 */
96 #define USBPHY_DEBUG1 0x70 /* UTMI Debug Status Register 1 */
97 #define USBPHY_DEBUG1_SET 0x74 /* UTMI Debug Status Register 1 */
98 #define USBPHY_DEBUG1_CLR 0x78 /* UTMI Debug Status Register 1 */
99 #define USBPHY_DEBUG1_TOG 0x7C /* UTMI Debug Status Register 1 */
100 #define USBPHY_VERSION 0x80 /* UTMI RTL Version */
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-8040-db.dts164 phy-names = "utmi";
179 phy-names = "usb", "utmi";
325 phy-names = "utmi";
333 phy-names = "utmi";
/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra124.dtsi1072 phy_type = "utmi";
1085 phy_type = "utmi";
1089 clock-names = "reg", "pll_u", "utmi-pads";
1091 reset-names = "usb", "utmi-pads";
1103 nvidia,has-utmi-pad-registers;
1112 phy_type = "utmi";
1125 phy_type = "utmi";
1129 clock-names = "reg", "pll_u", "utmi-pads";
1131 reset-names = "usb", "utmi-pads";
1151 phy_type = "utmi";
[all...]
H A Dtegra114.dtsi729 phy_type = "utmi";
742 phy_type = "utmi";
746 clock-names = "reg", "pll_u", "utmi-pads";
748 reset-names = "usb", "utmi-pads";
760 nvidia,has-utmi-pad-registers;
769 phy_type = "utmi";
782 phy_type = "utmi";
786 clock-names = "reg", "pll_u", "utmi-pads";
788 reset-names = "usb", "utmi-pads";
H A Dtegra30.dtsi1114 phy_type = "utmi";
1130 phy_type = "utmi";
1134 clock-names = "reg", "pll_u", "utmi-pads";
1136 reset-names = "usb", "utmi-pads";
1149 nvidia,has-utmi-pad-registers;
1158 phy_type = "utmi";
1173 phy_type = "utmi";
1177 clock-names = "reg", "pll_u", "utmi-pads";
1179 reset-names = "usb", "utmi-pads";
1200 phy_type = "utmi";
[all...]
H A Dtegra20.dtsi851 phy_type = "utmi";
867 phy_type = "utmi";
872 clock-names = "reg", "pll_u", "timer", "utmi-pads";
874 reset-names = "usb", "utmi-pads";
884 nvidia,has-utmi-pad-registers;
913 reset-names = "usb", "utmi-pads";
923 phy_type = "utmi";
938 phy_type = "utmi";
943 clock-names = "reg", "pll_u", "timer", "utmi-pads";
945 reset-names = "usb", "utmi
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra132.dtsi1002 phy_type = "utmi";
1016 phy_type = "utmi";
1020 clock-names = "reg", "pll_u", "utmi-pads";
1022 reset-names = "usb", "utmi-pads";
1034 nvidia,has-utmi-pad-registers;
1043 phy_type = "utmi";
1057 phy_type = "utmi";
1061 clock-names = "reg", "pll_u", "utmi-pads";
1063 reset-names = "usb", "utmi-pads";
1083 phy_type = "utmi";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6qdl-prti6q.dtsi70 phy_type = "utmi";
80 phy_type = "utmi";

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