/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | allwinner,sun8i-h3-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-h3-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner H3 USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 19 - allwinner,sun8i-h3-usb-phy 20 - allwinner,sun50i-h616-usb-phy [all …]
|
H A D | allwinner,sun6i-a31-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A31 USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun6i-a31-usb-phy 22 - description: PHY Control registers [all …]
|
H A D | allwinner,sun8i-r40-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-r40-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner R40 USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun8i-r40-usb-phy 22 - description: PHY Control registers [all …]
|
H A D | allwinner,sun8i-a83t-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-a83t-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A83t USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 18 const: allwinner,sun8i-a83t-usb-phy 22 - description: PHY Control registers [all …]
|
H A D | nvidia,tegra194-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller 24 contains a software-configurable mux that sits between the I/O controller [all …]
|
H A D | allwinner,sun4i-a10-usb-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/allwinner,sun4i-a10-usb-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A10 USB PHY 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 14 "#phy-cells": 19 - allwinner,sun4i-a10-usb-phy 20 - allwinner,sun7i-a20-usb-phy [all …]
|
H A D | marvell,armada-cp110-utmi-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/phy/marvell,armada-cp110-utmi-phy.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Konstantin Porotchkin <kostap@marvell.com> 14 On Armada 7k/8k and CN913x, there are two host and one device USB controllers. 15 Each of two exiting UTMI PHYs could be connected to either USB host or USB device 17 The USB device controller can only be connected to a single UTMI PHY port 18 0.H----- USB HOST0 19 UTMI PHY0 --------/ [all …]
|
H A D | nvidia,tegra210-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xus [all...] |
/freebsd/sys/contrib/device-tree/Bindings/usb/ |
H A D | s3c2410-usb.txt | 1 Samsung S3C2410 and compatible SoC USB controller 6 - compatible: should be "samsung,s3c2410-ohci" for USB host controller 7 - reg: address and length of the controller memory mapped region 8 - interrupts: interrupt number for the USB OHCI controller 9 - clocks: Should reference the bus and host clocks 10 - clock-names: Should contain two strings 11 "usb-bus-host" for the USB bus clock 12 "usb-host" for the USB host clock 17 compatible = "samsung,s3c2410-ohci"; 21 clock-names = "usb-bus-host", "usb-host";
|
H A D | exynos-usb.txt | 1 Samsung Exynos SoC USB controller 3 The USB devices interface with USB controllers on Exynos SOCs. 8 - compatible: should be "samsung,exynos4210-ehci" for USB 2.0 9 EHCI controller in host mode. 10 - reg: physical base address of the controller and length of memory mapped 12 - interrupts: interrupt number to the cpu. 13 - clocks: from common clock binding: handle to usb clock. 14 - clock-names: from common clock binding: Shall be "usbhost". 15 - phys: from the *Generic PHY* bindings; array specifying phy(s) used 17 - phy-names: from the *Generic PHY* bindings; array of the names for [all …]
|
H A D | usb-device.txt | 1 Generic USB Device Properties 3 Usually, we only use device tree for hard wired USB device. 5 http://www.devicetree.org/open-firmware/bindings/usb/usb-1_0.ps 7 Four types of device-tree nodes are defined: "host-controller nodes" 8 representing USB host controllers, "device nodes" representing USB devices, 9 "interface nodes" representing USB interfaces and "combined nodes" 10 representing simple USB devices. 16 A "hub node" is a combined node or an interface node that represents a USB 21 - compatible: "usbVID,PID", where VID is the vendor id and PID the product id. 26 - reg: the number of the USB hub port or the USB host-controller port to which [all …]
|
H A D | fsl-usb.txt | 1 Freescale SOC USB controllers 3 The device node for a USB controller that is part of a Freescale 9 - compatible : Should be "fsl-usb2-mph" for multi port host USB 10 controllers, or "fsl-usb2-dr" for dual role USB controllers 11 or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121. 12 Wherever applicable, the IP version of the USB controller should 13 also be mentioned (for eg. fsl-usb2-dr-v2.2 for bsc9132). 14 - phy_type : For multi port host USB controllers, should be one of 15 "ulpi", or "serial". For dual role USB controllers, should be 17 - reg : Offset and length of the register set for the device [all …]
|
H A D | nvidia,tegra210-xusb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/nvidia,tegra210-xusb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 18 const: nvidia,tegra210-xusb 22 - description: base and length of the xHCI host registers 23 - description: base and length of the XUSB FPCI registers 24 - description: base and length of the XUSB IPFS registers [all …]
|
H A D | nvidia,tegra124-xusb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/nvidia,tegra124-xusb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 20 - description: NVIDIA Tegra124 21 const: nvidia,tegra124-xusb 23 - description: NVIDIA Tegra132 25 - const: nvidia,tegra132-xusb [all …]
|
H A D | snps,dwc3.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/usb/snps,dwc3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Felipe Balbi <balbi@kernel.org> 14 be presented as a standalone DT node with an optional vendor-specific 18 - $ref: usb-drd.yaml# 19 - if: 25 - dr_mode 27 $ref: usb.yaml# [all …]
|
H A D | ci-hdrc-usb2.txt | 1 * USB2 ChipIdea USB controller for ci13xxx 4 - compatible: should be one of: 5 "fsl,imx23-usb" 6 "fsl,imx27-usb" 7 "fsl,imx28-usb" 8 "fsl,imx6q-usb" 9 "fsl,imx6sl-usb" 10 "fsl,imx6sx-usb" 11 "fsl,imx6ul-usb" 12 "fsl,imx7d-usb" [all …]
|
H A D | atmel-usb.txt | 1 Atmel SOC USB controllers 6 - compatible: Should be "atmel,at91rm9200-ohci" for USB controllers 7 used in host mode. 8 - reg: Address and length of the register set for the device 9 - interrupts: Should contain ohci interrupt 10 - clocks: Should reference the peripheral, host and system clocks 11 - clock-names: Should contain three strings 13 "hclk" for the host clock 15 - num-ports: Number of ports. 16 - atmel,vbus-gpio: If present, specifies a gpio that needs to be [all …]
|
H A D | mediatek,mtu3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 - $ref: usb-drd.yaml 17 The DRD controller has a glue layer IPPC (IP Port Control), and its host is 23 - enum: 24 - mediatek,mt2712-mtu3 25 - mediatek,mt8173-mtu3 [all …]
|
H A D | msm-hsusb.txt | 6 - compatible: Should contain "qcom,ehci-host" 7 - regs: offset and length of the register set in the memory map 8 - usb-phy: phandle for the PHY device 13 compatible = "qcom,ehci-host"; 15 usb [all...] |
H A D | chipidea,usb2-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: USB2 ChipIdea USB controller Common Properties 10 - Xu Yang <xu.yang_2@nxp.com> 25 clock-names: 31 power-domains: 37 reset-names: 40 "#reset-cells": [all …]
|
H A D | generic.txt | 1 Generic USB Properties 4 - maximum-speed: tells USB controllers we want to work up to a certain 5 speed. Valid arguments are "super-speed-plus", 6 "super-speed", "high-speed", "full-speed" and 7 "low-speed". In case this isn't passed via DT, USB 10 - dr_mode: tells Dual-Role USB controllers that we want to work on a 11 particular mode. Valid arguments are "host", 13 passed via DT, USB DRD controllers should default to 15 - phy_type: tells USB controllers that we want to configure the core to support 16 a UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | mvebu-gated-clock.txt | 12 ----------------------------------- 20 15 sata0 SATA Host 0 21 17 sdio SDHCI Host 25 30 sata1 SATA Host 0 29 ----------------------------------- 39 16 usb3 USB3 Host 40 17 sdio SDHCI Host 41 18 usb USB Host 56 ----------------------------------- 65 9 usb3h0 USB3 Host 0 [all …]
|
/freebsd/share/man/man4/ |
H A D | cdce.4 | 8 .\" - Redistributions of source code must retain the above copyright 10 .\" - Redistributions in binary form must reproduce the above 35 .Nd "USB Communication Device Class Ethernet (CDC ECM/NCM) driver" 40 .Bd -ragged -offset indent 43 .Cd "device usb" 51 .Bd -ragged -offset indent 59 .Bd -literal -offset indent 65 driver provides support for USB Host-to-Host (aka USB-to-USB) and 66 USB-to-Ethernet bridges based on the USB Communication Device Class 69 It also provides device-side CDC ECM support. [all …]
|
H A D | udbp.4 | 30 .Nd USB Double Bulk Pipe driver 35 .Bd -ragged -offset indent 42 .Bd -literal -offset indent 48 driver provides support for host-to-host cables 51 .Sy Windows USB Easy Transfer , 52 and many cables based on the Prolific PL2xx1 series of USB bridge chips. 53 A useful (but non-comprehensive) list of compatible USB host cables 62 .\" clueless. Working on it -- sheldonh 104 The Linux node should be configured to prefer link-local IPv4 addresses 115 .Xr usb 4 , [all …]
|
/freebsd/sys/dev/usb/controller/ |
H A D | ehci_mv.c | 1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 35 * FDT attachment driver for the USB Enhanced Host Controller. 62 #include <dev/usb/usb.h> 63 #include <dev/usb/usbdi.h> 65 #include <dev/usb/usb_core.h> 66 #include <dev/usb/usb_busdma.h> 67 #include <dev/usb/usb_process.h> 68 #include <dev/usb/usb_util.h> 70 #include <dev/usb/usb_controller.h> [all …]
|