| /linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-usb-hs.c | 45 struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy); in qcom_usb_hs_phy_set_mode() local
49 if (!uphy->vbus_edev) { in qcom_usb_hs_phy_set_mode()
64 ret = ulpi_write(uphy->ulpi, ULPI_USB_INT_EN_RISE, val); in qcom_usb_hs_phy_set_mode()
67 ret = ulpi_write(uphy->ulpi, ULPI_USB_INT_EN_FALL, val); in qcom_usb_hs_phy_set_mode()
81 ret = ulpi_write(uphy->ulpi, ULPI_SET(ULPI_PWR_CLK_MNG_REG), in qcom_usb_hs_phy_set_mode()
85 ret = ulpi_write(uphy->ulpi, addr, ULPI_MISC_A_VBUSVLDEXTSEL); in qcom_usb_hs_phy_set_mode()
95 struct qcom_usb_hs_phy *uphy; in qcom_usb_hs_phy_vbus_notifier() local
98 uphy = container_of(nb, struct qcom_usb_hs_phy, vbus_notify); in qcom_usb_hs_phy_vbus_notifier()
105 return ulpi_write(uphy->ulpi, addr, ULPI_MISC_A_VBUSVLDEXT); in qcom_usb_hs_phy_vbus_notifier()
110 struct qcom_usb_hs_phy *uphy = phy_get_drvdata(phy); in qcom_usb_hs_phy_power_on() local
[all …]
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| H A D | phy-qcom-usb-hsic.c | 28 struct qcom_usb_hsic_phy *uphy = phy_get_drvdata(phy); in qcom_usb_hsic_phy_power_on() local
29 struct ulpi *ulpi = uphy->ulpi; in qcom_usb_hsic_phy_power_on()
33 ret = clk_prepare_enable(uphy->phy_clk); in qcom_usb_hsic_phy_power_on()
37 ret = clk_prepare_enable(uphy->cal_clk); in qcom_usb_hsic_phy_power_on()
41 ret = clk_prepare_enable(uphy->cal_sleep_clk); in qcom_usb_hsic_phy_power_on()
56 pins_default = pinctrl_lookup_state(uphy->pctl, PINCTRL_STATE_DEFAULT); in qcom_usb_hsic_phy_power_on()
62 ret = pinctrl_select_state(uphy->pctl, pins_default); in qcom_usb_hsic_phy_power_on()
79 clk_disable_unprepare(uphy->cal_sleep_clk); in qcom_usb_hsic_phy_power_on()
81 clk_disable_unprepare(uphy->cal_clk); in qcom_usb_hsic_phy_power_on()
83 clk_disable_unprepare(uphy->phy_clk); in qcom_usb_hsic_phy_power_on()
[all …]
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| H A D | phy-qcom-m31-eusb2.c | 172 static int m31eusb2_phy_set_mode(struct phy *uphy, enum phy_mode mode, int submode) in m31eusb2_phy_set_mode() argument
174 struct m31eusb2_phy *phy = phy_get_drvdata(uphy); in m31eusb2_phy_set_mode()
181 static int m31eusb2_phy_init(struct phy *uphy) in m31eusb2_phy_init() argument
183 struct m31eusb2_phy *phy = phy_get_drvdata(uphy); in m31eusb2_phy_init()
189 dev_err(&uphy->dev, "failed to enable regulator, %d\n", ret); in m31eusb2_phy_init()
195 dev_err(&uphy->dev, "repeater init failed. %d\n", ret); in m31eusb2_phy_init()
201 dev_err(&uphy->dev, "failed to enable ref clock, %d\n", ret); in m31eusb2_phy_init()
227 static int m31eusb2_phy_exit(struct phy *uphy) in m31eusb2_phy_exit() argument
229 struct m31eusb2_phy *phy = phy_get_drvdata(uphy); in m31eusb2_phy_exit()
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | rockchip,rk3399-typec-phy.yaml | 37 - const: uphy
38 - const: uphy-pipe
39 - const: uphy-tcphy
105 reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
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| H A D | sunplus,sp7021-usb2-phy.yaml | 19 - description: UPHY register region
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| H A D | nvidia,tegra124-xusb-padctl.yaml | 219 - description: reset for the PCIe UPHY block
295 - description: reset for the SATA UPHY block
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| H A D | nvidia,tegra186-xusb-padctl.yaml | 70 description: UPHY brick and reference clock as well as UTMI PHY
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| /linux/drivers/usb/dwc2/ |
| H A D | platform.c | 116 if (hsotg->uphy) { in __dwc2_lowlevel_hw_enable()
117 ret = usb_phy_init(hsotg->uphy); in __dwc2_lowlevel_hw_enable()
169 if (hsotg->uphy) { in __dwc2_lowlevel_hw_disable()
170 usb_phy_shutdown(hsotg->uphy); in __dwc2_lowlevel_hw_disable()
255 hsotg->uphy = devm_usb_get_phy(hsotg->dev, USB_PHY_TYPE_USB2); in dwc2_lowlevel_hw_init()
256 if (IS_ERR(hsotg->uphy)) { in dwc2_lowlevel_hw_init()
257 ret = PTR_ERR(hsotg->uphy); in dwc2_lowlevel_hw_init()
261 hsotg->uphy = NULL; in dwc2_lowlevel_hw_init()
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| H A D | hcd.c | 4393 if (!IS_ERR_OR_NULL(hsotg->uphy)) { in _dwc2_hcd_suspend()
4395 usb_phy_set_suspend(hsotg->uphy, true); in _dwc2_hcd_suspend()
4494 if (!IS_ERR_OR_NULL(hsotg->uphy)) { in _dwc2_hcd_resume()
4496 usb_phy_set_suspend(hsotg->uphy, false); in _dwc2_hcd_resume()
5320 if (!IS_ERR_OR_NULL(hsotg->uphy)) in dwc2_hcd_init()
5321 otg_set_host(hsotg->uphy->otg, &hcd->self); in dwc2_hcd_init()
5378 if (!IS_ERR_OR_NULL(hsotg->uphy)) in dwc2_hcd_remove()
5379 otg_set_host(hsotg->uphy->otg, NULL); in dwc2_hcd_remove()
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| H A D | gadget.c | 4570 if (!IS_ERR_OR_NULL(hsotg->uphy)) in dwc2_hsotg_udc_start()
4571 otg_set_peripheral(hsotg->uphy->otg, &hsotg->gadget); in dwc2_hsotg_udc_start()
4632 if (!IS_ERR_OR_NULL(hsotg->uphy)) in dwc2_hsotg_udc_stop()
4633 otg_set_peripheral(hsotg->uphy->otg, NULL); in dwc2_hsotg_udc_stop()
4760 if (IS_ERR_OR_NULL(hsotg->uphy)) in dwc2_hsotg_vbus_draw()
4762 return usb_phy_set_power(hsotg->uphy, mA); in dwc2_hsotg_vbus_draw()
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| /linux/drivers/phy/sunplus/ |
| H A D | phy-sunplus-usb2.c | 28 /* GROUP UPHY */
134 /* board uphy 0 internal register modification for tid certification */ in sp_uphy_init()
147 /* port 0 uphy clk fix */ in sp_uphy_init()
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| /linux/drivers/phy/tegra/ |
| H A D | Kconfig | 19 Enable this to support the P2U (PIPE to UPHY) that is part of Tegra 19x
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| H A D | phy-tegra194-p2u.c | 3 * P2U (PIPE to UPHY) driver for Tegra T194 SoC
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| /linux/include/dt-bindings/clock/ |
| H A D | tegra234-clock.h | 238 /** @brief Logical clk for setting the UPHY PLL3 rate */
677 /** @brief Logical clk for setting GBE UPHY PLL2 TX_REF rate */
679 /** @brief Logical clk for setting GBE UPHY PLL2 XDIG rate */
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| /linux/include/soc/tegra/ |
| H A D | bpmp-abi.h | 620 * @defgroup UPHY UPHY
3813 * @brief Perform a UPHY operation
3820 * @addtogroup UPHY
3841 * @brief Initialize and enable UPHY display port.
3844 /** @brief Disable UPHY display port. */
3852 * @brief Perform UPHY Lane EOM scan.
3962 /** @brief UPHY brick number, valid: 0-5 */
3964 /** @brief UPHY lane number, valid: 0-15 for UPHY0-UPHY3, 0-1 for UPHY4-UPHY5 */
3994 * @ingroup UPHY
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3399-base.dtsi | 1708 reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
1733 reset-names = "uphy", "uphy-pipe", "uphy-tcphy";
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| /linux/drivers/net/usb/ |
| H A D | r8152.c | 5993 /* reset UPHY timer to 36 ms */ in r8153_first_init()
6014 /* reset UPHY timer to 36 ms */ in r8153_first_init()
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