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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dulpi.txt1 ULPI bus binding
4 Phys that are behind a ULPI connection can be described with the following
5 binding. The host controller shall have a "ulpi" named node as a child, and
6 that node shall have one enabled node underneath it representing the ulpi
15 ulpi {
H A Dfsl-usb.txt15 "ulpi", or "serial". For dual role USB controllers, should be
16 one of "ulpi", "utmi", "utmi_wide", or "serial".
51 phy_type = "ulpi";
65 phy = "ulpi";
H A Dfsl,usb2.yaml38 enum: [ulpi, serial, utmi, utmi_wide]
81 phy_type = "ulpi";
94 phy_type = "ulpi";
H A Dsnps,dwc3.yaml60 SoC Bus Clock (AHB/AXI/Native). ref generates ITP when the UTMI/ULPI
266 of resume. This option is to support certain legacy ULPI PHYs.
269 snps,ulpi-ext-vbus-drv:
271 Some ULPI USB PHY does not support internal VBUS supply, and driving
272 the CPEN pin, requires the configuration of the ulpi DRVVBUSEXTERNAL
289 High-Speed PHY interface selection between UTMI+ and ULPI when the
292 enum: [utmi, ulpi]
H A Dusb.yaml39 pin interface if ULPI is specified, Serial core/PHY interconnect if
44 enum: [utmi, utmi_wide, ulpi, serial, hsic]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dnvidia,tegra20-usb-phy.txt15 - phy_type : Should be one of "utmi", "ulpi" or "hsic".
24 - ulpi-link: The clock Tegra provides to the ULPI PHY (usually pad DAP_MCLK2
27 Present if phy_type == ulpi, and ULPI link mode is in use.
33 registers. Required even if phy_type == ulpi.
35 Required properties for phy_type == ulpi:
H A Dnvidia,tegra20-usb-phy.yaml45 - description: ULPI PHY clock
67 - const: ulpi-link
105 enum: [utmi, ulpi, hsic]
293 const: ulpi
317 - const: ulpi-link
364 phy_type = "ulpi";
368 clock-names = "reg", "pll_u", "ulpi-link";
H A Dnvidia,tegra124-xusb-padctl.txt13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
83 For Tegra124 and Tegra132, the following pads exist: usb2, ulpi, hsic, pcie
144 - ulpi: ulpi-0
200 ULPI ports:
249 - 1x ULPI: ulpi-0
302 ulpi {
306 ulpi-0 {
385 ulpi-0 {
H A Dnvidia,tegra124-xusb-padctl.yaml23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
145 ulpi:
153 ulpi-0:
434 ulpi-0:
555 ulpi {
557 ulpi-0 {
634 ulpi-0 {
H A Dqcom,usb-hs-phy.txt61 Definition: Should contain a sequence of ULPI address and value pairs to
70 ulpi {
H A Dqcom,usb-hs-phy.yaml78 Sequence of ULPI address and value pairs to
102 ulpi {
/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra124-apalis.dtsi524 ulpi-clk-py0 {
531 ulpi-dir-py1 {
538 ulpi-nxt-py2 {
545 ulpi-stp-py3 {
866 ulpi-data5-po6 {
868 nvidia,function = "ulpi";
884 ulpi-data4-po5 {
886 nvidia,function = "ulpi";
1294 ulpi-data7-po0 { /* NC */
1296 nvidia,function = "ulpi";
[all...]
H A Dtegra124-apalis-v1.2.dtsi527 ulpi-clk-py0 {
534 ulpi-dir-py1 {
541 ulpi-nxt-py2 {
548 ulpi-stp-py3 {
869 ulpi-data5-po6 {
871 nvidia,function = "ulpi";
887 ulpi-data4-po5 {
889 nvidia,function = "ulpi";
1297 ulpi-data7-po0 { /* NC */
1299 nvidia,function = "ulpi";
[all...]
H A Dtegra20-colibri.dtsi168 * ULPI EHCI instance 1 USB2_DP/N -> AX88772B
170 ulpi {
172 nvidia,function = "ulpi";
176 ulpi-refclk {
715 /* EHCI instance 1: ULPI PHY -> AX88772B (On-module) */
H A Dtegra124-nyan-blaze.dts467 nvidia,function = "ulpi";
474 nvidia,function = "ulpi";
481 nvidia,function = "ulpi";
488 nvidia,function = "ulpi";
495 nvidia,function = "ulpi";
502 nvidia,function = "ulpi";
509 nvidia,function = "ulpi";
516 nvidia,function = "ulpi";
/freebsd/sys/arm/nvidia/
H A Dtegra_pinmux.c189 GMUX(0x000, O, 1, ulpi_data0_po1, spi3, hsi, uarta, ulpi),
190 GMUX(0x004, O, 2, ulpi_data1_po2, spi3, hsi, uarta, ulpi),
191 GMUX(0x008, O, 3, ulpi_data2_po3, spi3, hsi, uarta, ulpi),
192 GMUX(0x00C, O, 4, ulpi_data3_po4, spi3, hsi, uarta, ulpi),
193 GMUX(0x010, O, 5, ulpi_data4_po5, spi2, hsi, uarta, ulpi),
194 GMUX(0x014, O, 6, ulpi_data5_po6, spi2, hsi, uarta, ulpi),
195 GMUX(0x018, O, 7, ulpi_data6_po7, spi2, hsi, uarta, ulpi),
196 GMUX(0x01C, O, 0, ulpi_data7_po0, spi2, hsi, uarta, ulpi),
197 GMUX(0x020, P, 9, ulpi_clk_py0, spi1, spi5, uartd, ulpi),
198 GMUX(0x024, P, 1, ulpi_dir_py1, spi1, spi5, uartd, ulpi),
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dasp834x-redboot.dts156 /* phy type (ULPI or SERIAL) are only types supported for MPH */
165 phy_type = "ulpi";
168 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
177 phy_type = "ulpi";
H A Dmpc834x_mds.dts142 /* phy type (ULPI or SERIAL) are only types supported for MPH */
151 phy_type = "ulpi";
154 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
163 phy_type = "ulpi";
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dmpc8536ds.dtsi186 phy_type = "ulpi";
190 phy_type = "ulpi";
242 phy_type = "ulpi";
H A Dp1020utm-pc.dtsi127 phy_type = "ulpi";
138 phy_type = "ulpi";
H A Dp1020mbg-pc.dtsi138 phy_type = "ulpi";
149 phy_type = "ulpi";
H A Dp1022rdk.dts105 phy_type = "ulpi";
109 phy_type = "ulpi";
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx27-phytec-phycard-s-som.dtsi164 phy_type = "ulpi";
172 phy_type = "ulpi";
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Domap-usb-host.txt32 - single-ulpi-bypass: Must be present if the controller contains a single
33 ULPI bypass control bit. e.g. OMAP3 silicon <= ES2.1
/freebsd/sys/arm/ti/usb/
H A Domap_ehci.c101 * See ULPI 1.1 specification to find the registers with Set and Clear offsets
186 /* start ULPI access*/ in omap_ehci_soft_phy_reset()
191 /* Wait for ULPI access completion */ in omap_ehci_soft_phy_reset()
237 /* Soft reset the PHY using PHY reset command over ULPI */ in omap_ehci_init()

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