/freebsd/sys/contrib/device-tree/Bindings/mmc/ |
H A D | socionext,uniphier-sd.yaml | 58 socionext,syscon-uhs-mode: 62 - description: phandle to syscon that configures UHS mode 65 A phandle to syscon with one argument that configures UHS mode. 104 pinctrl-names = "default", "uhs"; 114 sd-uhs-sdr12; 115 sd-uhs-sdr25; 116 sd-uhs-sdr50;
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H A D | cdns,sdhci.yaml | 51 cdns,phy-input-delay-sd-uhs-sdr12: 52 description: Value of the delay in the input path for SD UHS SDR12 timing 57 cdns,phy-input-delay-sd-uhs-sdr25: 58 description: Value of the delay in the input path for SD UHS SDR25 timing 63 cdns,phy-input-delay-sd-uhs-sdr50: 64 description: Value of the delay in the input path for SD UHS SDR50 timing 69 cdns,phy-input-delay-sd-uhs-ddr50: 70 description: Value of the delay in the input path for SD UHS DDR50 timing
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H A D | sdhci-sprd.txt | 24 - pinctrl-1: should contain uhs mode pin control 35 - sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing. 36 - sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing. 60 sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>;
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H A D | mmc-controller.yaml | 140 sd-uhs-sdr12: 143 SD UHS SDR12 speed is supported. 145 sd-uhs-sdr25: 148 SD UHS SDR25 speed is supported. 150 sd-uhs-sdr50: 153 SD UHS SDR50 speed is supported. 155 sd-uhs-sdr104: 158 SD UHS SDR104 speed is supported. 160 sd-uhs-ddr50: 163 SD UHS DDR5 [all...] |
H A D | sdhci-st.txt | 51 - sd-uhs-sdr50: To enable the SDR50 in the mmcss. 54 - sd-uhs-sdr104: To enable the SDR104 in the mmcss. 57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss. 107 sd-uhs-sdr50; 108 sd-uhs-sdr104; 109 sd-uhs-ddr50;
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H A D | brcm,sdhci-brcmstb.txt | 6 NOTE: The driver disables all UHS speed modes by default and depends 21 sd-uhs-sdr50; 22 sd-uhs-ddr50; 23 sd-uhs-sdr104;
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H A D | sdhci-am654.yaml | 80 description: Output tap delay for SD UHS SDR12 timing 86 description: Output tap delay for SD UHS SDR25 timing 92 description: Output tap delay for SD UHS SDR50 timing 98 description: Output tap delay for SD UHS SDR104 timing 104 description: Output tap delay for SD UHS DDR50 timing 150 description: Input tap delay for SD UHS SDR12 timing 156 description: Input tap delay for SD UHS SDR25 timing
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H A D | brcm,sdhci-brcmstb.yaml | 91 sd-uhs-sdr50; 92 sd-uhs-ddr50; 93 sd-uhs-sdr104;
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/freebsd/sys/contrib/device-tree/src/arm64/sprd/ |
H A D | ums512-1h10.dts | 45 sprd,phy-delay-sd-uhs-sdr104 = <0x7f 0x73 0x72 0x72>; 46 sprd,phy-delay-sd-uhs-sdr50 = <0x6e 0x7f 0x01 0x01>; 49 sd-uhs-sdr104; 50 sd-uhs-sdr50;
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/freebsd/sys/dev/mmc/ |
H A D | mmc_helpers.c | 44 * All UHS-I modes requires 1.8V signaling. in mmc_parse_sd_speed() 50 if (device_has_property(dev, "sd-uhs-sdr12") && !no_18v) in mmc_parse_sd_speed() 52 if (device_has_property(dev, "sd-uhs-sdr25") && !no_18v) in mmc_parse_sd_speed() 54 if (device_has_property(dev, "sd-uhs-sdr50") && !no_18v) in mmc_parse_sd_speed() 56 if (device_has_property(dev, "sd-uhs-sdr104") && !no_18v) in mmc_parse_sd_speed() 58 if (device_has_property(dev, "sd-uhs-ddr50") && !no_18v) in mmc_parse_sd_speed()
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H A D | bridge.h | 153 #define MMC_CAP_UHS_SDR12 (1 << 6) /* Can do UHS SDR12 */ 154 #define MMC_CAP_UHS_SDR25 (1 << 7) /* Can do UHS SDR25 */ 155 #define MMC_CAP_UHS_SDR50 (1 << 8) /* Can do UHS SDR50 */ 156 #define MMC_CAP_UHS_SDR104 (1 << 9) /* Can do UHS SDR104 */ 157 #define MMC_CAP_UHS_DDR50 (1 << 10) /* Can do UHS DDR50 */
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/freebsd/sys/contrib/device-tree/src/riscv/microchip/ |
H A D | mpfs-polarberry.dts | 68 sd-uhs-sdr12; 69 sd-uhs-sdr25; 70 sd-uhs-sdr50; 71 sd-uhs-sdr104;
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H A D | mpfs-sev-kit.dts | 101 sd-uhs-sdr12; 102 sd-uhs-sdr25; 103 sd-uhs-sdr50; 104 sd-uhs-sdr104;
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H A D | microchip-mpfs-icicle-kit.dts | 77 sd-uhs-sdr12; 78 sd-uhs-sdr25; 79 sd-uhs-sdr50; 80 sd-uhs-sdr104;
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H A D | mpfs-m100pfsevp.dts | 117 sd-uhs-sdr12; 118 sd-uhs-sdr25; 119 sd-uhs-sdr50; 120 sd-uhs-sdr104;
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H A D | mpfs-icicle-kit.dts | 140 sd-uhs-sdr12; 141 sd-uhs-sdr25; 142 sd-uhs-sdr50; 143 sd-uhs-sdr104;
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | fsl-ls1012a-rdb.dts | 29 sd-uhs-sdr104; 30 sd-uhs-sdr50; 31 sd-uhs-sdr25; 32 sd-uhs-sdr12;
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H A D | fsl-lx2160a-clearfog-itx.dtsi | 92 sd-uhs-sdr104; 93 sd-uhs-sdr50; 94 sd-uhs-sdr25; 95 sd-uhs-sdr12;
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H A D | fsl-ls1046a-rdb.dts | 41 sd-uhs-sdr104; 42 sd-uhs-sdr50; 43 sd-uhs-sdr25; 44 sd-uhs-sdr12;
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H A D | fsl-lx2160a-rdb.dts | 130 sd-uhs-sdr104; 131 sd-uhs-sdr50; 132 sd-uhs-sdr25; 133 sd-uhs-sdr12;
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/ |
H A D | rk3288-veyron-sdmmc.dtsi | 89 sd-uhs-sdr12; 90 sd-uhs-sdr25; 91 sd-uhs-sdr50; 92 sd-uhs-sdr104;
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H A D | rv1126-edgeble-neu2-io.dts | 103 sd-uhs-sdr12; 104 sd-uhs-sdr25; 105 sd-uhs-sdr104;
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H A D | rk3288-phycore-rdk.dts | 231 sd-uhs-sdr12; 232 sd-uhs-sdr25; 233 sd-uhs-sdr50; 234 sd-uhs-sdr104;
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/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | stih410-b2120.dts | 39 sd-uhs-sdr50; 40 sd-uhs-sdr104; 41 sd-uhs-ddr50;
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H A D | stih418-b2199.dts | 92 sd-uhs-sdr50; 93 sd-uhs-sdr104; 94 sd-uhs-ddr50;
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