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/linux/drivers/irqchip/
H A Dirq-sifive-plic.c1 // SPDX-License-Identifier: GPL-2.0
6 #define pr_fmt(fmt) "riscv-plic: " fmt
25 * This driver implements a version of the RISC-V PLIC with the actual layout
28 * https://static.dev.sifive.com/U54-MC-RVCoreIP.pdf
30 * The largest number supported by devices marked as 'sifive,plic-1.0.0', is
31 * 1024, of which device 0 is defined as non-existent by the RISC-V Privileged
112 raw_spin_lock_irqsave(&handler->enable_lock, flags); in plic_toggle()
113 __plic_toggle(handler->enable_base, hwirq, enable); in plic_toggle()
114 raw_spin_unlock_irqrestore(&handler->enable_lock, flags); in plic_toggle()
125 plic_toggle(handler, d->hwirq, enable); in plic_irq_toggle()
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