| /freebsd/contrib/llvm-project/libcxx/src/include/ryu/ |
| H A D | d2fixed_full_table.h | 62 { 1u, 72057594037927936u, 0u },
63 { 699646928636035157u, 72057594u, 0u },
64 { 1u, 0u, 256u },
65 { 11902091922964236229u, 4722366482869u, 0u },
66 { 6760415703743915872u, 4722u, 0u },
67 { 1u, 0u, 16777216u },
68 { 13369850649504950658u, 309485009821345068u, 0u },
69 { 15151142278969419334u, 309485009u, 0u },
70 { 1u, 0u, 75511627776u },
71 { 4635408826454083567u, 9437866644873197963u, 1099u },
[all …]
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| H A D | d2s_full_table.h | 50 { 1u, 288230376151711744u }, { 3689348814741910324u, 230584300921369395u },
51 { 2951479051793528259u, 184467440737095516u }, { 17118578500402463900u, 147573952589676412u },
52 { 12632330341676300947u, 236118324143482260u }, { 10105864273341040758u, 188894659314785808u },
53 { 15463389048156653253u, 151115727451828646u }, { 17362724847566824558u, 241785163922925834u },
54 { 17579528692795369969u, 193428131138340667u }, { 6684925324752475329u, 154742504910672534u },
55 { 18074578149087781173u, 247588007857076054u }, { 18149011334012135262u, 198070406285660843u },
56 { 3451162622983977240u, 158456325028528675u }, { 5521860196774363583u, 253530120045645880u },
57 { 4417488157419490867u, 202824096036516704u }, { 7223339340677503017u, 162259276829213363u },
58 { 7867994130342094503u, 259614842926741381u }, { 2605046489531765280u, 207691874341393105u },
59 { 2084037191625412224u, 166153499473114484u }, { 10713157136084480204u, 265845599156983174u },
[all …]
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| /freebsd/sys/dev/cxgb/ |
| H A D | cxgb_t3fw.h | 31 #define U (unsigned char) macro
35 U 0x60, U 0x00, U 0x74, U 0x00,
36 U 0x20, U 0x03, U 0x80, U 0x00,
37 U 0x20, U 0x03, U 0x70, U 0x00,
38 U 0x00, U 0x00, U 0x10, U 0x00,
39 U 0x00, U 0x00, U 0x20, U 0x00,
40 U 0xE1, U 0x00, U 0x02, U 0x84,
41 U 0x00, U 0x07, U 0x00, U 0x00,
42 U 0xE1, U 0x00, U 0x02, U 0x88,
43 U 0x00, U 0x01, U 0x00, U 0x00,
[all …]
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| H A D | t3b_tp_eeprom.h | 31 #define U (unsigned char) macro
35 U 0x00, U 0x01, U 0x01, U 0x00,
36 U 0x00, U 0x00, U 0x00, U 0x00,
37 U 0x03, U 0x00, U 0x00, U 0x00,
38 U 0x00, U 0x00, U 0x00, U 0x00,
39 U 0x0C, U 0x00, U 0x00, U 0x00,
40 U 0x00, U 0x00, U 0x00, U 0x00,
41 U 0x30, U 0x00, U 0x00, U 0x00,
42 U 0x00, U 0x00, U 0x00, U 0x00,
43 U 0xC0, U 0x00, U 0x00, U 0x00,
[all …]
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| H A D | t3c_tp_eeprom.h | 31 #define U (unsigned char) macro
35 U 0x00, U 0x01, U 0x01, U 0x00,
36 U 0x01, U 0x00, U 0x00, U 0x00,
37 U 0x01, U 0x00, U 0x00, U 0x00,
38 U 0x04, U 0x00, U 0x00, U 0x00,
39 U 0x04, U 0x00, U 0x00, U 0x00,
40 U 0x10, U 0x00, U 0x00, U 0x00,
41 U 0x10, U 0x00, U 0x00, U 0x00,
42 U 0x40, U 0x00, U 0x00, U 0x00,
43 U 0x40, U 0x00, U 0x00, U 0x00,
[all …]
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| H A D | t3b_protocol_sram.h | 31 #define U (unsigned char) macro
35 U 0xFF, U 0xFF, U 0xFF, U 0xFC,
36 U 0x00, U 0x00, U 0x00, U 0x00,
37 U 0x00, U 0x00, U 0x00, U 0x03,
38 U 0x00, U 0x00, U 0x00, U 0x00,
39 U 0x00, U 0x01, U 0x01, U 0x00,
40 U 0xFF, U 0xFF, U 0xFF, U 0xFC,
41 U 0x00, U 0x00, U 0x00, U 0x00,
42 U 0x00, U 0x00, U 0x00, U 0x03,
43 U 0x00, U 0x00, U 0x00, U 0x00,
[all …]
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| H A D | t3c_protocol_sram.h | 31 #define U (unsigned char) macro
35 U 0xFF, U 0xFF, U 0xFF, U 0xF4,
36 U 0x00, U 0x00, U 0x00, U 0x04,
37 U 0x00, U 0x00, U 0x00, U 0x01,
38 U 0x00, U 0x00, U 0x00, U 0x01,
39 U 0x00, U 0x01, U 0x01, U 0x00,
40 U 0xFF, U 0xFF, U 0xFF, U 0xF4,
41 U 0x00, U 0x00, U 0x00, U 0x04,
42 U 0x00, U 0x00, U 0x00, U 0x01,
43 U 0x00, U 0x00, U 0x00, U 0x01,
[all …]
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| /freebsd/contrib/llvm-project/compiler-rt/lib/sanitizer_common/symbolizer/scripts/ |
| H A D | global_symbols.txt | 4 _GLOBAL_OFFSET_TABLE_ U
5 _ZN11__sanitizer13internal_mmapEPvjiiiy U
6 _ZN11__sanitizer13internal_mmapEPvmiiiy U
7 _ZN11__sanitizer13internal_openEPKcij U
8 _ZN11__sanitizer13internal_statEPKcPv U
9 _ZN11__sanitizer14internal_closeEi U
10 _ZN11__sanitizer14internal_fstatEiPv U
11 _ZN11__sanitizer14internal_lstatEPKcPv U
12 _ZN11__sanitizer15internal_strlenEPKc U
13 _ZN11__sanitizer16internal_iserrorEjPi U
[all …]
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| /freebsd/crypto/openssh/ |
| H A D | libcrux_mlkem768_sha3.h | 268 #define CORE_NUM__U32_8__BITS (32U)
270 static inline uint64_t core_num__u64_9__from_le_bytes(uint8_t x0[8U]);
272 static inline void core_num__u64_9__to_le_bytes(uint64_t x0, uint8_t x1[8U]);
278 #define LIBCRUX_ML_KEM_CONSTANTS_SHARED_SECRET_SIZE ((size_t)32U)
280 #define LIBCRUX_ML_KEM_CONSTANTS_BITS_PER_COEFFICIENT ((size_t)12U)
282 #define LIBCRUX_ML_KEM_CONSTANTS_COEFFICIENTS_IN_RING_ELEMENT ((size_t)256U)
285 (LIBCRUX_ML_KEM_CONSTANTS_COEFFICIENTS_IN_RING_ELEMENT * (size_t)12U)
288 (LIBCRUX_ML_KEM_CONSTANTS_BITS_PER_RING_ELEMENT / (size_t)8U)
290 #define LIBCRUX_ML_KEM_CONSTANTS_CPA_PKE_KEY_GENERATION_SEED_SIZE ((size_t)32U)
292 #define LIBCRUX_ML_KEM_CONSTANTS_H_DIGEST_SIZE ((size_t)32U)
[all …]
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| /freebsd/sys/contrib/device-tree/include/dt-bindings/reset/ |
| H A D | tegra234-reset.h | 13 #define TEGRA234_RESET_ACTMON 1U
14 #define TEGRA234_RESET_ADSP_ALL 2U
15 #define TEGRA234_RESET_DSI_CORE 3U
16 #define TEGRA234_RESET_CAN1 4U
17 #define TEGRA234_RESET_CAN2 5U
18 #define TEGRA234_RESET_DLA0 6U
19 #define TEGRA234_RESET_DLA1 7U
20 #define TEGRA234_RESET_DPAUX 8U
21 #define TEGRA234_RESET_OFA 9U
22 #define TEGRA234_RESET_NVJPG1 10U
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64PerfectShuffle.h | 28 135053414U, // <0,0,0,0>: Cost 1 vdup0 LHS
29 2080972802U, // <0,0,0,1>: Cost 2 ins <0,0,u,1>, lane 2
30 1679065190U, // <0,0,0,2>: Cost 2 vuzpl <0,2,0,2>, LHS
31 2085707777U, // <0,0,0,3>: Cost 2 ins <0,u,0,3>, lane 1
32 1476398390U, // <0,0,0,4>: Cost 2 vext1 <0,0,0,0>, RHS
33 2080440323U, // <0,0,0,5>: Cost 2 ins <0,0,0,u>, lane 3
34 2080440323U, // <0,0,0,6>: Cost 2 ins <0,0,0,u>, lane 3
35 2080440323U, // <0,0,0,7>: Cost 2 ins <0,0,0,u>, lane 3
36 135053414U, // <0,0,0,u>: Cost 1 vdup0 LHS
37 1812774912U, // <0,0,1,0>: Cost 2 vzipl LHS, <0,0,0,0>
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMPerfectShuffle.h | 26 135053414U, // <0,0,0,0>: Cost 1 vdup0 LHS
27 1543503974U, // <0,0,0,1>: Cost 2 vext2 <0,0,0,0>, LHS
28 2618572962U, // <0,0,0,2>: Cost 3 vext2 <0,2,0,0>, <0,2,0,0>
29 2568054923U, // <0,0,0,3>: Cost 3 vext1 <3,0,0,0>, <3,0,0,0>
30 1476398390U, // <0,0,0,4>: Cost 2 vext1 <0,0,0,0>, RHS
31 2550140624U, // <0,0,0,5>: Cost 3 vext1 <0,0,0,0>, <5,1,7,3>
32 2550141434U, // <0,0,0,6>: Cost 3 vext1 <0,0,0,0>, <6,2,7,3>
33 2591945711U, // <0,0,0,7>: Cost 3 vext1 <7,0,0,0>, <7,0,0,0>
34 135053414U, // <0,0,0,u>: Cost 1 vdup0 LHS
35 2886516736U, // <0,0,1,0>: Cost 3 vzipl LHS, <0,0,0,0>
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCPerfectShuffle.h | 26 202162278U, // <0,0,0,0>: Cost 1 vspltisw0 LHS
27 1140850790U, // <0,0,0,1>: Cost 2 vmrghw <0,0,0,0>, LHS
28 2617247181U, // <0,0,0,2>: Cost 3 vsldoi4 <0,0,0,0>, <2,0,3,0>
29 2635163787U, // <0,0,0,3>: Cost 3 vsldoi4 <3,0,0,0>, <3,0,0,0>
30 1543507254U, // <0,0,0,4>: Cost 2 vsldoi4 <0,0,0,0>, RHS
31 2281701705U, // <0,0,0,5>: Cost 3 vmrglw <0,0,0,0>, <0,4,0,5>
32 2617250133U, // <0,0,0,6>: Cost 3 vsldoi4 <0,0,0,0>, <6,0,7,0>
33 2659054575U, // <0,0,0,7>: Cost 3 vsldoi4 <7,0,0,0>, <7,0,0,0>
34 202162278U, // <0,0,0,u>: Cost 1 vspltisw0 LHS
35 1141686282U, // <0,0,1,0>: Cost 2 vmrghw LHS, <0,0,1,1>
[all …]
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| /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/ |
| H A D | tegra234-clock.h | 13 #define TEGRA234_CLK_ACTMON 1U
15 #define TEGRA234_CLK_ADSP 2U
17 #define TEGRA234_CLK_ADSPNEON 3U
19 #define TEGRA234_CLK_AHUB 4U
21 #define TEGRA234_CLK_APB2APE 5U
23 #define TEGRA234_CLK_APE 6U
25 #define TEGRA234_CLK_AUD_MCLK 7U
27 #define TEGRA234_CLK_AXI_CBB 8U
29 #define TEGRA234_CLK_CAN1 9U
31 #define TEGRA234_CLK_CAN1_HOST 10U
[all …]
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| /freebsd/contrib/pjdfstest/tests/open/ |
| H A D | 06.t | 22 expect 0 -u 65534 -g 65534 create ${n1} 0644
24 expect 0 -u 65534 -g 65534 chmod ${n1} 0600
25 expect 0 -u 65534 -g 65534 open ${n1} O_RDONLY,
26 expect 0 -u 65534 -g 65534 open ${n1} O_WRONLY,
27 expect 0 -u 65534 -g 65534 open ${n1} O_RDWR,
28 expect 0 -u 65534 -g 65534 chmod ${n1} 0060
29 expect 0 -u 65533 -g 65534 open ${n1} O_RDONLY,
30 expect 0 -u 65533 -g 65534 open ${n1} O_WRONLY,
31 expect 0 -u 65533 -g 65534 open ${n1} O_RDWR,
32 expect 0 -u 65534 -g 65534 chmod ${n1} 0006
[all …]
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| /freebsd/usr.sbin/cxgbetool/ |
| H A D | tcbshowt5.c | 45 PR(" %-12s (%-2u), %s, lock_tid %u, rss_fw %u\n", in t5_display_tcb_aux_0()
57 PR(" maxseg %u, recv_scaleflag %u, recv_tstmp %u, recv_sack %u\n", in t5_display_tcb_aux_0()
63 PR(" timer %u, dack_timer %u\n", in t5_display_tcb_aux_0()
65 PR(" mod_schd: tx: %u, rx: %u, reason 0x%1x\n", in t5_display_tcb_aux_0()
73 PR(" max_rt %-2u, rxtshift %u, keepalive %u\n", in t5_display_tcb_aux_0()
80 PR(" t_rtt_ts_recent_age %u t_rttseq_recent %u\n", in t5_display_tcb_aux_0()
82 PR(" t_srtt %u, t_rttvar %u\n", in t5_display_tcb_aux_0()
91 PR(" snd_una %u, snd_nxt %u, snd_max %u, tx_max %u\n", in t5_display_tcb_aux_0()
94 PR(" core_fin %u, tx_hdr_offset %u\n", in t5_display_tcb_aux_0()
98 PR(" rcv_adv %-5u << %-2u == %u (recv_scaleflag %u rcv_scale %u active open %u)\n", in t5_display_tcb_aux_0()
[all …]
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| H A D | tcbshowt4.c | 45 PR(" %-12s (%-2u), %s, lock_tid %u, init %u\n", in t4_display_tcb_aux_0()
57 PR(" maxseg %u, recv_scaleflag %u, recv_tstmp %u, recv_sack %u\n", in t4_display_tcb_aux_0()
63 PR(" timer %u, dack_timer %u\n", in t4_display_tcb_aux_0()
65 PR(" mod_schd: tx: %u, rx: %u, reason 0x%1x\n", in t4_display_tcb_aux_0()
73 PR(" max_rt %-2u, rxtshift %u, keepalive %u\n", in t4_display_tcb_aux_0()
80 PR(" t_rtt_ts_recent_age %u t_rttseq_recent %u\n", in t4_display_tcb_aux_0()
82 PR(" t_srtt %u, t_rttvar %u\n", in t4_display_tcb_aux_0()
91 PR(" snd_una %u, snd_nxt %u, snd_max %u, tx_max %u\n", in t4_display_tcb_aux_0()
94 PR(" core_fin %u, tx_hdr_offset %u\n", in t4_display_tcb_aux_0()
98 PR(" rcv_adv %-5u << %-2u == %u (recv_scaleflag %u rcv_scale %u active open %u)\n", in t4_display_tcb_aux_0()
[all …]
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| H A D | tcbshowt6.c | 45 PR(" %-12s (%-2u), %s, lock_tid %u, rss_fw %u\n", in t6_display_tcb_aux_0()
57 PR(" maxseg %u, recv_scaleflag %u, recv_tstmp %u, recv_sack %u\n", in t6_display_tcb_aux_0()
63 PR(" timer %u, dack_timer %u\n", in t6_display_tcb_aux_0()
65 PR(" mod_schd: tx: %u, rx: %u, reason 0x%1x\n", in t6_display_tcb_aux_0()
73 PR(" max_rt %-2u, rxtshift %u, keepalive %u\n", in t6_display_tcb_aux_0()
80 PR(" t_rtt_ts_recent_age %u t_rttseq_recent %u\n", in t6_display_tcb_aux_0()
82 PR(" t_srtt %u, t_rttvar %u\n", in t6_display_tcb_aux_0()
91 PR(" snd_una %u, snd_nxt %u, snd_max %u, tx_max %u\n", in t6_display_tcb_aux_0()
94 PR(" core_fin %u, tx_hdr_offset %u\n", in t6_display_tcb_aux_0()
98 PR(" rcv_adv %-5u << %-2u == %u (recv_scaleflag %u rcv_scale %u active open %u)\n", in t6_display_tcb_aux_0()
[all …]
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| /freebsd/sys/dev/eqos/ |
| H A D | if_eqos_reg.h | 39 #define GMAC_MAC_CONFIGURATION_CST (1U << 21)
40 #define GMAC_MAC_CONFIGURATION_ACS (1U << 20)
41 #define GMAC_MAC_CONFIGURATION_BE (1U << 18)
42 #define GMAC_MAC_CONFIGURATION_JD (1U << 17)
43 #define GMAC_MAC_CONFIGURATION_JE (1U << 16)
44 #define GMAC_MAC_CONFIGURATION_PS (1U << 15)
45 #define GMAC_MAC_CONFIGURATION_FES (1U << 14)
46 #define GMAC_MAC_CONFIGURATION_DM (1U << 13)
47 #define GMAC_MAC_CONFIGURATION_DCRS (1U << 9)
48 #define GMAC_MAC_CONFIGURATION_TE (1U << 1)
[all …]
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| /freebsd/sys/dev/ic/ |
| H A D | quicc.h | 41 #define QUICC_PRAM_BASE_SCC(u) (QUICC_PRAM_BASE + QUICC_PRAM_SIZE_SCC * (u)) argument
44 #define QUICC_PRAM_SCC_RBASE(u) (QUICC_PRAM_BASE_SCC(u) + 0x00) argument
45 #define QUICC_PRAM_SCC_TBASE(u) (QUICC_PRAM_BASE_SCC(u) + 0x02) argument
46 #define QUICC_PRAM_SCC_RFCR(u) (QUICC_PRAM_BASE_SCC(u) + 0x04) argument
47 #define QUICC_PRAM_SCC_TFCR(u) (QUICC_PRAM_BASE_SCC(u) + 0x05) argument
48 #define QUICC_PRAM_SCC_MRBLR(u) (QUICC_PRAM_BASE_SCC(u) + 0x06) argument
49 #define QUICC_PRAM_SCC_RBPTR(u) (QUICC_PRAM_BASE_SCC(u) + 0x10) argument
50 #define QUICC_PRAM_SCC_TBPTR(u) (QUICC_PRAM_BASE_SCC(u) + 0x20) argument
57 #define QUICC_PRAM_SCC_UART_MAX_IDL(u) (QUICC_PRAM_BASE_SCC(u) + 0x38) argument
58 #define QUICC_PRAM_SCC_UART_IDLC(u) (QUICC_PRAM_BASE_SCC(u) + 0x3a) argument
[all …]
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| /freebsd/sys/arm/allwinner/ |
| H A D | aw_mmc.h | 70 #define AW_MMC_GCTL_SOFT_RST (1U << 0)
71 #define AW_MMC_GCTL_FIFO_RST (1U << 1)
72 #define AW_MMC_GCTL_DMA_RST (1U << 2)
73 #define AW_MMC_GCTL_INT_ENB (1U << 4)
74 #define AW_MMC_GCTL_DMA_ENB (1U << 5)
75 #define AW_MMC_GCTL_CD_DBC_ENB (1U << 8)
76 #define AW_MMC_GCTL_DDR_MOD_SEL (1U << 10)
77 #define AW_MMC_GCTL_WAIT_MEM_ACCESS (1U << 30)
78 #define AW_MMC_GCTL_FIFO_AC_MOD (1U << 31)
84 #define AW_MMC_CKCR_ENB (1U << 16)
[all …]
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| /freebsd/contrib/tcpdump/ |
| H A D | print-openflow-1.3.c | 46 #define OFPT_HELLO 0U
47 #define OFPT_ERROR 1U
48 #define OFPT_ECHO_REQUEST 2U
49 #define OFPT_ECHO_REPLY 3U
50 #define OFPT_EXPERIMENTER 4U
51 #define OFPT_FEATURES_REQUEST 5U
52 #define OFPT_FEATURES_REPLY 6U
53 #define OFPT_GET_CONFIG_REQUEST 7U
54 #define OFPT_GET_CONFIG_REPLY 8U
55 #define OFPT_SET_CONFIG 9U
[all …]
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| /freebsd/sys/dev/xen/xenstore/ |
| H A D | xenstore_dev.c | 79 } u; member
94 xs_queue_reply(struct xs_dev_data *u, const char *data, unsigned int len) in xs_queue_reply() argument
98 for (i = 0; i < len; i++, u->read_prod++) in xs_queue_reply()
99 u->read_buffer[MASK_READ_IDX(u->read_prod)] = data[i]; in xs_queue_reply()
101 KASSERT((u->read_prod - u->read_cons) <= sizeof(u->read_buffer), in xs_queue_reply()
104 wakeup(u); in xs_queue_reply()
105 selwakeup(&u->ev_rsel); in xs_queue_reply()
121 xs_dev_return_error(struct xs_dev_data *u, int error, int req_id, int tx_id) in xs_dev_return_error() argument
138 mtx_lock(&u->lock); in xs_dev_return_error()
139 xs_queue_reply(u, (char *)&msg, sizeof(msg)); in xs_dev_return_error()
[all …]
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| /freebsd/contrib/gdtoa/ |
| H A D | strtodI.c | 36 ulpdown(d) U *d; in ulpdown()
38 ulpdown(U *d)
41 double u; local
44 u = ulp(d);
47 u *= 0.5;
48 return u;
62 U *u; local
65 u = (U*)dd;
69 dval(&u[0]) = dval(&u[1]) = 0.;
73 dval(&u[0]) = dval(&u[1]) = 0.;
[all …]
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| /freebsd/sys/dev/sound/pci/ |
| H A D | atiixp.h | 67 #define ATI_REG_ISR_IN_XRUN (1U<<0)
68 #define ATI_REG_ISR_IN_STATUS (1U<<1)
69 #define ATI_REG_ISR_OUT_XRUN (1U<<2)
70 #define ATI_REG_ISR_OUT_STATUS (1U<<3)
71 #define ATI_REG_ISR_SPDF_XRUN (1U<<4)
72 #define ATI_REG_ISR_SPDF_STATUS (1U<<5)
73 #define ATI_REG_ISR_PHYS_INTR (1U<<8)
74 #define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
75 #define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
76 #define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
[all …]
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