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/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra114-tsec.yaml4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-tsec.yaml#
20 - nvidia,tegra114-tsec
21 - nvidia,tegra124-tsec
22 - nvidia,tegra210-tsec
25 - const: nvidia,tegra132-tsec
26 - const: nvidia,tegra124-tsec
62 tsec@54500000 {
63 compatible = "nvidia,tegra114-tsec";
/linux/arch/powerpc/boot/dts/fsl/
H A Dmpc8641si-post.dtsi59 model = "TSEC";
63 model = "TSEC";
67 model = "TSEC";
71 model = "TSEC";
/linux/drivers/rtc/
H A Drtc-ds1216.c16 u8 tsec; member
113 regs.tsec = 0; /* clear 0.1 and 0.01 seconds */ in ds1216_rtc_set_time()
/linux/security/selinux/
H A Dhooks.c3125 * @tsec: the task's security state
3127 * Clear the task's AVD cache in @tsec and reset it to the current policy's
3130 static inline void task_avdcache_reset(struct task_security_struct *tsec) in task_avdcache_reset() argument
3132 memset(&tsec->avdcache.dir, 0, sizeof(tsec->avdcache.dir)); in task_avdcache_reset()
3133 tsec->avdcache.sid = current_sid(); in task_avdcache_reset()
3134 tsec->avdcache.seqno = avc_policy_seqno(); in task_avdcache_reset()
3135 tsec->avdcache.dir_spot = TSEC_AVDC_DIR_SIZE - 1; in task_avdcache_reset()
3140 * @tsec: the task's security state
3144 * Search @tsec for a AVD cache entry that matches @isec and return it to the
3147 static inline int task_avdcache_search(struct task_security_struct *tsec, in task_avdcache_search() argument
[all …]
/linux/include/dt-bindings/memory/
H A Dtegra186-mc.h151 /* TSEC Memory Return Data Client Description */
153 /* TSEC Memory Write Client Description */
H A Dtegra234-mc.h285 /* TSEC Memory Return Data Client Description */
287 /* TSEC Memory Write Client Description */
/linux/Documentation/networking/device_drivers/ethernet/freescale/
H A Dgianfar.rst34 TSEC (and the extended hash table on the eTSEC) for multicast
/linux/arch/powerpc/boot/dts/
H A Dstx_gp3_8560.dts142 model = "TSEC";
180 model = "TSEC";
H A Dasp834x-redboot.dts185 model = "TSEC";
226 model = "TSEC";
H A Dtqm8541.dts153 model = "TSEC";
196 model = "TSEC";
H A Dtqm8555.dts153 model = "TSEC";
196 model = "TSEC";
H A Dtqm8540.dts154 model = "TSEC";
196 model = "TSEC";
H A Dksi8560.dts146 model = "TSEC";
184 model = "TSEC";
H A Dtqm8560.dts155 model = "TSEC";
198 model = "TSEC";
H A Dstxssa8555.dts145 model = "TSEC";
183 model = "TSEC";
H A Dmpc8349emitx.dts217 model = "TSEC";
253 model = "TSEC";
H A Dmpc8349emitxgp.dts153 model = "TSEC";
/linux/Documentation/devicetree/bindings/net/
H A Dfsl,gianfar-mdio.yaml7 title: Freescale Gianfar (TSEC) MDIO Device
/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra194-cbb.yaml35 engines like TSEC (Security co-processor), NVDEC (NVIDIA Video Decoder
/linux/drivers/gpu/host1x/
H A Ddev.c163 { /* TSEC */ .base = 0x1b10, .offset = 0x30, .limit = 0x34 },
205 { /* TSEC */ .base = 0x1b10, .offset = 0x30, .limit = 0x34 },
255 { /* TSEC MMIO */ .base = 0x16a8, .offset = 0x30, .limit = 0x34 },
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210.dtsi183 tsec@54100000 {
184 compatible = "nvidia,tegra210-tsec";
329 tsec@54500000 {
330 compatible = "nvidia,tegra210-tsec";
334 clock-names = "tsec";
336 reset-names = "tsec";
/linux/drivers/memory/tegra/
H A Dtegra124.c1087 { .name = "tsec", .swgroup = TEGRA_SWGROUP_TSEC, .reg = 0x294 },
1139 TEGRA124_MC_RESET(TSEC, 0x200, 0x204, 21),
H A Dtegra210.c1184 { .name = "tsec", .swgroup = TEGRA_SWGROUP_TSEC, .reg = 0x294 },
1260 TEGRA210_MC_RESET(TSEC, 0x200, 0x204, 22),
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra114.dtsi206 tsec@54500000 {
207 compatible = "nvidia,tegra114-tsec";
/linux/drivers/clk/tegra/
H A Dclk-tegra-periph.c628 INT8("tsec", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_TSEC, 83, 0, tegra_clk_tsec),
629 INT("tsec", mux_pllp_pllc_clkm, CLK_SOURCE_TSEC, 83, 0, tegra_clk_tsec_8),

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