| /linux/drivers/input/touchscreen/ |
| H A D | tps6507x-ts.c | 50 static int tps6507x_read_u8(struct tps6507x_ts *tsc, u8 reg, u8 *data) in tps6507x_read_u8() argument
52 return tsc->mfd->read_dev(tsc->mfd, reg, 1, data); in tps6507x_read_u8()
55 static int tps6507x_write_u8(struct tps6507x_ts *tsc, u8 reg, u8 data) in tps6507x_write_u8() argument
57 return tsc->mfd->write_dev(tsc->mfd, reg, 1, &data); in tps6507x_write_u8()
60 static s32 tps6507x_adc_conversion(struct tps6507x_ts *tsc, in tps6507x_adc_conversion() argument
69 ret = tps6507x_write_u8(tsc, TPS6507X_REG_TSCMODE, tsc_mode); in tps6507x_adc_conversion()
71 dev_err(tsc->dev, "TSC mode read failed\n"); in tps6507x_adc_conversion()
77 ret = tps6507x_write_u8(tsc, TPS6507X_REG_ADCONFIG, in tps6507x_adc_conversion()
80 dev_err(tsc->dev, "ADC config write failed\n"); in tps6507x_adc_conversion()
85 ret = tps6507x_read_u8(tsc, TPS6507X_REG_ADCONFIG, in tps6507x_adc_conversion()
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| H A D | lpc32xx_ts.c | 71 static void lpc32xx_fifo_clear(struct lpc32xx_tsc *tsc) in lpc32xx_fifo_clear() argument
73 while (!(tsc_readl(tsc, LPC32XX_TSC_STAT) & in lpc32xx_fifo_clear()
75 tsc_readl(tsc, LPC32XX_TSC_FIFO); in lpc32xx_fifo_clear()
82 struct lpc32xx_tsc *tsc = dev_id; in lpc32xx_ts_interrupt() local
83 struct input_dev *input = tsc->dev; in lpc32xx_ts_interrupt()
85 tmp = tsc_readl(tsc, LPC32XX_TSC_STAT); in lpc32xx_ts_interrupt()
89 lpc32xx_fifo_clear(tsc); in lpc32xx_ts_interrupt()
100 !(tsc_readl(tsc, LPC32XX_TSC_STAT) & in lpc32xx_ts_interrupt()
102 tmp = tsc_readl(tsc, LPC32XX_TSC_FIFO); in lpc32xx_ts_interrupt()
126 static void lpc32xx_stop_tsc(struct lpc32xx_tsc *tsc) in lpc32xx_stop_tsc() argument
[all …]
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| H A D | tsc2007_iio.c | 42 struct tsc2007 *tsc = iio->ts; in tsc2007_read_raw() local
52 mutex_lock(&tsc->mlock); in tsc2007_read_raw()
56 *val = tsc2007_xfer(tsc, READ_X); in tsc2007_read_raw()
59 *val = tsc2007_xfer(tsc, READ_Y); in tsc2007_read_raw()
62 *val = tsc2007_xfer(tsc, READ_Z1); in tsc2007_read_raw()
65 *val = tsc2007_xfer(tsc, READ_Z2); in tsc2007_read_raw()
68 *val = tsc2007_xfer(tsc, (ADC_ON_12BIT | TSC2007_MEASURE_AUX)); in tsc2007_read_raw()
73 tc.x = tsc2007_xfer(tsc, READ_X); in tsc2007_read_raw()
74 tc.z1 = tsc2007_xfer(tsc, READ_Z1); in tsc2007_read_raw()
75 tc.z2 = tsc2007_xfer(tsc, READ_Z2); in tsc2007_read_raw()
[all …]
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| H A D | cy8ctmg110_ts.c | 61 static int cy8ctmg110_write_regs(struct cy8ctmg110 *tsc, unsigned char reg, in cy8ctmg110_write_regs() argument
64 struct i2c_client *client = tsc->client; in cy8ctmg110_write_regs()
82 static int cy8ctmg110_read_regs(struct cy8ctmg110 *tsc, in cy8ctmg110_read_regs() argument
85 struct i2c_client *client = tsc->client; in cy8ctmg110_read_regs()
110 static int cy8ctmg110_touch_pos(struct cy8ctmg110 *tsc) in cy8ctmg110_touch_pos() argument
112 struct input_dev *input = tsc->input; in cy8ctmg110_touch_pos()
118 if (cy8ctmg110_read_regs(tsc, reg_p, 9, CY8CTMG110_TOUCH_X1) != 0) in cy8ctmg110_touch_pos()
156 struct cy8ctmg110 *tsc = dev_id; in cy8ctmg110_irq_thread() local
158 cy8ctmg110_touch_pos(tsc); in cy8ctmg110_irq_thread()
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| /linux/Documentation/virt/kvm/x86/ |
| H A D | timekeeping.rst | 14 3) TSC Hardware
37 First we discuss the basic hardware devices available. TSC and the related
324 3. TSC Hardware
327 The TSC or time stamp counter is relatively simple in theory; it counts
332 The TSC is represented internally as a 64-bit MSR which can be read with the
334 limitations made it possible to write the TSC, but generally on old hardware it
339 write the TSC MSR is not an architectural guarantee.
341 The TSC is accessible from CPL-0 and conditionally, for CPL > 0 software by
342 means of the CR4.TSD bit, which when enabled, disables CPL > 0 TSC access.
345 atomically not just the TSC, but an indicator which corresponds to the
[all …]
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| /linux/drivers/thermal/tegra/ |
| H A D | tegra30-tsensor.c | 163 const struct tegra_tsensor_channel *tsc = thermal_zone_device_priv(tz); in tegra_tsensor_get_temp() local
164 const struct tegra_tsensor *ts = tsc->ts; in tegra_tsensor_get_temp()
172 err = readl_relaxed_poll_timeout(tsc->regs + TSENSOR_SENSOR0_STATUS0, val, in tegra_tsensor_get_temp()
177 dev_err_once(ts->dev, "ch%u: counter invalid\n", tsc->id); in tegra_tsensor_get_temp()
181 val = readl_relaxed(tsc->regs + TSENSOR_SENSOR0_TS_STATUS1); in tegra_tsensor_get_temp()
190 dev_err_once(ts->dev, "ch%u: counter overflow\n", tsc->id); in tegra_tsensor_get_temp()
221 const struct tegra_tsensor_channel *tsc = thermal_zone_device_priv(tz); in tegra_tsensor_set_trips() local
222 const struct tegra_tsensor *ts = tsc->ts; in tegra_tsensor_set_trips()
232 val = readl_relaxed(tsc->regs + TSENSOR_SENSOR0_CONFIG1); in tegra_tsensor_set_trips()
237 writel_relaxed(val, tsc->regs + TSENSOR_SENSOR0_CONFIG1); in tegra_tsensor_set_trips()
[all …]
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| /linux/drivers/clocksource/ |
| H A D | hyperv_timer.c | 147 * it depends on the slow VM Reference Counter MSR (the Hyper-V TSC in hv_stimer_init()
148 * page is not enbled in such a VM because the VM uses Invariant TSC in hv_stimer_init()
150 * TSC page shared in very early boot). in hv_stimer_init()
401 * the other that uses the TSC reference page feature as defined in the
403 * Hyper-V and 32-bit x86. The TSC reference page version is preferred.
432 * subsection Refererence Counter, guarantees that the TSC and MSR in read_hv_clock_tsc()
434 * to the MSR in case the TSC page indicates unavailability. in read_hv_clock_tsc()
457 /* Disable the TSC page */ in suspend_hv_clock_tsc()
468 /* Re-enable the TSC page */ in resume_hv_clock_tsc()
478 * used to calculate time for hv tsc page based sched_clock, to account for
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| H A D | timer-tegra186.c | 94 struct clocksource tsc; member
349 tsc); in tegra186_timer_tsc_read()
355 * The 56-bit value of the TSC is spread across two registers that are in tegra186_timer_tsc_read()
372 tegra->tsc.name = "tsc"; in tegra186_timer_tsc_init()
373 tegra->tsc.rating = 300; in tegra186_timer_tsc_init()
374 tegra->tsc.read = tegra186_timer_tsc_read; in tegra186_timer_tsc_init()
375 tegra->tsc.mask = CLOCKSOURCE_MASK(56); in tegra186_timer_tsc_init()
376 tegra->tsc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in tegra186_timer_tsc_init()
377 tegra->tsc.owner = THIS_MODULE; in tegra186_timer_tsc_init()
379 return clocksource_register_hz(&tegra->tsc, 31250000); in tegra186_timer_tsc_init()
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| /linux/tools/power/cpupower/utils/idle_monitor/ |
| H A D | mperf_monitor.c | 67 * 1) calculated after measurements if we know TSC ticks at mperf/P0 frequency
83 static int mperf_get_tsc(unsigned long long *tsc) in mperf_get_tsc() argument
87 ret = read_msr(base_cpu, MSR_TSC, tsc); in mperf_get_tsc()
89 dprint("Reading TSC MSR failed, returning %llu\n", *tsc); in mperf_get_tsc()
174 dprint("%s: TSC Ref - mperf_diff: %llu, tsc_diff: %llu\n", in mperf_get_count_percent()
208 /* Calculate max_freq from TSC count */ in mperf_get_count_freq()
217 (max_freq_mode == MAX_FREQ_TSC_REF) ? "TSC calculated" : "sysfs read"); in mperf_get_count_freq()
255 * we use TSC counter if it reliably ticks at P0/mperf frequency.
259 * on older Intel HW without invariant TSC feature.
260 * Or on AMD machines where TSC does not tick at P0 (do not exist yet, but
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| /linux/tools/perf/tests/ |
| H A D | perf-time-to-tsc.c | 20 #include "tsc.h"
26 * Except x86_64/i386 and Arm64, other archs don't support TSC in perf. Just
61 * test__perf_time_to_tsc - test converting perf time to TSC.
64 * to and from TSC is consistent with the order of events. If the test passes
65 * %0 is returned, otherwise %-1 is returned. If TSC conversion is not
186 pr_debug("1st event perf time %"PRIu64" tsc %"PRIu64"\n", in test__perf_time_to_tsc()
188 pr_debug("rdtsc time %"PRIu64" tsc %"PRIu64"\n", in test__perf_time_to_tsc()
190 pr_debug("2nd event perf time %"PRIu64" tsc %"PRIu64"\n", in test__perf_time_to_tsc()
211 TEST_CASE_REASON("TSC support", tsc_is_supported,
213 TEST_CASE_REASON("Perf time to TSC", perf_time_to_tsc,
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| /linux/arch/x86/include/asm/xen/ |
| H A D | cpuid.h | 78 * Sub-leaf 0: EAX: bit 0: emulated tsc
79 * bit 1: host tsc is known to be reliable
83 * ECX: guest tsc frequency in kHz
84 * EDX: guest tsc incarnation (migration count)
85 * Sub-leaf 1: EAX: tsc offset low part
86 * EBX: tsc offset high part
87 * ECX: multiplicator for tsc->ns conversion
88 * EDX: shift amount for tsc->ns conversion
89 * Sub-leaf 2: EAX: host tsc frequency in kHz
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| /linux/tools/perf/util/intel-pt-decoder/ |
| H A D | intel-pt-decoder.c | 362 * A TSC packet can slip past MTC packets so that the timestamp appears in intel_pt_decoder_new()
364 * cycles, which is certainly less than 0x1000 TSC ticks, but accept in intel_pt_decoder_new()
879 * For now, do not support using TSC packets - refer in intel_pt_calc_cyc_cb()
965 intel_pt_log("Timestamp: calculated %g TSC ticks per cycle too big (c.f. CBR-based value %g), pos " x64_fmt "\n", in intel_pt_calc_cyc_cb()
974 intel_pt_log("Timestamp: calculated %g TSC ticks per cycle c.f. CBR-based value %g, pos " x64_fmt "\n", in intel_pt_calc_cyc_cb()
977 intel_pt_log("Timestamp: calculated %g TSC ticks per cycle c.f. unknown CBR-based value, pos " x64_fmt "\n", in intel_pt_calc_cyc_cb()
1002 * For now, do not support using TSC packets for at least the reasons: in intel_pt_calc_cyc_to_tsc()
1004 * 2) TSC packets within PSB+ can slip against CYC packets in intel_pt_calc_cyc_to_tsc()
2320 bool tsc, pip, vmcs, tma, psbend;
2343 data->tsc in intel_pt_vm_psb_lookahead_cb()
2318 bool tsc, pip, vmcs, tma, psbend; global() member
4172 intel_pt_next_tsc(unsigned char * buf,size_t len,uint64_t * tsc,size_t * rem) intel_pt_next_tsc() argument
4412 uint64_t tsc; intel_pt_ff_cb() local
4489 uint64_t tsc; intel_pt_fast_forward() local
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| /linux/Documentation/devicetree/bindings/input/touchscreen/ |
| H A D | nxp,lpc3220-tsc.yaml | 4 $id: http://devicetree.org/schemas/input/touchscreen/nxp,lpc3220-tsc.yaml#
7 title: NXP LPC32xx SoC Touchscreen Controller (TSC)
14 const: nxp,lpc3220-tsc
38 compatible = "nxp,lpc3220-tsc";
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| H A D | ti,am3359-tsc.yaml | 4 $id: http://devicetree.org/schemas/input/touchscreen/ti,am3359-tsc.yaml#
14 const: ti,am3359-tsc
69 tsc {
70 compatible = "ti,am3359-tsc";
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| /linux/Documentation/virt/kvm/devices/ |
| H A D | vcpu.rst | 232 :Parameters: 64-bit unsigned TSC offset
242 Specifies the guest's TSC offset relative to the host's TSC. The guest's
243 TSC is then derived by the following equation:
247 This attribute is useful to adjust the guest's TSC on live migration,
248 so that the TSC counts the time during which the VM was paused. The
253 1. Invoke the KVM_GET_CLOCK ioctl to record the host TSC (tsc_src),
258 guest TSC offset (ofs_src[i]).
261 guest's TSC (freq).
277 5. Invoke the KVM_GET_CLOCK ioctl to record the host TSC (tsc_dest) and
280 6. Adjust the guest TSC offsets for every vCPU to account for (1) time
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| /linux/tools/testing/selftests/prctl/ |
| H A D | .gitignore | 2 disable-tsc-ctxt-sw-stress-test
3 disable-tsc-on-off-stress-test
4 disable-tsc-test
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| H A D | Makefile | 7 TEST_PROGS := disable-tsc-ctxt-sw-stress-test disable-tsc-on-off-stress-test \
8 disable-tsc-test set-anon-vma-name-test set-process-name
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| /linux/kernel/sched/ |
| H A D | clock.c | 53 * that is otherwise invisible (TSC gets stopped).
146 * the fact -- that TSC wasn't good. This means all our clocksources (including
153 * "tsc=unstable".
171 …printk(KERN_WARNING "TSC found unstable after boot, most likely due to broken BIOS. Use 'tsc=unsta… in __sched_clock_work()
214 * Even if TSC is buggered, we're still UP at this point so it in sched_clock_init()
225 * notably: acpi_processor and intel_idle, which can mark the TSC as unstable.
264 * - use the GTOD tick value to create a window to filter crazy TSC values
440 * The watchdog just found this TSC to (still) be stable, so now is a in sched_clock_tick_stable()
442 * TSC to be unstable, any computation will be computing crap. in sched_clock_tick_stable()
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| /linux/arch/x86/kvm/ |
| H A D | hyperv.h | 154 * With HV_ACCESS_TSC_INVARIANT feature, invariant TSC (CPUID.80000007H:EDX[8])
162 * If Hyper-V's invariant TSC control is not exposed to the guest, in kvm_hv_invtsc_suppressed()
163 * the invariant TSC CPUID flag is not suppressed, Windows guests were in kvm_hv_invtsc_suppressed()
165 * encouraged to enable Hyper-V's invariant TSC control when invariant in kvm_hv_invtsc_suppressed()
166 * TSC CPUID flag is set to make KVM's behavior match genuine Hyper-V. in kvm_hv_invtsc_suppressed()
173 * If Hyper-V's invariant TSC control is exposed to the guest, KVM is in kvm_hv_invtsc_suppressed()
174 * responsible for suppressing the invariant TSC CPUID flag if the in kvm_hv_invtsc_suppressed()
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| /linux/tools/testing/selftests/net/bench/ |
| H A D | test_bench_page_pool.sh | 19 …echo "${result}" | grep -o -E "no-softirq-page_pool01 Per elem: ([0-9]+) cycles\(tsc\) ([0-9]+\.[0…
23 …echo "${result}" | grep -o -E "no-softirq-page_pool02 Per elem: ([0-9]+) cycles\(tsc\) ([0-9]+\.[0…
27 …echo "${result}" | grep -o -E "no-softirq-page_pool03 Per elem: ([0-9]+) cycles\(tsc\) ([0-9]+\.[0…
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| /linux/arch/x86/xen/ |
| H A D | time.c | 37 /* Get the TSC speed from Xen */
475 pr_notice("xen: VDSO_CLOCKMODE_PVCLOCK not supported (tsc unstable)\n"); in xen_setup_vsyscall_time_info()
486 * Check if it is possible to safely use the tsc as a clocksource. This is
487 * only true if the hypervisor notifies the guest that its tsc is invariant,
488 * the tsc is stable, and the tsc instruction will never be emulated.
516 * As Dom0 is never moved, no penalty on using TSC there. in xen_time_init()
518 * If it is possible for the guest to determine that the tsc is a safe in xen_time_init()
519 * clocksource, then set xen_clocksource rating below that of the tsc in xen_time_init()
520 * so that the system prefers tsc instead. in xen_time_init()
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| /linux/tools/power/cpupower/debug/kernel/ |
| H A D | cpufreq-test_tsc.c | 3 * test module to check whether the TSC-based delay routine continues
15 * 1.) pass clock=tsc to the kernel on your bootloader
20 * TSC-based delay routine on the Linux kernel does not correctly
110 MODULE_DESCRIPTION("Verify the TSC cpufreq notifier working correctly -- needs ACPI-enabled system"…
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| /linux/kernel/time/ |
| H A D | clocksource-wdtest.c | 129 * Verify that tsc-like clocksources are assigned a reasonable in wdtest_func()
132 pr_info("--- Verify tsc-like uncertainty margin.\n"); in wdtest_func()
139 pr_info("--- tsc-like times: %lu - %lu = %lu.\n", j2, j1, j2 - j1); in wdtest_func()
143 /* Verify tsc-like stability with various numbers of errors injected. */ in wdtest_func()
161 /* Verify tsc-like stability with clock-value-fuzz error injection. */ in wdtest_func()
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| /linux/drivers/cpufreq/ |
| H A D | amd-pstate.h | 52 * @tsc: time stamp counter
57 u64 tsc; member
72 * @cur: Difference of Aperf/Mperf/tsc count between last and current sample
73 * @prev: Last Aperf/Mperf/tsc count value read from register
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| /linux/include/trace/events/ |
| H A D | power.h | 112 u64 tsc,
123 tsc,
135 __field(u64, tsc)
147 __entry->tsc = tsc;
152 …TP_printk("core_busy=%lu scaled=%lu from=%lu to=%lu mperf=%llu aperf=%llu tsc=%llu freq=%lu io_boo…
159 (unsigned long long)__entry->tsc,
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