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/linux/drivers/hwtracing/coresight/
H A Dcoresight-tmc.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 #include <linux/dma-mapping.h>
45 /* TMC_CTL - 0x020 */
47 /* TMC_STS - 0x00C */
53 * TMC_AXICTL - 0x110
55 * TMC AXICTL format for SoC-400
56 * Bits [0-1] : ProtCtrlBit0-1
57 * Bits [2-5] : CacheCtrlBits 0-3 (AXCACHE)
60 * Bits [8-11] : WrBurstLen
61 * Bits [12-31] : Reserved.
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H A Dcoresight-tmc-etr.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/dma-mapping.h>
17 #include "coresight-catu.h"
18 #include "coresight-etm-perf.h"
19 #include "coresight-priv.h"
20 #include "coresight-tmc.h"
36 * etr_perf_buffer - Perf buffer used for ETR
37 * @drvdata - The ETR drvdaga this buffer has been allocated for.
38 * @etr_buf - Actual buffer used by the ETR
39 * @pid - The PID of the session owner that etr_perf_buffer
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H A Dcoresight-tmc-core.c1 // SPDX-License-Identifier: GPL-2.0
22 #include <linux/dma-mapping.h>
30 #include "coresight-priv.h"
31 #include "coresight-tmc.h"
39 struct coresight_device *csdev = drvdata->csdev; in tmc_wait_for_tmcready()
40 struct csdev_access *csa = &csdev->access; in tmc_wait_for_tmcready()
44 dev_err(&csdev->dev, in tmc_wait_for_tmcready()
45 "timeout while waiting for TMC to be Ready\n"); in tmc_wait_for_tmcready()
46 return -EBUSY; in tmc_wait_for_tmcready()
53 struct coresight_device *csdev = drvdata->csdev; in tmc_flush_and_stop()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
32 modules will be called coresight-funnel and coresight-replicator.
35 tristate "Coresight generic TMC driver"
41 trace router - ETR) or sink (embedded trace FIFO). The driver
46 module will be called coresight-tmc.
54 lookup. CATU helps TMC ETR to use a large physically non-contiguous trace
55 buffer by translating the addresses used by ETR to the physical address
56 by looking up the provided table. CATU can also be used in pass-through
60 module will be called coresight-catu.
67 responsible for bridging the gap between the on-chip coresight
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
7 subdir-ccflags-y += -Wextra -Wunused -Wno-unused-parameter
8 subdir-ccflags-y += -Wmissing-declarations
9 subdir-ccflags-y += -Wmissing-format-attribute
10 subdir-ccflags-y += -Wmissing-prototypes
11 subdir-ccflags-y += -Wold-style-definition
12 subdir-ccflags-y += -Wmissing-include-dirs
13 subdir-ccflags-y += -Wno-sign-compare
15 $(call cc-option, -Wrestrict) \
16 $(call cc-option, -Wunused-but-set-variable) \
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H A Dcoresight-catu.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/dma-mapping.h>
19 #include "coresight-catu.h"
20 #include "coresight-priv.h"
21 #include "coresight-tmc.h"
24 dev_get_drvdata(csdev->dev.parent)
45 * ------------------------------------
46 * | Address [63-12] | SBZ | V|
47 * ------------------------------------
57 * SLADDR ===> x------------------x x--> x-----------------x
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/linux/Documentation/devicetree/bindings/arm/
H A Darm,coresight-tmc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
24 FIFO(ETF) and Embedded Trace Router(ETR) configurations. The configuration
25 mode (ETB, ETF, ETR) is discovered at boot time when the device is probed.
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H A Darm,embedded-trace-extension.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/arm,embedded-trace-extension.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Suzuki K Poulose <suzuki.poulose@arm.com>
12 - Mathieu Poirier <mathieu.poirier@linaro.org>
19 components (e.g, TMC-ETR) or other means (e.g, using a per CPU buffer
26 pattern: "^ete([0-9a-f]+)$"
29 - const: arm,embedded-trace-extension
36 power-domains:
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/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3660-coresight.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2016-2018 HiSilicon Ltd.
15 compatible = "arm,coresight-etm4x", "arm,primecell";
18 clock-names = "apb_pclk";
21 out-ports {
24 remote-endpoint =
32 compatible = "arm,coresight-etm4x", "arm,primecell";
35 clock-names = "apb_pclk";
38 out-ports {
41 remote-endpoint =
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H A Dhi6220-coresight.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
14 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
17 clock-names = "apb_pclk";
19 out-ports {
22 remote-endpoint =
28 in-ports {
31 remote-endpoint =
39 compatible = "arm,coresight-tmc", "arm,primecell";
42 clock-names = "apb_pclk";
44 in-ports {
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/linux/Documentation/trace/coresight/
H A Dcoresight.rst2 Coresight - HW Assisted Tracing on ARM
9 ------------
38 0 CPU 0<-->: C : 0 CPU 0<-->: C : : C : @ STM @ || System ||
39 |->0000000 : T : |->0000000 : T : : T :<--->@@@@@ || Memory ||
40 | #######<-->: I : | #######<-->: I : : I : @@@<-| ||||||||||||
43 | |->### | ! | |->### | ! | ! . | || DAP ||
49 *****************************************************************<-|
63 | * ===== F =====<---------|
65 |-->:: CTI ::<!! === N ===
69 |------>&& ETB &&<......II I =======
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/linux/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
31 #mbox-cells = <1>;
33 clock-names = "apb_pclk";
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
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/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8916.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8916.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
13 #include <dt-bindings/soc/qcom,apr.h>
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H A Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/gpio/gpio.h>
14 interrupt-parent = <&intc>;
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H A Dsm6115.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
14 #include <dt-bindings/interconnect/qcom,sm6115.h>
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H A Dmsm8996.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
8 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/interconnect/qcom,msm8996.h>
11 #include <dt-bindings/interconnect/qcom,msm8996-cbf.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/gpio/gpio.h>
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H A Dsm8150.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/dma/qcom-gpi.h>
8 #include <dt-bindings/firmware/qcom,scm.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/phy/phy-qcom-qmp.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,dispcc-sm8150.h>
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H A Dsm8250.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,osm-l3.h>
14 #include <dt-bindings/interconnect/qcom,sm8250.h>
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/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
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