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/linux/drivers/soc/qcom/
H A Drpmh-rsc.c32 #include <soc/qcom/tcs.h>
71 /* DRV TCS Configuration Information Register */
77 /* Offsets for CONTROL TCS Registers */
88 /* TCS CMD register bit mask */
102 * space are all the TCS blocks. The offset of the TCS blocks is
103 * specified in the device tree by "qcom,tcs-offset" and used to
105 * - TCS blocks come one after another. Type, count, and order are
106 * specified by the device tree as "qcom,tcs-config".
107 * - Each TCS block has some registers, then space for up to 16 commands.
109 * might be present. See ncpt (num cmds per TCS).
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H A Drpmh-internal.h12 #include <soc/qcom/tcs.h>
23 * struct tcs_group: group of Trigger Command Sets (TCS) to send state requests
27 * @type: Type of the TCS in this group - active, sleep, wake.
29 * @offset: Start of the TCS group relative to the TCSes in the RSC.
31 * @ncpt: Number of commands in each TCS.
32 * @req: Requests that are sent from the TCS; only used for ACTIVE_ONLY
33 * transfers (could be on a wake/sleep TCS if we are borrowing for
42 * MAX_CMDS_PER_TCS = 16 then bit[2] = the first bit in 2nd TCS.
98 * @tcs_base: Start address of the TCS registers in this controller.
106 * @tcs: TCS groups.
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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,rpmh-rsc.yaml15 resources can be written to the Trigger Command Set (TCS) registers and
16 using a (addr, val) pair and triggered. Messages in the TCS are then sent in
25 A TCS may be triggered from Linux or triggered by the F/W after all the CPUs
26 have powered off to facilitate idle power saving. TCS could be classified as::
66 qcom,tcs-config:
73 TCS type::
79 - description: Number of TCS
81 The tuple defining the configuration of TCS. Must have two cells which
82 describe each TCS type. The order of the TCS must match the hardware
85 qcom,tcs-offset:
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/linux/drivers/scsi/aic94xx/
H A Daic94xx_tmf.c47 #define DECLARE_TCS(tcs) \ argument
48 struct tasklet_completion_status tcs = { \
59 struct tasklet_completion_status *tcs = ascb->uldd_task; in asd_clear_nexus_tasklet_complete() local
66 tcs->dl_opcode = dl->opcode; in asd_clear_nexus_tasklet_complete()
74 struct tasklet_completion_status *tcs = ascb->uldd_task; in asd_clear_nexus_timedout() local
77 tcs->dl_opcode = TMF_RESP_FUNC_FAILED; in asd_clear_nexus_timedout()
86 DECLARE_TCS(tcs); \
95 ascb->uldd_task = &tcs; \
107 res = tcs.dl_opcode; \
248 struct tasklet_completion_status *tcs = ascb->uldd_task; in asd_tmf_timedout() local
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/linux/tools/testing/selftests/sgx/
H A Dtest_encl.c76 void *tcs = (void *)op->tcs_page; in do_encl_init_tcs_page() local
79 memset(tcs, 0, 16); /* STATE and FLAGS */ in do_encl_init_tcs_page()
80 memcpy(tcs + 16, &op->ssa, 8); /* OSSA */ in do_encl_init_tcs_page()
81 memset(tcs + 24, 0, 4); /* CSSA */ in do_encl_init_tcs_page()
83 memcpy(tcs + 28, &val_32, 4); /* NSSA */ in do_encl_init_tcs_page()
84 memcpy(tcs + 32, &op->entry, 8); /* OENTRY */ in do_encl_init_tcs_page()
85 memset(tcs + 40, 0, 24); /* AEP, OFSBASE, OGSBASE */ in do_encl_init_tcs_page()
87 memcpy(tcs + 64, &val_32, 4); /* FSLIMIT */ in do_encl_init_tcs_page()
88 memcpy(tcs + 68, &val_32, 4); /* GSLIMIT */ in do_encl_init_tcs_page()
89 memset(tcs + 72, 0, 4024); /* Reserved */ in do_encl_init_tcs_page()
H A Dtest_encl_bootstrap.S10 .section ".tcs", "aw"
43 # RBX contains the base address for TCS, which is the first address
44 # inside the enclave for TCS #1 and one page into the enclave for
45 # TCS #2. First make it relative by substracting __encl_base and
53 # Entry point for dynamically created TCS page expected to follow
87 # Stack of TCS #1
91 # Stack of TCS #2
H A Dmain.c134 * Return the offset in the enclave where the TCS segment can be found.
135 * The first RW segment loaded is the TCS.
153 * The first RW segment loaded is the TCS, skip that to get info on the
290 self->run.tcs = self->encl.encl_base; in TEST_F()
363 self->run.tcs = self->encl.encl_base; in TEST_F()
429 self->run.tcs = self->encl.encl_base;
512 self->run.tcs = self->encl.encl_base; in TEST_F()
548 self->run.tcs = self->encl.encl_base; in TEST_F()
572 * Sanity check that it is possible to enter either of the two hardcoded TCS
581 self->run.tcs = self->encl.encl_base; in TEST_F()
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H A Dtest_encl.lds5 tcs PT_LOAD;
14 .tcs : {
15 *(.tcs*)
16 } : tcs
/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_lib.c25 u8 tcs = adapter->hw_tcs; in ixgbe_cache_ring_dcb_sriov() local
28 if (tcs <= 1) in ixgbe_cache_ring_dcb_sriov()
39 if ((reg_idx & ~vmdq->mask) >= tcs) { in ixgbe_cache_ring_dcb_sriov()
50 if ((reg_idx & ~vmdq->mask) >= tcs) in ixgbe_cache_ring_dcb_sriov()
61 if (fcoe->offset < tcs) in ixgbe_cache_ring_dcb_sriov()
112 * TCs : TC0/1 TC2/3 TC4-7 in ixgbe_get_first_reg_idx()
125 * TCs : TC0 TC1 TC2/3 in ixgbe_get_first_reg_idx()
333 u8 tcs = adapter->hw_tcs; in ixgbe_set_dcb_sriov_queues() local
336 if (tcs <= 1) in ixgbe_set_dcb_sriov_queues()
344 vmdq_i = min_t(u16, vmdq_i, MAX_TX_QUEUES / tcs); in ixgbe_set_dcb_sriov_queues()
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H A Dixgbe_dcb_82599.c204 * So clear all TCs and only enable those that should be in ixgbe_dcb_config_pfc_82599()
257 /* Configure pause time (2 TCs per register) */ in ixgbe_dcb_config_pfc_82599()
295 * Tx queues are allocated non-uniformly to TCs: in ixgbe_dcb_config_tc_stats_82599()
/linux/drivers/net/ethernet/intel/ice/
H A Dice_dcb_lib.c9 * ice_dcb_get_ena_tc - return bitmap of enabled TCs
10 * @dcbcfg: DCB config to evaluate for enabled TCs
103 * ice_dcb_get_num_tc - Get the number of TCs from DCBX config
104 * @dcbcfg: config to retrieve number of TCs from
114 * enabled and create a bitmask of enabled TCs in ice_dcb_get_num_tc()
119 /* Scan bitmask for contiguous TCs starting with TC0 */ in ice_dcb_get_num_tc()
125 pr_err("Non-contiguous TCs - Disabling DCB\n"); in ice_dcb_get_num_tc()
158 /* get bitmap of enabled TCs */ in ice_get_first_droptc()
161 /* get bitmap of PFC enabled TCs */ in ice_get_first_droptc()
318 /* returns number of contigous TCs and 1 TC for non-contigous TCs, in ice_dcb_bwchk()
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/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Diavf.rst155 1. Create traffic classes (TCs). Maximum of 8 TCs can be created per interface.
158 Example: Sets up two tcs, tc0 and tc1, with 16 queues each and max tx rate set
167 map: priority mapping for up to 16 priorities to tcs (e.g. map 0 0 0 0 1 1 1 1
172 number of queues for all tcs is 64 or number of cores, whichever is lower.)
176 TCs, the queue configurations, and the QoS parameters.
186 TCs are configured using mqprio.
192 3. Apply TCs to ingress (RX) flow of interface::
199 - Setting up channels via ethtool (ethtool -L) is not supported when the TCs
216 - If traffic matches multiple TC filters that point to different TCs, that
H A Di40e.rst664 1. Create traffic classes (TCs). Maximum of 8 TCs can be created per interface.
667 Example: Sets up two tcs, tc0 and tc1, with 16 queues each and max tx rate set
676 map: priority mapping for up to 16 priorities to tcs (e.g. map 0 0 0 0 1 1 1 1
681 number of queues for all tcs is 64 or number of cores, whichever is lower.)
685 TCs, the queue configurations, and the QoS parameters.
697 3. Apply TCs to ingress (RX) flow of interface::
705 TCs are configured using mqprio.
722 - If traffic matches multiple TC filters that point to different TCs,
/linux/arch/x86/include/asm/
H A Dsgx.h190 * enum sgx_tcs_flags - execution flags for TCS
203 * struct sgx_tcs - Thread Control Structure (TCS)
204 * @state: used to mark an entered TCS
219 * Thread Control Structure (TCS) is an enclave page visible in its address
221 * an enclave by supplying address of TCS to ENCLU(EENTER). A TCS can be entered
257 * %SGX_PAGE_TYPE_TCS: a TCS page
282 * %SGX_SECINFO_TCS: a TCS page
/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,bcm-voter.yaml24 qcom,tcs-wait:
30 The AMC TCS is triggered immediately when icc_set_bw() is called. The
63 qcom,tcs-wait = <QCOM_ICC_TAG_AMC>;
/linux/arch/x86/include/uapi/asm/
H A Dsgx.h129 * Regular (PT_REG) or TCS (PT_TCS) can be removed from an initialized
162 * @tcs: TCS used to enter the enclave
177 __u64 tcs; member
207 * with @function, asynchronous exit pointer, and @run.tcs respectively.
/linux/include/soc/qcom/
H A Dtcs.h48 * struct tcs_request: A set of tcs_cmds sent together in a TCS
72 /* Construct a Bus Clock Manager (BCM) specific TCS command */
/linux/drivers/net/ethernet/mscc/
H A Docelot_mm.c60 /* Only commit preemptible TCs when MAC Merge is active. in ocelot_port_update_active_preemptible_tcs()
71 * TCs affects the oversized frame dropping logic, so that needs to be in ocelot_port_update_active_preemptible_tcs()
79 "port %d %s/%s, MM TX %s, preemptible TCs 0x%x, active 0x%x\n", in ocelot_port_update_active_preemptible_tcs()
/linux/drivers/net/ethernet/aquantia/atlantic/
H A Daq_ptp.h21 /* Index must to be 8 (8 TCs) or 16 (4 TCs).
H A Daq_nic.h73 u8 tcs; member
216 int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map);
/linux/drivers/interconnect/qcom/
H A Dbcm-voter.c14 #include <soc/qcom/tcs.h>
30 * @tcs_wait: mask for which buckets require TCS completion
265 * qcom_icc_bcm_voter_commit - generates and commits tcs cmds based on bcms
382 if (of_property_read_u32(np, "qcom,tcs-wait", &voter->tcs_wait)) in qcom_icc_bcm_voter_probe()
H A Dbcm-voter.h11 #include <soc/qcom/tcs.h>
/linux/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_dcbnl.c15 /* we support 8 TCs in all modes */ in fm10k_dcbnl_ieee_getets()
81 /* record flow control max count and state of TCs */ in fm10k_dcbnl_ieee_getpfc()
/linux/arch/x86/kernel/cpu/sgx/
H A Dioctl.c377 * A SECINFO for a TCS is required to always contain zero permissions because
386 * 2. A TCS page: PROT_R | PROT_W.
931 * or SGX_PAGE_TYPE_TRIM but TCS pages can only be trimmed. in sgx_enclave_modify_types()
944 * Once a regular page becomes a TCS page it cannot be in sgx_enclave_modify_types()
946 * the TCS page that is always RW from kernel perspective but in sgx_enclave_modify_types()
1035 * * It is possible to add TCS pages to an enclave by changing the type of
1036 * regular pages (%SGX_PAGE_TYPE_REG) to TCS (%SGX_PAGE_TYPE_TCS) pages.
1040 * * Regular or TCS pages can dynamically be removed from an initialized
/linux/arch/mips/include/asm/
H A Dmips_mt.h12 * How many VPEs and TCs is Linux allowed to use? 0 means no limit.

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