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/freebsd/crypto/openssl/crypto/bn/asm/
H A Dppc64-mont.pl144 $t5="r29";
300 extrdi $t5,$t7,16,32
304 std $t5,`$FRAME+40`($sp)
313 lwz $t5,`0^$LITTLE_ENDIAN`($np)
328 mulhwu $t5,$a0,$t1
331 add $t5,$t5,$t6
332 add $t5,$t5,$t7
345 mullw $t2,$t5,$n0
351 extrwi $t5,$t0,16,0
355 std $t5,`$FRAME+40`($sp)
[all …]
/freebsd/contrib/bearssl/src/ec/
H A Dec_c25519_m64.c258 uint64_t t0, t1, t2, t3, t4, t5, t6, t7, th; in f255_mul() local
285 t5 = (uint64_t)(z >> 64); in f255_mul()
297 + (unsigned __int128)t5 + (z >> 64); in f255_mul()
298 t5 = (uint64_t)z; in f255_mul()
308 + (unsigned __int128)t5 + (z >> 64); in f255_mul()
309 t5 = (uint64_t)z; in f255_mul()
328 t6 = (t6 << 1) | (t5 >> 63); in f255_mul()
329 t5 = (t5 << 1) | (t4 >> 63); in f255_mul()
339 z = (unsigned __int128)t5 * 19 + (z >> 64); in f255_mul()
340 t5 = (uint64_t)z; in f255_mul()
[all …]
H A Dec_p256_m62.c879 uint64_t t1[5], t2[5], t3[5], t4[5], t5[5], t6[5], t7[5], tt; in p256_add() local
895 f256_montymul(t5, P1->z, t4); in p256_add()
896 f256_montymul(t4, P2->y, t5); in p256_add()
911 * Compute u1*h^2 (in t6) and h^3 (in t5); in p256_add()
915 f256_montymul(t5, t7, t2); in p256_add()
921 f256_sub(P1->x, P1->x, t5); in p256_add()
930 f256_montymul(t1, t5, t3); in p256_add()
991 uint64_t t1[5], t2[5], t3[5], t4[5], t5[5], t6[5], t7[5], tt; in p256_add_mixed() local
1005 f256_montymul(t5, P1->z, t4); in p256_add_mixed()
1006 f256_montymul(t4, P2->y, t5); in p256_add_mixed()
[all …]
H A Dec_p256_m64.c899 uint64_t t1[4], t2[4], t3[4], t4[4], t5[4], t6[4], t7[4], tt; in p256_add() local
915 f256_montymul(t5, P1->z, t4); in p256_add()
916 f256_montymul(t4, P2->y, t5); in p256_add()
931 * Compute u1*h^2 (in t6) and h^3 (in t5); in p256_add()
935 f256_montymul(t5, t7, t2); in p256_add()
941 f256_sub(P1->x, P1->x, t5); in p256_add()
950 f256_montymul(t1, t5, t3); in p256_add()
1011 uint64_t t1[4], t2[4], t3[4], t4[4], t5[4], t6[4], t7[4], tt; in p256_add_mixed() local
1025 f256_montymul(t5, P1->z, t4); in p256_add_mixed()
1026 f256_montymul(t4, P2->y, t5); in p256_add_mixed()
[all …]
H A Dec_p256_m31.c861 uint32_t t1[9], t2[9], t3[9], t4[9], t5[9], t6[9], t7[9]; in p256_add() local
878 mul_f256(t5, P1->z, t4); in p256_add()
879 mul_f256(t4, P2->y, t5); in p256_add()
896 * Compute u1*h^2 (in t6) and h^3 (in t5); in p256_add()
900 mul_f256(t5, t7, t2); in p256_add()
906 sub_f256(P1->x, P1->x, t5); in p256_add()
915 mul_f256(t1, t5, t3); in p256_add()
972 uint32_t t1[9], t2[9], t3[9], t4[9], t5[9], t6[9], t7[9]; in p256_add_mixed() local
987 mul_f256(t5, P1->z, t4); in p256_add_mixed()
988 mul_f256(t4, P2->y, t5); in p256_add_mixed()
[all …]
H A Dec_prime_i31.c183 #define t5 10 macro
333 MMUL(t5, P1z, t4),
334 MMUL(t4, P2y, t5),
348 * Compute u1*h^2 (in t6) and h^3 (in t5).
352 MMUL(t5, t7, t2),
359 MSUB(P1x, t5),
368 MMUL(t1, t5, t3),
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonVectorLoopCarriedReuse.h24 // t5 = g(t4);
25 // t6 = op(t2, t5)
36 // t5 = g(t4);
37 // t6 = op(t2, t5)
38 // t20 = t5
53 // t5 = g(t4)
54 // t6 = op(t2, t5)
84 // t5 = g(t4)
85 // t6 = op(t2, t5)
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/sse2/
H A Dpoly1305_sse2.c207 xmmi T0, T1, T2, T3, T4, T5, T6, T7, T8; in poly1305_blocks() local
222 T5 = _mm_unpacklo_epi64( in poly1305_blocks()
228 H0 = _mm_and_si128(MMASK, T5); in poly1305_blocks()
229 H1 = _mm_and_si128(MMASK, _mm_srli_epi64(T5, 26)); in poly1305_blocks()
230 T5 = _mm_or_si128(_mm_srli_epi64(T5, 52), _mm_slli_epi64(T6, 12)); in poly1305_blocks()
231 H2 = _mm_and_si128(MMASK, T5); in poly1305_blocks()
232 H3 = _mm_and_si128(MMASK, _mm_srli_epi64(T5, 26)); in poly1305_blocks()
256 T5 = _mm_unpackhi_epi32(T0, T2); in poly1305_blocks()
264 T5 = _mm_unpackhi_epi32(T0, T2); in poly1305_blocks()
269 R22 = _mm_shuffle_epi32(T5, _MM_SHUFFLE(1, 1, 0, 0)); in poly1305_blocks()
[all …]
/freebsd/sys/riscv/vmm/
H A Dvmm_switch.S71 ld t5, (HYP_G_SEPC)(a0)
78 csrw sepc, t5
95 ld t5, (HYP_G_T + 5 * 8)(a0)
135 sd t5, (HYP_G_T + 5 * 8)(a0)
162 ld t5, (HYP_H_SSTATUS)(a0)
169 csrrw t5, sstatus, t5
175 sd t5, (HYP_G_SSTATUS)(a0)
/freebsd/crypto/openssl/crypto/aes/asm/
H A Daes-mips.pl125 my ($t0,$t1,$t2,$t3,$t4,$t5,$t6,$t7,$t8,$t9,$t10,$t11) = map("\$$_",(12..23));
166 lwxs $t5,$i1($Tbl) # Te2[s3>>8]
188 rotr $t5,$t5,16
194 xor $t1,$t5
195 lwxs $t5,$i1($Tbl) # Te0[s1>>24]
216 xor $t1,$t5
249 ext $t5,$s3,8,8
255 $PTR_INS $i1,$t5,2,8
301 lw $t5,0($i1) # Te2[s3>>8]
323 lw $t5,0($i1) # Te2[s3>>8]
[all …]
/freebsd/contrib/llvm-project/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_syscall_linux_x86_64.inc56 template <typename T1, typename T2, typename T3, typename T4, typename T5>
58 T5 arg5) {
68 template <typename T1, typename T2, typename T3, typename T4, typename T5,
71 T5 arg5, T6 arg6) {
/freebsd/share/misc/
H A Dscsi_modes165 {Reserved} *t5
225 {Reserved} *t5
312 {Reserved} *t5
351 {Reserved} *t5
379 {Active Format} t5
398 {Reserved} *t5
410 {Reserved} *t5
/freebsd/crypto/openssl/crypto/ec/
H A Decp_smpl.c1497 BIGNUM *t1, *t2, *t3, *t4, *t5 = NULL; in ossl_ec_GFp_simple_ladder_pre() local
1503 t5 = s->Y; in ossl_ec_GFp_simple_ladder_pre()
1509 || !group->meth->field_mul(group, t5, p->X, group->b, ctx) in ossl_ec_GFp_simple_ladder_pre()
1510 || !BN_mod_lshift_quick(t5, t5, 3, group->field) in ossl_ec_GFp_simple_ladder_pre()
1512 || !BN_mod_sub_quick(r->X, t4, t5, group->field) in ossl_ec_GFp_simple_ladder_pre()
1568 BIGNUM *t0, *t1, *t2, *t3, *t4, *t5, *t6 = NULL; in ossl_ec_GFp_simple_ladder_step() local
1576 t5 = BN_CTX_get(ctx); in ossl_ec_GFp_simple_ladder_step()
1584 || !group->meth->field_mul(group, t5, group->a, t0, ctx) in ossl_ec_GFp_simple_ladder_step()
1585 || !BN_mod_add_quick(t5, t6, t5, group->field) in ossl_ec_GFp_simple_ladder_step()
1587 || !group->meth->field_mul(group, t5, t6, t5, ctx) in ossl_ec_GFp_simple_ladder_step()
[all …]
/freebsd/share/man/man4/
H A Dcxgbev.437 .Nd "Chelsio T4-, T5-, and T6-based 100Gb, 40Gb, 25Gb, 10Gb, and 1Gb Ethernet VF driver"
58 (T4, T5, and T6).
73 .It T5 Ta cxlv Ta t5vf
82 For example, a T5 VF provides port MIBs under dev.cxlv and
111 based on the T5 ASIC:
H A Dcxgbe.437 .Nd "Chelsio T4-, T5-, and T6-based 100Gb, 40Gb, 25Gb, 10Gb, and 1Gb Ethernet adapter driver"
59 the Chelsio Terminator 4, Terminator 5, and Terminator 6 ASICs (T4, T5, and T6).
74 .It T5 Ta cxl Ta t5nex Ta vcxl
81 For example, a T5 adapter provides port MIBs under dev.cxl and
108 driver supports 40Gb, 10Gb and 1Gb Ethernet adapters based on the T5 ASIC:
373 This facility is available on T4 and T5 based cards only.
411 Support for T5 cards first appeared in
/freebsd/lib/msun/src/
H A Ds_tanhl.c48 T5 = 1.3333333333333314e-1, /* 0x1111111111110a.0p-55 */ variable
63 T5 = 1.33333333333333333333333333332707260e-1L, /* 0x1111111111111111111111110ab7b.0p-115L */ variable
139 ((T11*x2 + T9)*x4 + (T7*x2 + T5))*(x2*x*x2) + in tanhl()
146 T15)*x2 + T13)*x2 + T11)*x2 + T9)*x2 + T7)*x2 + T5)* in tanhl()
152 T15)*x2 + T13)*x2 + T11)*x2 + T9)*x2 + T7)*x2 + T5)* in tanhl()
/freebsd/sys/contrib/device-tree/Bindings/rng/
H A Dsparc_sun_oracle_rng.txt11 - 'ORCL,m4-rng' for SPARC T5/M5
15 /* linux LDOM on SPARC T5-2 */
/freebsd/crypto/openssl/crypto/sha/asm/
H A Dsha256-armv4.pl312 my ($T0,$T1,$T2,$T3,$T4,$T5)=("q8","q9","q10","q11","d24","d25");
370 &vshr_u32 ($T5,&Dhi(@X[3]),$sigma1[2]);
376 &veor ($T5,$T5,$T4);
385 &veor ($T5,$T5,$T4); # sigma1(X[14..15])
388 &vadd_i32 (&Dlo(@X[0]),&Dlo(@X[0]),$T5);# X[0..1] += sigma1(X[14..15])
397 &vshr_u32 ($T5,&Dlo(@X[0]),$sigma1[2]);
400 &veor ($T5,$T5,$T4);
412 &veor ($T5,$T5,$T4); # sigma1(X[16..17])
415 &vadd_i32 (&Dhi(@X[0]),&Dhi(@X[0]),$T5);# X[2..3] += sigma1(X[16..17])
H A Dsha512-armv8.pl454 my ($T0,$T1,$T2,$T3,$T4,$T5,$T6,$T7) = map("q$_",(4..7,16..19));
511 &ushr_32 ($T5,$T7,$sigma1[2]);
523 &eor_8 ($T5,$T5,$T4);
527 &eor_8 ($T5,$T5,$T3); # sigma1(X[14..15])
531 &add_32 (@X[0],@X[0],$T5); # X[0..1] += sigma1(X[14..15])
542 &ushr_32 ($T5,@X[0],$sigma1[1]);
548 &sli_32 ($T5,@X[0],32-$sigma1[1]);
553 &eor_8 ($T7,$T7,$T5); # sigma1(X[16..17])
556 &eor_8 ($T5,$T5,$T5);
559 &mov (&Dhi($T5), &Dlo($T7));
[all …]
/freebsd/lib/msun/ld80/
H A Dk_tanl.c39 #define T5 ((long double)T5hi + T5lo) macro
46 T5 = 0.133333333333333372290L, /* 0x88888888888893c3.0p-66 */ variable
89 r = T5 + w * (T9 + w * (T13 + w * (T17 + w * (T21 + in __kernel_tanl()
/freebsd/crypto/openssl/external/perl/Text-Template-1.56/t/
H A Dprepend.t53 $t2 = $tmpl2->fill_in(PACKAGE => 'T5');
73 $t2 = $tmpl2->fill_in(PACKAGE => 'T5');
/freebsd/sys/riscv/riscv/
H A Dlocore.S176 slli t5, s2, PTE_PPN0_S /* (s2 << PTE_PPN0_S) */
177 or t6, t4, t5
194 or t5, t0, t2
195 sd t5, (s1) /* Store PTE entry to position */
/freebsd/crypto/openssl/crypto/ec/asm/
H A Decp_nistz256-sparcv9.pl101 my ($t0,$t1,$t2,$t3,$t4,$t5,$t6,$t7)=(map("%o$_",(0..5)),"%g4","%g5");
194 ld [$ap+20],$t5
202 mulx $t5,$bi,$t5
210 srlx $t5,32,@acc[6]
225 addccc @acc[5],$t5,@acc[5]
227 ld [$ap+20],$t5
287 mulx $t5,$bi,$t5
299 add @acc[5],$t5,$t5
302 srlx $t5,32,@acc[6]
313 addccc @acc[5],$t5,@acc[5]
[all …]
/freebsd/contrib/ofed/libcxgb4/
H A Dt4_pci_id_tbl.h2 * This file is part of the Chelsio T4/T5 Ethernet driver for Linux.
75 * V = "4" for T4; "5" for T5, etc.
122 /* T5 adapters:
/freebsd/crypto/openssl/crypto/modes/asm/
H A Dghashp8-ppc.pl152 my ($t4,$t5,$t6) = ($Hl,$H,$Hh);
167 vsldoi $t5,$zero,$Xm1,8
171 vxor $Xh1,$Xh1,$t5
179 vsldoi $t5,$Xl1,$Xl1,8 # 2nd reduction phase
183 vxor $t5,$t5,$Xh1
185 vxor $Xl1,$Xl1,$t5

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