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/linux/Documentation/devicetree/bindings/pinctrl/
H A Drenesas,r9a09g077-pinctrl.yaml7 title: Renesas RZ/T2H and RZ/N2H Pin and GPIO controller
13 The Renesas RZ/T2H and RZ/N2H SoCs feature a combined Pin and GPIO controller.
22 - renesas,r9a09g077-pinctrl # RZ/T2H
/linux/Documentation/devicetree/bindings/serial/
H A Drenesas,rsci.yaml21 - const: renesas,r9a09g077-rsci # RZ/T2H
24 - const: renesas,r9a09g077-rsci # RZ/T2H
/linux/drivers/watchdog/
H A Drzv2h_wdt.c24 /* This register is only available on RZ/T2H and RZ/N2H SoCs */
143 * - 1000b: pclkl/8192 for RZ/T2H in rzv2h_wdt_start()
148 * - 01b: 4096 cycles (0FFFh) for RZ/T2H in rzv2h_wdt_start()
231 * - 0100b: pclkl/4 for RZ/T2H in rzv2h_wdt_restart()
/linux/Documentation/devicetree/bindings/i2c/
H A Drenesas,riic.yaml34 - renesas,riic-r9a09g077 # RZ/T2H
38 - const: renesas,riic-r9a09g077 # RZ/T2H
/linux/arch/arm/crypto/
H A Dghash-ce-core.S37 t2h .req d15
142 veor t2l, t2l, t2h @ t2 = (N) (P4 + P5) << 24
143 vand t2h, t2h, k16
147 veor t2l, t2l, t2h
/linux/Documentation/devicetree/bindings/watchdog/
H A Drenesas,wdt.yaml86 - renesas,r9a09g077-wdt # RZ/T2H
90 - const: renesas,r9a09g077-wdt # RZ/T2H
/linux/include/dt-bindings/pinctrl/
H A Drenesas,r9a09g077-pinctrl.h3 * This header provides constants for Renesas RZ/T2H family pinctrl bindings.
/linux/Documentation/devicetree/bindings/phy/
H A Drenesas,usb2-phy.yaml47 - const: renesas,usb2-phy-r9a09g077 # RZ/T2H
/linux/Documentation/devicetree/bindings/mmc/
H A Drenesas,sdhi.yaml75 - renesas,sdhi-r9a09g077 # RZ/T2H
/linux/drivers/clk/renesas/
H A Drenesas-cpg-mssr.c84 * Module Stop Control Register (RZ/T2H)
85 * RZ/T2H has 2 registers blocks,
/linux/drivers/net/pcs/
H A Dpcs-rzn1-miic.c66 * of RZ/T2H and RZ/N2H SoCs, the first index is SWITCH_PORTIN then