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/linux/arch/mips/include/asm/
H A Dunaligned-emul.h11 "1:\t"type##_lb("%0", "0(%2)")"\n" \
12 "2:\t"type##_lbu("$1", "1(%2)")"\n\t"\
13 "sll\t%0, 0x8\n\t" \
14 "or\t%0, $1\n\t" \
15 "li\t%1, 0\n" \
16 "3:\t.set\tat\n\t" \
17 ".insn\n\t" \
18 ".section\t.fixup,\"ax\"\n\t" \
19 "4:\tli\t%1, %3\n\t" \
20 "j\t3b\n\t" \
[all …]
H A Dsim.h22 ".text\n\t" \
23 ".globl\t__" #symbol "\n\t" \
24 ".align\t2\n\t" \
25 ".type\t__" #symbol ", @function\n\t" \
27 #symbol":\n\t" \
28 ".frame\t$29, 0, $31\n\t" \
29 "sw\t$16,"__str(PT_R16)"($29)\t\t\t# save_static_function\n\t" \
30 "sw\t$17,"__str(PT_R17)"($29)\n\t" \
31 "sw\t$18,"__str(PT_R18)"($29)\n\t" \
32 "sw\t$19,"__str(PT_R19)"($29)\n\t" \
[all …]
/linux/arch/m68k/lib/
H A Dchecksum.c45 __asm__("movel %2,%3\n\t" in csum_partial()
46 "btst #1,%3\n\t" /* Check alignment */ in csum_partial()
47 "jeq 2f\n\t" in csum_partial()
48 "subql #2,%1\n\t" /* buff%4==2: treat first word */ in csum_partial()
49 "jgt 1f\n\t" in csum_partial()
50 "addql #2,%1\n\t" /* len was == 2, treat only rest */ in csum_partial()
52 "1:\t" in csum_partial()
53 "addw %2@+,%0\n\t" /* add first word to sum */ in csum_partial()
54 "clrl %3\n\t" in csum_partial()
56 "2:\t" in csum_partial()
[all …]
/linux/lib/crypto/powerpc/
H A Dsha1-powerpc-asm.S22 * We roll the registers for T, A, B, C, D, E around on each
23 * iteration; T on iteration t is A on iteration t+1, and so on.
26 #define RT(t) ((((t)+5)%6)+7) argument
27 #define RA(t) ((((t)+4)%6)+7) argument
28 #define RB(t) ((((t)+3)%6)+7) argument
29 #define RC(t) ((((t)+2)%6)+7) argument
30 #define RD(t) ((((t)+1)%6)+7) argument
31 #define RE(t) ((((t)+0)%6)+7) argument
34 #define W(t) (((t)%16)+16) argument
36 #define LOADW(t) \ argument
[all …]
/linux/arch/mips/mm/
H A Dc-r3k.c121 asm( "sb\t$0, 0x000(%0)\n\t" in r3k_flush_icache_range()
122 "sb\t$0, 0x004(%0)\n\t" in r3k_flush_icache_range()
123 "sb\t$0, 0x008(%0)\n\t" in r3k_flush_icache_range()
124 "sb\t$0, 0x00c(%0)\n\t" in r3k_flush_icache_range()
125 "sb\t$0, 0x010(%0)\n\t" in r3k_flush_icache_range()
126 "sb\t$0, 0x014(%0)\n\t" in r3k_flush_icache_range()
127 "sb\t$0, 0x018(%0)\n\t" in r3k_flush_icache_range()
128 "sb\t$0, 0x01c(%0)\n\t" in r3k_flush_icache_range()
129 "sb\t$0, 0x020(%0)\n\t" in r3k_flush_icache_range()
130 "sb\t$0, 0x024(%0)\n\t" in r3k_flush_icache_range()
[all …]
H A Dsc-ip22.c109 ".set\tpush\n\t" in indy_sc_enable()
110 ".set\tnoreorder\n\t" in indy_sc_enable()
111 ".set\tmips3\n\t" in indy_sc_enable()
112 "mfc0\t%2, $12\n\t" in indy_sc_enable()
113 "nop; nop; nop; nop;\n\t" in indy_sc_enable()
114 "li\t%1, 0x80\n\t" in indy_sc_enable()
115 "mtc0\t%1, $12\n\t" in indy_sc_enable()
116 "nop; nop; nop; nop;\n\t" in indy_sc_enable()
117 "li\t%0, 0x1\n\t" in indy_sc_enable()
118 "dsll\t%0, 31\n\t" in indy_sc_enable()
[all …]
/linux/arch/sparc/include/asm/
H A Dxor_32.h23 "ldd [%0 + 0x00], %%g2\n\t" in sparc_2()
24 "ldd [%0 + 0x08], %%g4\n\t" in sparc_2()
25 "ldd [%0 + 0x10], %%o0\n\t" in sparc_2()
26 "ldd [%0 + 0x18], %%o2\n\t" in sparc_2()
27 "ldd [%1 + 0x00], %%o4\n\t" in sparc_2()
28 "ldd [%1 + 0x08], %%l0\n\t" in sparc_2()
29 "ldd [%1 + 0x10], %%l2\n\t" in sparc_2()
30 "ldd [%1 + 0x18], %%l4\n\t" in sparc_2()
31 "xor %%g2, %%o4, %%g2\n\t" in sparc_2()
32 "xor %%g3, %%o5, %%g3\n\t" in sparc_2()
[all …]
H A Dchecksum_32.h52 "call __csum_partial_copy_sparc_generic\n\t" in csum_partial_copy_nocheck()
89 __asm__ __volatile__("sub\t%2, 4, %%g4\n\t" in ip_fast_csum()
90 "ld\t[%1 + 0x00], %0\n\t" in ip_fast_csum()
91 "ld\t[%1 + 0x04], %%g2\n\t" in ip_fast_csum()
92 "ld\t[%1 + 0x08], %%g3\n\t" in ip_fast_csum()
93 "addcc\t%%g2, %0, %0\n\t" in ip_fast_csum()
94 "addxcc\t%%g3, %0, %0\n\t" in ip_fast_csum()
95 "ld\t[%1 + 0x0c], %%g2\n\t" in ip_fast_csum()
96 "ld\t[%1 + 0x10], %%g3\n\t" in ip_fast_csum()
97 "addxcc\t%%g2, %0, %0\n\t" in ip_fast_csum()
[all …]
/linux/lib/raid6/
H A Davx512.c54 asm volatile("vmovdqa64 %0,%%zmm0\n\t" in raid6_avx5121_gen_syndrome()
60 asm volatile("prefetchnta %0\n\t" in raid6_avx5121_gen_syndrome()
61 "vmovdqa64 %0,%%zmm2\n\t" /* P[0] */ in raid6_avx5121_gen_syndrome()
62 "prefetchnta %1\n\t" in raid6_avx5121_gen_syndrome()
63 "vmovdqa64 %%zmm2,%%zmm4\n\t" /* Q[0] */ in raid6_avx5121_gen_syndrome()
68 asm volatile("prefetchnta %0\n\t" in raid6_avx5121_gen_syndrome()
69 "vpcmpgtb %%zmm4,%%zmm1,%%k1\n\t" in raid6_avx5121_gen_syndrome()
70 "vpmovm2b %%k1,%%zmm5\n\t" in raid6_avx5121_gen_syndrome()
71 "vpaddb %%zmm4,%%zmm4,%%zmm4\n\t" in raid6_avx5121_gen_syndrome()
72 "vpandq %%zmm0,%%zmm5,%%zmm5\n\t" in raid6_avx5121_gen_syndrome()
[all …]
/linux/drivers/scsi/esas2r/
H A Desas2r_targdb.c48 struct esas2r_target *t; in esas2r_targ_db_initialize() local
50 for (t = a->targetdb; t < a->targetdb_end; t++) { in esas2r_targ_db_initialize()
51 memset(t, 0, sizeof(struct esas2r_target)); in esas2r_targ_db_initialize()
53 t->target_state = TS_NOT_PRESENT; in esas2r_targ_db_initialize()
54 t->buffered_target_state = TS_NOT_PRESENT; in esas2r_targ_db_initialize()
55 t->new_target_state = TS_INVALID; in esas2r_targ_db_initialize()
61 struct esas2r_target *t; in esas2r_targ_db_remove_all() local
64 for (t = a->targetdb; t < a->targetdb_end; t++) { in esas2r_targ_db_remove_all()
65 if (t->target_state != TS_PRESENT) in esas2r_targ_db_remove_all()
69 esas2r_targ_db_remove(a, t); in esas2r_targ_db_remove_all()
[all …]
/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_debugfs.c563 /* don't allow partial reads */ in rvu_dbg_lmtst_map_table_display()
585 "\n\t\t\t\t\tLmtst Map Table Entries"); in rvu_dbg_lmtst_map_table_display()
587 "\n\t\t\t\t\t======================="); in rvu_dbg_lmtst_map_table_display()
588 off += scnprintf(&buf[off], buf_size - 1 - off, "\nPcifunc\t\t\t"); in rvu_dbg_lmtst_map_table_display()
589 off += scnprintf(&buf[off], buf_size - 1 - off, "Table Index\t\t"); in rvu_dbg_lmtst_map_table_display()
591 "Lmtline Base (word 0)\t\t"); in rvu_dbg_lmtst_map_table_display()
596 off += scnprintf(&buf[off], buf_size - 1 - off, "PF%d \t\t\t", in rvu_dbg_lmtst_map_table_display()
600 off += scnprintf(&buf[off], buf_size - 1 - off, " 0x%llx\t\t", in rvu_dbg_lmtst_map_table_display()
604 " 0x%016llx\t\t", lmt_addr); in rvu_dbg_lmtst_map_table_display()
615 "PF%d:VF%d \t\t", pf, vf); in rvu_dbg_lmtst_map_table_display()
[all …]
/linux/arch/sparc/include/uapi/asm/
H A Dioctls.h7 /* Big T */
8 #define TCGETA _IOR('T', 1, struct termio)
9 #define TCSETA _IOW('T', 2, struct termio)
10 #define TCSETAW _IOW('T', 3, struct termio)
11 #define TCSETAF _IOW('T', 4, struct termio)
12 #define TCSBRK _IO('T', 5)
13 #define TCXONC _IO('T', 6)
14 #define TCFLSH _IO('T', 7)
15 #define TCGETS _IOR('T', 8, struct termios)
16 #define TCSETS _IOW('T', 9, struct termios)
[all …]
/linux/arch/sh/include/asm/
H A Dswitch_to_32.h15 ".balign 4\n\t" \
16 "movs.l @r2+, a0\n\t" \
17 "movs.l @r2+, a1\n\t" \
18 "movs.l @r2+, a0g\n\t" \
19 "movs.l @r2+, a1g\n\t" \
20 "movs.l @r2+, m0\n\t" \
21 "movs.l @r2+, m1\n\t" \
22 "movs.l @r2+, x0\n\t" \
23 "movs.l @r2+, x1\n\t" \
24 "movs.l @r2+, y0\n\t" \
[all …]
H A Dspinlock-llsc.h32 "1: \n\t" in arch_spin_lock()
33 "movli.l @%2, %0 ! arch_spin_lock \n\t" in arch_spin_lock()
34 "mov %0, %1 \n\t" in arch_spin_lock()
35 "mov #0, %0 \n\t" in arch_spin_lock()
36 "movco.l %0, @%2 \n\t" in arch_spin_lock()
37 "bf 1b \n\t" in arch_spin_lock()
38 "cmp/pl %1 \n\t" in arch_spin_lock()
39 "bf 1b \n\t" in arch_spin_lock()
42 : "t", "memory" in arch_spin_lock()
53 "mov #1, %0 ! arch_spin_unlock \n\t" in arch_spin_unlock()
[all …]
H A Duaccess_32.h42 "1:\n\t" \
43 "mov." insn " %2, %1\n\t" \
46 "3:\n\t" \
47 "mov #0, %1\n\t" \
48 "mov.l 4f, %0\n\t" \
49 "jmp @%0\n\t" \
50 " mov %3, %0\n\t" \
52 "4: .long 2b\n\t" \
54 ".section __ex_table,\"a\"\n\t" \
55 ".long 1b, 3b\n\t" \
[all …]
H A Dbitops-grb.h15 " .align 2 \n\t" in set_bit()
16 " mova 1f, r0 \n\t" /* r0 = end point */ in set_bit()
17 " mov r15, r1 \n\t" /* r1 = saved sp */ in set_bit()
18 " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ in set_bit()
19 " mov.l @%1, %0 \n\t" /* load old value */ in set_bit()
20 " or %2, %0 \n\t" /* or */ in set_bit()
21 " mov.l %0, @%1 \n\t" /* store new value */ in set_bit()
22 "1: mov r1, r15 \n\t" /* LOGOUT */ in set_bit()
38 " .align 2 \n\t" in clear_bit()
39 " mova 1f, r0 \n\t" /* r0 = end point */ in clear_bit()
[all …]
/linux/arch/sparc/math-emu/
H A Dsfp-util_32.h8 __asm__ ("addcc %r4,%5,%1\n\t" \
18 __asm__ ("subcc %r4,%5,%1\n\t" \
29 __asm__ ("! Inlined umul_ppmm\n\t" \
30 "wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr\n\t" \
31 "sra %3,31,%%g2 ! Don't move this insn\n\t" \
32 "and %2,%%g2,%%g2 ! Don't move this insn\n\t" \
33 "andcc %%g0,0,%%g1 ! Don't move this insn\n\t" \
34 "mulscc %%g1,%3,%%g1\n\t" \
35 "mulscc %%g1,%3,%%g1\n\t" \
36 "mulscc %%g1,%3,%%g1\n\t" \
[all …]
/linux/arch/xtensa/include/asm/
H A Dchecksum.h70 __asm__("extui %1, %0, 16, 16\n\t" in csum_fold()
71 "extui %0 ,%0, 0, 16\n\t" in csum_fold()
72 "add %0, %0, %1\n\t" in csum_fold()
73 "slli %1, %0, 16\n\t" in csum_fold()
74 "add %0, %0, %1\n\t" in csum_fold()
75 "extui %0, %0, 16, 16\n\t" in csum_fold()
76 "neg %0, %0\n\t" in csum_fold()
77 "addi %0, %0, -1\n\t" in csum_fold()
78 "extui %0, %0, 0, 16\n\t" in csum_fold()
93 "sub %0, %0, %0\n\t" in ip_fast_csum()
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dtable.c2898 "FCC", "2.4G", "20M", "CCK", "1T", "01", "36",
2899 "ETSI", "2.4G", "20M", "CCK", "1T", "01", "32",
2900 "MKK", "2.4G", "20M", "CCK", "1T", "01", "32",
2901 "FCC", "2.4G", "20M", "CCK", "1T", "02", "36",
2902 "ETSI", "2.4G", "20M", "CCK", "1T", "02", "32",
2903 "MKK", "2.4G", "20M", "CCK", "1T", "02", "32",
2904 "FCC", "2.4G", "20M", "CCK", "1T", "03", "36",
2905 "ETSI", "2.4G", "20M", "CCK", "1T", "03", "32",
2906 "MKK", "2.4G", "20M", "CCK", "1T", "03", "32",
2907 "FCC", "2.4G", "20M", "CCK", "1T", "04", "36",
[all …]
/linux/tools/testing/selftests/bpf/prog_tests/
H A Dbtf_write.c10 const struct btf_type *t; in gen_btf() local
30 t = btf__type_by_id(btf, 1); in gen_btf()
32 ASSERT_EQ(t->name_off, str_off, "int_name_off"); in gen_btf()
33 ASSERT_STREQ(btf__str_by_offset(btf, t->name_off), "int", "int_name"); in gen_btf()
34 ASSERT_EQ(btf_kind(t), BTF_KIND_INT, "int_kind"); in gen_btf()
35 ASSERT_EQ(t->size, 4, "int_sz"); in gen_btf()
36 ASSERT_EQ(btf_int_encoding(t), BTF_INT_SIGNED, "int_enc"); in gen_btf()
37 ASSERT_EQ(btf_int_bits(t), 32, "int_bits"); in gen_btf()
57 t = btf__type_by_id(btf, 2); in gen_btf()
58 ASSERT_EQ(btf_kind(t), BTF_KIND_PTR, "ptr_kind"); in gen_btf()
[all …]
/linux/drivers/staging/rtl8723bs/hal/
H A DHalHWImg8723B_RF.c52 /* We don't care [31:28] and [23:20] */ in CheckPositive()
223 /* This (offset, data) pair doesn't care the condition. */ in ODM_ReadAndConfig_MP_8723B_RadioA()
246 /* Condition isn't matched. in ODM_ReadAndConfig_MP_8723B_RadioA()
361 "FCC", "20M", "CCK", "1T", "01", "32",
362 "ETSI", "20M", "CCK", "1T", "01", "32",
363 "MKK", "20M", "CCK", "1T", "01", "32",
364 "FCC", "20M", "CCK", "1T", "02", "32",
365 "ETSI", "20M", "CCK", "1T", "02", "32",
366 "MKK", "20M", "CCK", "1T", "02", "32",
367 "FCC", "20M", "CCK", "1T", "03", "32",
[all …]
/linux/tools/debugging/
H A Dkernel-chktaint48 T=$taint
55 if [ `expr $T % 2` -eq 0 ]; then
62 T=`expr $T / 2`
63 if [ `expr $T % 2` -eq 0 ]; then
70 T=`expr $T / 2`
71 if [ `expr $T % 2` -eq 0 ]; then
78 T=`expr $T /
[all...]
/linux/arch/xtensa/include/uapi/asm/
H A Dioctls.h32 #define TCGETA 0x80127417 /* _IOR('t', 23, struct termio) */
33 #define TCSETA 0x40127418 /* _IOW('t', 24, struct termio) */
34 #define TCSETAW 0x40127419 /* _IOW('t', 25, struct termio) */
35 #define TCSETAF 0x4012741C /* _IOW('t', 28, struct termio) */
37 #define TCSBRK _IO('t', 29)
38 #define TCXONC _IO('t', 30)
39 #define TCFLSH _IO('t', 31)
41 #define TIOCSWINSZ 0x40087467 /* _IOW('t', 103, struct winsize) */
42 #define TIOCGWINSZ 0x80087468 /* _IOR('t', 104, struct winsize) */
43 #define TIOCSTART _IO('t', 110) /* start output, like ^Q */
[all …]
/linux/rust/kernel/time/hrtimer/
H A Darc.rs14 /// A handle for an `Arc<HasHrTimer<T>>` returned by a call to
16 pub struct ArcHrTimerHandle<T>
18 T: HasHrTimer<T>,
20 pub(crate) inner: Arc<T>,
25 unsafe impl<T> HrTimerHandle for ArcHrTimerHandle<T>
27 T: HasHrTimer<T>,
33 // must point to a valid `T` in cancel()
63 start( self, expires: <<T as HasHrTimer<T>>::TimerMode as HrTimerMode>::Expires, ) -> ArcHrTimerHandle<T> start() argument
[all...]
/linux/drivers/net/wireguard/selftest/
H A Dcounter.c24 #define T(n, v) do { \ in wg_packet_counter_selftest() macro
34 /* 1 */ T(0, true); in wg_packet_counter_selftest()
35 /* 2 */ T(1, true); in wg_packet_counter_selftest()
36 /* 3 */ T(1, false); in wg_packet_counter_selftest()
37 /* 4 */ T(9, true); in wg_packet_counter_selftest()
38 /* 5 */ T(8, true); in wg_packet_counter_selftest()
39 /* 6 */ T(7, true); in wg_packet_counter_selftest()
40 /* 7 */ T(7, false); in wg_packet_counter_selftest()
41 /* 8 */ T(T_LIM, true); in wg_packet_counter_selftest()
42 /* 9 */ T(T_LIM - 1, true); in wg_packet_counter_selftest()
[all …]

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