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/freebsd/sys/dev/mii/
H A Dmiidevs3 /*-
35 * For a complete list see http://standards-oui.ieee.org/
39 * IEEE 802.3u-1995, subclause 22.2.4.3.1, figure 22-12, depicts the right
40 * mapping; the bit positions are defined in IEEE 802-1990, figure 5.2.
41 * (There is a formal 802.3 interpretation, number 1-07/98 of July 09 1998,
68 oui PMCSIERRA 0x00e004 PMC-Sierra
105 /* Don't know what's going on here. */
109 oui xxPMCSIERRA 0x0009c0 PMC-Sierra
110 oui xxPMCSIERRA2 0x009057 PMC-Sierra
120 model AGERE ET1011 0x0001 ET1011 10/100/1000baseT PHY
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H A Drlphy.c1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
85 * RealTek internal PHYs don't have vendor/device ID registers;
125 * The RealTek PHY can never be isolated. in rlphy_attach()
146 * The RealTek PHY's autonegotiation doesn't need to be in rlphy_service()
161 rlphy_status(struct mii_softc *phy) in rlphy_status() argument
163 struct mii_data *mii = phy->mii_pdata; in rlphy_status()
164 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; in rlphy_status()
167 mii->mii_media_status = IFM_AVALID; in rlphy_status()
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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dmediatek,tphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/mediatek,tphy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek T-PHY Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The T-PHY controller supports physical layer functionality for a number of
17 Layout differences of banks between T-PHY V1 (mt8173/mt2701) and
18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode:
19 -----------------------------------
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H A Dmediatek,mt7988-xfi-tphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/mediatek,mt7988-xfi-tphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek MT7988 XFI T-PHY
10 - Daniel Golle <daniel@makrotopia.org>
13 The MediaTek XFI SerDes T-PHY provides the physical SerDes lanes
15 MediaTek's 10G-capabale MT7988 SoC.
20 const: mediatek,mt7988-xfi-tphy
27 - description: XFI PHY clock
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H A Dmediatek,mt8365-csi-rx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/mediatek,mt8365-csi-rx.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Mediatek Sensor Interface MIPI CSI CD-PHY
11 - Julien Stephan <jstephan@baylibre.com>
12 - Andy Hsieh <andy.hsieh@mediatek.com>
15 The SENINF CD-PHY is a set of CD-PHY connected to the SENINF CSI-2
17 Depending on the SoC model, each PHYs can be either CD-PHY or D-PHY only
23 - mediatek,mt8365-csi-rx
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H A Dbrcm,brcmstb-usb-phy.txt1 Broadcom STB USB PHY
4 - compatible: should be one of
5 "brcm,brcmstb-usb-phy"
6 "brcm,bcm7216-usb-phy"
7 "brcm,bcm7211-usb-phy"
9 - reg and reg-names properties requirements are specific to the
11 "brcm,brcmstb-usb-phy":
12 - reg: 1 or 2 offset and length pairs. One for the base CTRL registers
14 - reg-names: not specified
15 "brcm,bcm7216-usb-phy":
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H A Dphy-mtk-tphy.txt1 MediaTek T-PHY binding
2 --------------------------
4 T-phy controller supports physical layer functionality for a number of
8 - compatible : should be one of
9 "mediatek,generic-tphy-v1"
10 "mediatek,generic-tphy-v2"
11 "mediatek,mt2701-u3phy" (deprecated)
12 "mediatek,mt2712-u3phy" (deprecated)
13 "mediatek,mt8173-u3phy";
14 make use of "mediatek,generic-tphy-v1" on mt2701 instead and
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/freebsd/sys/contrib/device-tree/src/mips/cavium-octeon/
H A Docteon_68xx.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
7 * use. Because of this, it contains a super-set of the available
11 compatible = "cavium,octeon-6880";
12 #address-cells = <2>;
13 #size-cells = <2>;
14 interrupt-parent = <&ciu2>;
17 compatible = "simple-bus";
18 #address-cells = <2>;
19 #size-cells = <2>;
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/freebsd/sys/dev/cxgb/common/
H A Dcxgb_tn1010.c2 SPDX-License-Identifier: BSD-2-Clause
37 /* TN1010 PHY specific registers. */
42 /* IEEE auto-negotiation 10GBASE-T registers */
73 * Reset the PHY. May take up to 500ms to complete.
75 static int tn1010_reset(struct cphy *phy, int wait) in tn1010_reset() argument
77 int err = t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait); in tn1010_reset()
82 static int tn1010_power_down(struct cphy *phy, int enable) in tn1010_power_down() argument
84 return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, in tn1010_power_down()
88 static int tn1010_autoneg_enable(struct cphy *phy) in tn1010_autoneg_enable() argument
92 err = tn1010_power_down(phy, 0); in tn1010_autoneg_enable()
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/freebsd/sys/dev/usb/controller/
H A Dmusb_otg_allwinner.c1 /*-
7 * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
33 * Allwinner USB Dual-Role Device (DRD) controller
63 #include <dev/phy/phy.h>
64 #include <dev/phy/phy_usb.h>
78 #define bs_parent_space(bs) ((bs)->bs_parent)
88 { "allwinner,sun4i-a10-musb", AWUSB_OKAY },
89 { "allwinner,sun6i-a31-musb", AWUSB_OKAY },
90 { "allwinner,sun8i-a33-musb", AWUSB_OKAY | AWUSB_NO_CONFDATA },
91 { "allwinner,sun8i-h3-musb", AWUSB_OKAY | AWUSB_NO_CONFDATA },
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/freebsd/sys/contrib/device-tree/Bindings/ata/
H A Dahci-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/ahci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hans de Goede <hdegoede@redhat.com>
11 - Damien Le Moal <dlemoal@kernel.org>
18 document doesn't constitute a DT-node binding by itself but merely
19 defines a set of common properties for the AHCI-compatible devices.
24 - $ref: sata-common.yaml#
32 reg-names:
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/freebsd/sys/contrib/dev/mediatek/mt76/
H A Dtx.c1 // SPDX-License-Identifier: ISC
11 if (!txq->sta) in mt76_txq_get_qid()
14 return txq->ac; in mt76_txq_get_qid()
20 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; in mt76_tx_check_agg_ssn()
25 if (!sta || !ieee80211_is_data_qos(hdr->frame_control) || in mt76_tx_check_agg_ssn()
26 !ieee80211_is_data_present(hdr->frame_control)) in mt76_tx_check_agg_ssn()
29 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK; in mt76_tx_check_agg_ssn()
30 txq = sta->txq[tid]; in mt76_tx_check_agg_ssn()
31 mtxq = (struct mt76_txq *)txq->drv_priv; in mt76_tx_check_agg_ssn()
32 if (!mtxq->aggr) in mt76_tx_check_agg_ssn()
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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dmarvell,xenon-sdhci.txt7 clock and PHY.
11 - compatible: should be one of the following
12 - "marvell,armada-3700-sdhci": For controllers on Armada-3700 SoC.
13 Must provide a second register area and marvell,pad-type.
14 - "marvell,armada-ap806-sdhci": For controllers on Armada AP806.
15 - "marvell,armada-ap807-sdhci": For controllers on Armada AP807.
16 - "marvell,armada-cp110-sdhci": For controllers on Armada CP110.
18 - clocks:
23 - clock-names:
28 - reg:
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H A Dmarvell,xenon-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhc
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dppa8548.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PPA8548 Device Tree Source (36-bit address map)
7 * MPC8548 CDS Device Tree Source (36-bit address map)
11 /include/ "mpc8548si-pre.dtsi"
16 #address-cells = <2>;
17 #size-cells = <2>;
18 interrupt-parent = <&mpic>;
35 /* ppa8548 board doesn't support PCI */
40 /* ppa8548 board doesn't support PCI */
45 /* ppa8548 board doesn't support PCI */
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H A Dp1020utm-pc.dtsi2 * P1020 UTM-PC Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
64 /* 512KB for u-boot Bootloader Image */
65 /* 512KB for u-boot Environment Variables */
67 label = "NOR U-Boot Image";
68 read-only;
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H A Dp1020mbg-pc.dtsi2 * P1020 MBG-PC Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
66 label = "NOR Vitesse-7385 Firmware";
67 read-only;
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
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/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-3720-turris-mox.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/bus/moxtet.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include "armada-372x.dtsi"
16 compatible = "cznic,turris-mox", "marvell,armada3720",
28 stdout-path = "serial0:115200n8";
37 compatible = "gpio-leds";
41 linux,default-trigger = "default-on";
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-lx2160a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2018-2020 NXP
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
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/freebsd/sys/contrib/device-tree/Bindings/net/dsa/
H A Dsja1105.txt6 - compatible:
8 - "nxp,sja1105e"
9 - "nxp,sja1105t"
10 - "nxp,sja1105p"
11 - "nxp,sja1105q"
12 - "nxp,sja1105r"
13 - "nxp,sja1105s"
18 and the non-SGMII devices, while pin-compatible, are not equal in terms
20 E/T).
24 - sja1105,role-mac:
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dhisilicon-hns-dsaf.txt4 - compatible: should be "hisilicon,hns-dsaf-v1" or "hisilicon,hns-dsaf-v2".
5 "hisilicon,hns-dsaf-v1" is for hip05.
6 "hisilicon,hns-dsaf-v2" is for Hi1610 and Hi1612.
7 - mode: dsa fabric mode string. only support one of dsaf modes like these:
8 "2port-64vf",
9 "6port-16rss",
10 "6port-16vf",
11 "single-port".
12 - interrupts: should contain the DSA Fabric and rcb interrupt.
13 - reg: specifies base physical address(es) and size of the device registers.
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Drockchip-pcie-host.txt4 - #address-cells: Address representation for root ports, set to <3>
5 - #size-cells: Size representation for root ports, set to <2>
6 - #interrupt-cells: specifies the number of cells needed to encode an
8 - compatible: Should contain "rockchip,rk3399-pcie"
9 - reg: Two register ranges as listed in the reg-names property
10 - reg-names: Must include the following names
11 - "axi-base"
12 - "apb-base"
13 - clocks: Must contain an entry for each entry in clock-names.
14 See ../clocks/clock-bindings.txt for details.
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/freebsd/sys/dev/etherswitch/arswitch/
H A Darswitch_8327.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2011-2012 Stefan Bethke.
117 if (arswitch_waitreg(sc->sc_dev, AR8327_REG_VTU_FUNC1, in ar8327_vlan_op()
126 err = arswitch_writereg(sc->sc_dev, AR8327_REG_VTU_FUNC0, data); in ar8327_vlan_op()
140 arswitch_writereg(sc->sc_dev, AR8327_REG_VTU_FUNC1, op); in ar8327_vlan_op()
143 * Finally - wait for it to load. in ar8327_vlan_op()
145 if (arswitch_waitreg(sc->sc_dev, AR8327_REG_VTU_FUNC1, in ar8327_vlan_op()
153 ar8327_phy_fixup(struct arswitch_softc *sc, int phy) in ar8327_phy_fixup() argument
156 device_printf(sc->sc_dev, in ar8327_phy_fixup()
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/freebsd/sys/dev/usb/net/
H A Druephy.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2001-2003, Shunsuke Akiyama <akiyama@FreeBSD.org>.
31 * driver for RealTek RTL8150 internal PHY
79 * The RealTek RTL8150 internal PHY doesn't have vendor/device ID
115 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; in ruephy_service()
130 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) in ruephy_service()
134 * Check to see if we have link. If we do, we don't in ruephy_service()
144 if (sc->mii_ticks <= sc->mii_anegticks) in ruephy_service()
147 sc->mii_ticks = 0; in ruephy_service()
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/freebsd/sys/dev/e1000/
H A De1000_vf.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
56 * e1000_init_phy_params_vf - Inits PHY params
59 * Doesn't do much - there's no PHY available to the VF.
64 hw->phy.type = e1000_phy_vf; in e1000_init_phy_params_vf()
65 hw->phy.ops.acquire = e1000_acquire_vf; in e1000_init_phy_params_vf()
66 hw->phy.ops.release = e1000_release_vf; in e1000_init_phy_params_vf()
72 * e1000_init_nvm_params_vf - Inits NVM params
75 * Doesn't do much - there's no NVM available to the VF.
80 hw->nvm.type = e1000_nvm_none; in e1000_init_nvm_params_vf()
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