Home
last modified time | relevance | path

Searched full:svadu (Results 1 – 7 of 7) sorted by relevance

/linux/Documentation/devicetree/bindings/riscv/
H A Dextensions.yaml180 Both Svade and Svadu extensions control the hardware behavior when
183 1) Neither Svade nor Svadu present in DT => It is technically
184 unknown whether the platform uses Svade or Svadu. Supervisor
189 3) Only Svadu present in DT => Supervisor must assume Svadu to be
191 4) Both Svade and Svadu present in DT => Supervisor must assume
192 Svadu turned-off at boot time. To use Svadu, supervisor must
195 - const: svadu
197 The standard Svadu supervisor-level extension for hardware updating
/linux/arch/riscv/mm/
H A Dpgtable.c26 /* Here only not svadu is impacted */ in ptep_set_access_flags()
/linux/arch/riscv/kvm/
H A Dvcpu_onereg.c45 KVM_ISA_EXT_ARR(SVADU),
121 * Guest OS can use Svadu only when host OS enable Svadu. in kvm_riscv_vcpu_isa_enable_allowed()
H A Dvcpu.c554 if (riscv_isa_extension_available(isa, SVADU) && in kvm_riscv_vcpu_setup_config()
/linux/tools/testing/selftests/kvm/riscv/
H A Dget-reg-list.c428 KVM_ISA_EXT_ARR(SVADU), in isa_ext_single_id_to_str()
963 KVM_ISA_EXT_SIMPLE_CONFIG(svadu, SVADU);
/linux/arch/riscv/include/asm/
H A Dpgtable.h659 * Both Svade and Svadu control the hardware behavior when the PTE A/D bits need to be set. By
660 * default the M-mode firmware enables the hardware updating scheme when only Svadu is present in
/linux/arch/riscv/kernel/
H A Dcpufeature.c401 __RISCV_ISA_EXT_DATA_VALIDATE(svadu, RISCV_ISA_EXT_SVADU, riscv_ext_svadu_validate),