/linux/tools/testing/radix-tree/ |
H A D | maple.c | 740 #define STORE 1 macro 744 (((x) == STORE) ? \ 745 "STORE" : \ 785 } else { /* !null_entry (store) */ in mas_ce2_over_count() 816 * @*range_min: Pointer to store the minimum range of the offset 817 * @*range_max: Pointer to store the maximum range of the offset 887 * @*range_min: A pointer to store the minimum of the range 888 * @*range_max: A pointer to store the maximum of the range 1034 case STORE: in check_erase2_testset() 1138 STORE, 140737488347136, 140737488351231, in check_erase2_sets() [all …]
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/linux/arch/sparc/lib/ |
H A D | M7memcpy.S | 48 * load words, shift half words, store words; branch to finish_up 50 * load words, shift 3 bytes, store words; branch to finish_up 52 * load words, shift 1 byte, store words; branch to finish_up 65 * Use BIS (block initializing store) to avoid copying store cache 66 * lines from memory. But pre-store first element of each cache line 83 * loadx8, falign, block-store, prefetch loop 84 * (only use block-init-store when src/dst on 8 byte boundaries.) 120 #ifndef STORE 121 #define STORE(type,src,addr) type src, [addr] macro 128 * between the first initializing store and the final stores. [all …]
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H A D | csum_copy.S | 31 #ifndef STORE 32 #define STORE(type,src,addr) type src, [addr] macro 53 EX_ST(STORE(stb, %o4, %o1 + 0x00)) 63 EX_ST(STORE(sth, %o5, %o1 + 0x00)) 112 EX_ST(STORE(stw, %o5, %o1 + 0x00)) 115 EX_ST(STORE(stw, %g1, %o1 + 0x04)) 118 EX_ST(STORE(stw, %g2, %o1 + 0x08)) 121 EX_ST(STORE(stw, %o5, %o1 + 0x0c)) 124 EX_ST(STORE(stw, %g1, %o1 + 0x10)) 127 EX_ST(STORE(stw, %g2, %o1 + 0x14)) [all …]
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H A D | NG4memcpy.S | 69 #ifndef STORE 71 #define STORE(type,src,addr) type src, [addr] macro 73 #define STORE(type,src,addr) type##a src, [addr] %asi macro 135 EX_ST(STORE(stb, %g2, %o0 - 0x01), memcpy_retl_o2_plus_g1_plus_1) 165 EX_ST(STORE(stx, %g2, %o0 - 0x08), memcpy_retl_o2_plus_g1_plus_8) 241 EX_ST_FP(STORE(std, %f16, %o0 + 0x00), memcpy_retl_o2_plus_o4_plus_64) 242 EX_ST_FP(STORE(std, %f18, %o0 + 0x08), memcpy_retl_o2_plus_o4_plus_56) 243 EX_ST_FP(STORE(std, %f20, %o0 + 0x10), memcpy_retl_o2_plus_o4_plus_48) 244 EX_ST_FP(STORE(std, %f22, %o0 + 0x18), memcpy_retl_o2_plus_o4_plus_40) 245 EX_ST_FP(STORE(std, %f24, %o0 + 0x20), memcpy_retl_o2_plus_o4_plus_32) [all …]
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/linux/kernel/ |
H A D | stacktrace.c | 76 unsigned long *store; member 93 c->store[c->len++] = addr; in stack_trace_consume_entry() 106 * @store: Pointer to storage array 112 unsigned int stack_trace_save(unsigned long *store, unsigned int size, in stack_trace_save() argument 117 .store = store, in stack_trace_save() 130 * @store: Pointer to storage array 136 unsigned int stack_trace_save_tsk(struct task_struct *tsk, unsigned long *store, in stack_trace_save_tsk() argument 141 .store = store, in stack_trace_save_tsk() 159 * @store: Pointer to storage array 165 unsigned int stack_trace_save_regs(struct pt_regs *regs, unsigned long *store, in stack_trace_save_regs() argument [all …]
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/linux/drivers/md/ |
H A D | dm-exception-store.c | 9 #include "dm-exception-store.h" 65 * 'dm-exception-store-<type_name>' is too long of a name in my 67 * containing exception store implementations be 'dm-exstore-<type_name>'. 143 static int set_chunk_size(struct dm_exception_store *store, in set_chunk_size() argument 154 store->chunk_size = store->chunk_mask = store->chunk_shift = 0; in set_chunk_size() 158 return dm_exception_store_set_chunk_size(store, chunk_size, error); in set_chunk_size() 161 int dm_exception_store_set_chunk_size(struct dm_exception_store *store, in dm_exception_store_set_chunk_size() argument 173 (bdev_logical_block_size(dm_snap_cow(store->snap)->bdev) >> 9) || in dm_exception_store_set_chunk_size() 175 (bdev_logical_block_size(dm_snap_origin(store->snap)->bdev) >> 9)) { in dm_exception_store_set_chunk_size() 185 store->chunk_size = chunk_size; in dm_exception_store_set_chunk_size() [all …]
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H A D | dm-snap-transient.c | 9 #include "dm-exception-store.h" 22 * Implementation of the store for non-persistent snapshots. 29 static void transient_dtr(struct dm_exception_store *store) in transient_dtr() argument 31 kfree(store->context); in transient_dtr() 34 static int transient_read_metadata(struct dm_exception_store *store, in transient_read_metadata() argument 42 static int transient_prepare_exception(struct dm_exception_store *store, in transient_prepare_exception() argument 45 struct transient_c *tc = store->context; in transient_prepare_exception() 46 sector_t size = get_dev_size(dm_snap_cow(store->snap)->bdev); in transient_prepare_exception() 48 if (size < (tc->next_free + store->chunk_size)) in transient_prepare_exception() 51 e->new_chunk = sector_to_chunk(store, tc->next_free); in transient_prepare_exception() [all …]
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H A D | dm-snap-persistent.c | 9 #include "dm-exception-store.h" 33 * We need to store a record of which parts of the origin have 36 * of the COW store. It makes sense therefore, to store the 103 * The top level structure for a persistent exception store. 106 struct dm_exception_store *store; member 142 * the exception store because chunks can be committed out of 175 len = ps->store->chunk_size << SECTOR_SHIFT; in alloc_area() 236 .bdev = dm_snap_cow(ps->store->snap)->bdev, in chunk_io() 237 .sector = ps->store->chunk_size * chunk, in chunk_io() 238 .count = ps->store->chunk_size, in chunk_io() [all …]
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H A D | dm-exception-store.h | 6 * Device-mapper snapshot exception store. 47 int (*ctr)(struct dm_exception_store *store, char *options); 52 void (*dtr)(struct dm_exception_store *store); 59 int (*read_metadata)(struct dm_exception_store *store, 65 * Find somewhere to store the next exception. 67 int (*prepare_exception)(struct dm_exception_store *store, 73 void (*commit_exception)(struct dm_exception_store *store, 79 * Returns 0 if the exception store is empty. 86 int (*prepare_merge)(struct dm_exception_store *store, 93 int (*commit_merge)(struct dm_exception_store *store, int nr_merged); [all …]
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/linux/tools/perf/ui/gtk/ |
H A D | hists.c | 97 static void perf_gtk__add_callchain_flat(struct rb_root *root, GtkTreeStore *store, in perf_gtk__add_callchain_flat() argument 119 gtk_tree_store_append(store, &iter, &new_parent); in perf_gtk__add_callchain_flat() 122 gtk_tree_store_set(store, &iter, 0, buf, -1); in perf_gtk__add_callchain_flat() 125 gtk_tree_store_set(store, &iter, col, buf, -1); in perf_gtk__add_callchain_flat() 140 gtk_tree_store_append(store, &iter, &new_parent); in perf_gtk__add_callchain_flat() 143 gtk_tree_store_set(store, &iter, 0, buf, -1); in perf_gtk__add_callchain_flat() 146 gtk_tree_store_set(store, &iter, col, buf, -1); in perf_gtk__add_callchain_flat() 160 static void perf_gtk__add_callchain_folded(struct rb_root *root, GtkTreeStore *store, in perf_gtk__add_callchain_folded() argument 209 gtk_tree_store_append(store, &iter, parent); in perf_gtk__add_callchain_folded() 212 gtk_tree_store_set(store, &iter, 0, buf, -1); in perf_gtk__add_callchain_folded() [all …]
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/linux/arch/mips/cavium-octeon/ |
H A D | octeon-memcpy.S | 89 #define STORE sd macro 192 EXC( STORE t0, UNIT(0)(dst), s_exc_p16u) 193 EXC( STORE t1, UNIT(1)(dst), s_exc_p15u) 194 EXC( STORE t2, UNIT(2)(dst), s_exc_p14u) 195 EXC( STORE t3, UNIT(3)(dst), s_exc_p13u) 200 EXC( STORE t0, UNIT(4)(dst), s_exc_p12u) 201 EXC( STORE t1, UNIT(5)(dst), s_exc_p11u) 202 EXC( STORE t2, UNIT(6)(dst), s_exc_p10u) 204 EXC( STORE t3, UNIT(7)(dst), s_exc_p9u) 210 EXC( STORE t0, UNIT(-8)(dst), s_exc_p8u) [all …]
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/linux/net/netfilter/ipset/ |
H A D | Kconfig | 33 can store IPv4 addresses (or network addresses) from a range. 42 can store IPv4 address and (source) MAC address pairs from a range. 51 can store TCP/UDP port numbers from a range. 60 can store arbitrary IPv4 or IPv6 addresses (or network addresses) 70 can store IPv4/IPv6 address and mark pairs. 79 can store IPv4/IPv6 address and protocol/port pairs. 88 one can store IPv4/IPv6 address, protocol/port, and IPv4/IPv6 98 one can store IPv4/IPv6 address, protocol/port, and IPv4/IPv6 108 one can store IPv4/IPv6 address and MAC (ethernet address) pairs in a set. 117 one can store MAC (ethernet address) elements in a set. [all …]
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/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/ |
H A D | spec_operation.json | 32 …cDescription": "Counts store-exclusive operations that have been speculatively executed and have s… 36 …escription": "Counts store-exclusive operations that have been speculatively executed and have not… 40 … "PublicDescription": "Counts store-exclusive operations that have been speculatively executed." 48 …iption": "Counts speculatively executed store operations including Single Instruction Multiple Dat… 56 …: "Counts speculatively executed Advanced SIMD operations excluding load, store and move micro-ope… 88 …"PublicDescription": "Counts DSB operations that are speculatively issued to Load/Store unit in th… 92 …peculatively issued to the Load/Store unit in the CPU. This event does not count implied barriers … 100 …"PublicDescription": "Counts any store release operations that are speculatively executed. Eg: STL…
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H A D | memory.json | 4 …store unit, where those accesses are issued due to load or store operations. This event counts mem… 16 …unts atomic load operations. If memory accesses are broken up by the load/store unit into smaller … 20 …store operations. The event counts any memory store access, no matter whether the data is located …
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/linux/sound/usb/ |
H A D | mixer_us16x08.c | 358 /* gets a current mixer value from common store */ 421 struct snd_us16x08_comp_store *store = elem->private_data; in snd_us16x08_comp_get() local 425 ucontrol->value.integer.value[0] = store->val[val_idx][index]; in snd_us16x08_comp_get() 435 struct snd_us16x08_comp_store *store = elem->private_data; in snd_us16x08_comp_put() local 451 store->val[val_idx][index] = ucontrol->value.integer.value[0]; in snd_us16x08_comp_put() 457 buf[8] = store->val[ in snd_us16x08_comp_put() 460 buf[11] = ratio_map[store->val[ in snd_us16x08_comp_put() 462 buf[14] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_ATTACK)][index] in snd_us16x08_comp_put() 464 buf[17] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_RELEASE)][index] in snd_us16x08_comp_put() 466 buf[20] = store->val[COMP_STORE_IDX(SND_US16X08_ID_COMP_GAIN)][index]; in snd_us16x08_comp_put() [all …]
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/linux/tools/testing/selftests/powerpc/ptrace/ |
H A D | ptrace-vsx.h | 67 * unsigned long store[128] 70 int compare_vsx_vmx(unsigned long *store, unsigned long *load) in compare_vsx_vmx() argument 75 if (store[1 + 2 * i] != load[1 + 2 * i]) { in compare_vsx_vmx() 76 printf("store[%d]: %lx load[%d] %lx\n", in compare_vsx_vmx() 77 1 + 2 * i, store[i], in compare_vsx_vmx() 85 if (store[i] != load[i]) { in compare_vsx_vmx() 86 printf("store[%d]: %lx load[%d] %lx\n", in compare_vsx_vmx() 87 i, store[i], i, load[i]); in compare_vsx_vmx() 93 if (!(i % 2) && (store[i] != load[i+1])) { in compare_vsx_vmx() 94 printf("store[%d]: %lx load[%d] %lx\n", in compare_vsx_vmx() [all …]
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/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/ |
H A D | spec_operation.json | 36 …cDescription": "Counts store-exclusive operations that have been speculatively executed and have s… 40 …escription": "Counts store-exclusive operations that have been speculatively executed and have not… 44 … "PublicDescription": "Counts store-exclusive operations that have been speculatively executed." 52 …iption": "Counts speculatively executed store operations including Single Instruction Multiple Dat… 60 …: "Counts speculatively executed Advanced SIMD operations excluding load, store and move micro-ope… 92 …"PublicDescription": "Counts DSB operations that are speculatively issued to Load/Store unit in th… 96 …peculatively issued to the Load/Store unit in the CPU. This event does not count implied barriers … 104 …"PublicDescription": "Counts any store release operations that are speculatively executed. Eg: STL…
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/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/ |
H A D | spec_operation.json | 36 …cDescription": "Counts store-exclusive operations that have been speculatively executed and have s… 40 …escription": "Counts store-exclusive operations that have been speculatively executed and have not… 44 … "PublicDescription": "Counts store-exclusive operations that have been speculatively executed." 52 …iption": "Counts speculatively executed store operations including Single Instruction Multiple Dat… 60 …: "Counts speculatively executed Advanced SIMD operations excluding load, store and move micro-ope… 92 …"PublicDescription": "Counts DSB operations that are speculatively issued to Load/Store unit in th… 96 …peculatively issued to the Load/Store unit in the CPU. This event does not count implied barriers … 104 …"PublicDescription": "Counts any store release operations that are speculatively executed. Eg: STL…
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/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/ |
H A D | pipeline.json | 45 …terlock on an address operand. This type of interlock is caused by a load/store instruction waitin… 48 …terlock on an address operand. This type of interlock is caused by a load/store instruction waitin… 63 …ion issued due to the backend, store. This event counts every cycle where there is a stall in the … 66 …ion issued due to the backend, store. This event counts every cycle where there is a stall in the … 81 … to the backend, store, Store Buffer (STB) full. This event counts every cycle where there is a st… 84 … to the backend, store, Store Buffer (STB) full. This event counts every cycle where there is a st… 87 …ued due to the backend, store, TLB miss. This event counts every cycle where there is a stall in t… 90 …ued due to the backend, store, TLB miss. This event counts every cycle where there is a stall in t…
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/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a55/ |
H A D | pipeline.json | 33 …cle that issue is stalled and there is an interlock that is due to a load/store instruction waitin… 36 …cle that issue is stalled and there is an interlock that is due to a load/store instruction waitin… 51 …eration issued due to the backend, store.This event counts every cycle there is a stall in the Wr … 54 …eration issued due to the backend, store.This event counts every cycle there is a stall in the Wr … 69 …on issued due to the backend, store, STB full.This event counts every cycle there is a stall in th… 72 …on issued due to the backend, store, STB full.This event counts every cycle there is a stall in th… 75 …on issued due to the backend, store, TLB miss.This event counts every cycle there is a stall in th… 78 …on issued due to the backend, store, TLB miss.This event counts every cycle there is a stall in th…
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/linux/tools/memory-model/Documentation/ |
H A D | explanation.txt | 86 store instruction accessing the same location (we ignore complicating 169 store to buf but before the store to flag. In this case, r1 and r2 191 store to the same memory location, from any CPU. 197 Since r1 = 1, P0 must store 1 to flag before P1 loads 1 from 205 store to the same address. 210 Since an instruction (in this case, P0's store to flag) cannot 219 x86 and SPARC follow yet a different memory model: TSO (Total Store 222 Consistency. One example is the Store Buffer (SB) pattern, in which 319 is concerned only with the store itself -- its value and its address 386 both branches of an "if" statement store the same value to the same [all …]
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H A D | glossary.txt | 35 When an acquire load returns the value stored by a release store 37 from" the release store), then all operations preceding that 38 store "happen before" any operations following that load acquire. 42 Coherence (co): When one CPU's store to a given variable overwrites 43 either the value from another CPU's store or some later value, 54 Control Dependency: When a later store's execution depends on a test 56 a "control dependency" extends from that load to that store. 88 Data Dependency: When the data written by a later store is computed based 90 extends from that load to that later store. For example: 105 From-Reads (fr): When one CPU's store to a given variable happened [all …]
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/linux/drivers/acpi/acpica/ |
H A D | exstore.c | 4 * Module Name: exstore - AML Interpreter object store support 36 * *dest_desc - Where to store it. Must be an NS node 43 * DESCRIPTION: Store the value described by source_desc into the location 45 * functions to store the result of an operation into 46 * the destination operand -- not just simply the actual "Store" 116 * 1) Store to Name (Change the object associated with a name) in acpi_ex_store() 117 * 2) Store to an indexed area of a Buffer or Package in acpi_ex_store() 118 * 3) Store to a Method Local or Arg in acpi_ex_store() 119 * 4) Store to the debug object in acpi_ex_store() 144 /* Store to a method local/arg */ in acpi_ex_store() [all …]
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/linux/drivers/s390/char/ |
H A D | sclp_sd.c | 3 * SCLP Store Data support and sysfs interface 56 * struct sclp_sd_data - Result of a Store Data request 68 * struct sclp_sd_listener - Listener for asynchronous Store Data response 72 * @evbuf: Contains the resulting Store Data response after completion 82 * struct sclp_sd_file - Sysfs representation of a Store Data entity 105 * sclp_sd_listener_add() - Add listener for Store Data responses 116 * sclp_sd_listener_remove() - Remove listener for Store Data responses 127 * sclp_sd_listener_init() - Initialize a Store Data response listener 131 * Initialize a listener for asynchronous Store Data responses. This listener 143 * sclp_sd_receiver() - Receiver for Store Data events [all …]
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/linux/arch/arm/lib/ |
H A D | bitops.h | 31 .macro __testop, name, instr, store, barrier 61 .macro testop, name, instr, store 62 __testop \name, \instr, \store, smp_dmb 65 .macro sync_testop, name, instr, store 66 __testop \name, \instr, \store, __smp_dmb 91 * @store: store instruction 93 * Note: we can trivially conditionalise the store instruction 96 .macro testop, name, instr, store 108 \store r2, [r1]
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