| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | marvell,mvebu-pinctrl.txt | 1 * Marvell SoC pinctrl core driver for mpp
3 The pinctrl driver enables Marvell SoCs to configure the multi-purpose pins
4 (mpp) to a specific function. For each SoC family there is a SoC specific
7 Please refer to pinctrl-bindings.txt in this directory for details of the
11 A Marvell SoC pin configuration node is a node of a group of pins which can
12 be used for a specific device or function. Each node requires one or more
16 - compatible: "marvell,<soc>-pinctrl"
17 Please refer to each marvell,<soc>-pinctrl.txt binding doc for supported SoCs.
20 - marvell,pins: string array of mpp pins or group of pins to be muxed.
21 - marvell,function: string representing a function to mux to for all
[all …]
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| H A D | fsl,imx-pinctrl.txt | 10 Please refer to pinctrl-bindings.txt in this directory for details of the
15 used for a specific device or function. This node represents both mux and config
18 such as pull-up, open drain, drive strength, etc.
21 - compatible: "fsl,<soc>-iomuxc"
22 Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs.
25 - fsl,pins: each entry consists of 6 integers and represents the mux and config
28 imx*-pinfunc.h under device tree source folder. The last integer CONFIG is
29 the pad setting value like pull-up on this pin. And that's why fsl,pins entry
41 Please refer to each fsl,<soc>-pinctrl,txt binding doc for SoC specific part
45 Some requirements for using fsl,imx-pinctrl binding:
[all …]
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| H A D | brcm,iproc-gpio.txt | 5 - compatible:
6 "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
7 supports full-featured pinctrl and GPIO functions used in various iProc
10 May contain an SoC-specific compatibility string to accommodate any
11 SoC-specific features
13 "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
14 "brcm,cygnus-crmu-gpio" for Cygnus SoCs
16 "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
19 "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
23 - reg:
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/net/can/ |
| H A D | rcar_can.txt | 1 Renesas R-Car CAN controller Device Tree Bindings
2 -------------------------------------------------
5 - compatible: "renesas,can-r8a7742" if CAN controller is a part of R8A7742 SoC.
6 "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC.
7 "renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC.
8 "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC.
9 "renesas,can-r8a77470" if CAN controller is a part of R8A77470 SoC.
10 "renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC.
11 "renesas,can-r8a774b1" if CAN controller is a part of R8A774B1 SoC.
12 "renesas,can-r8a774c0" if CAN controller is a part of R8A774C0 SoC.
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/mmc/ |
| H A D | bluefield-dw-mshc.txt | 1 * Mellanox Bluefield SoC specific extensions to the Synopsys Designware
4 Read synopsys-dw-mshc.txt for more details
7 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
9 by synopsys-dw-mshc.txt and the properties used by the Mellanox Bluefield SoC
10 specific extensions to the Synopsys Designware Mobile Storage Host Controller.
15 - "mellanox,bluefield-dw-mshc": for controllers with Mellanox Bluefield SoC
16 specific extensions.
20 /* Mellanox Bluefield SoC MMC */
22 compatible = "mellanox,bluefield-dw-mshc";
25 fifo-depth = <0x100>;
[all …]
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| H A D | samsung-sdhci.txt | 8 Required SoC Specific Properties:
9 - compatible: should be one of the following
10 - "samsung,s3c6410-sdhci": For controllers compatible with s3c6410 sdhci
12 - "samsung,exynos4210-sdhci": For controllers compatible with Exynos4 sdhci
15 Required Board Specific Properties:
16 - pinctrl-0: Should specify pin control groups used for this controller.
17 - pinctrl-names: Should contain only one value - "default".
21 compatible = "samsung,exynos4210-sdhci";
24 bus-width = <4>;
25 cd-gpios = <&gpk2 2 0>;
[all …]
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| H A D | exynos-dw-mshc.txt | 1 * Samsung Exynos specific extensions to the Synopsys Designware Mobile
5 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
14 specific extensions.
15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
16 specific extensions.
17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
18 specific extensions.
19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
[all …]
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| H A D | renesas,sdhi.txt | 4 - compatible: should contain one or more of the following:
5 "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
6 "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
7 "renesas,sdhi-r7s9210" - SDHI IP on R7S9210 SoC
8 "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
9 "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
10 "renesas,sdhi-r8a7742" - SDHI IP on R8A7742 SoC
11 "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
12 "renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
13 "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | rcar-pci.txt | 1 * Renesas R-Car PCIe interface
4 compatible: "renesas,pcie-r8a7742" for the R8A7742 SoC;
5 "renesas,pcie-r8a7743" for the R8A7743 SoC;
6 "renesas,pcie-r8a7744" for the R8A7744 SoC;
7 "renesas,pcie-r8a774a1" for the R8A774A1 SoC;
8 "renesas,pcie-r8a774b1" for the R8A774B1 SoC;
9 "renesas,pcie-r8a774c0" for the R8A774C0 SoC;
10 "renesas,pcie-r8a7779" for the R8A7779 SoC;
11 "renesas,pcie-r8a7790" for the R8A7790 SoC;
12 "renesas,pcie-r8a7791" for the R8A7791 SoC;
[all …]
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| H A D | pci-rcar-gen2.txt | 2 -------------------------
9 - compatible: "renesas,pci-r8a7742" for the R8A7742 SoC;
10 "renesas,pci-r8a7743" for the R8A7743 SoC;
11 "renesas,pci-r8a7744" for the R8A7744 SoC;
12 "renesas,pci-r8a7745" for the R8A7745 SoC;
13 "renesas,pci-r8a7790" for the R8A7790 SoC;
14 "renesas,pci-r8a7791" for the R8A7791 SoC;
15 "renesas,pci-r8a7793" for the R8A7793 SoC;
16 "renesas,pci-r8a7794" for the R8A7794 SoC;
17 "renesas,pci-rcar-gen2" for a generic R-Car Gen2 or
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/rtc/ |
| H A D | isil,isl12057.txt | 8 ("wakeup-source") to handle the specific use-case found
9 on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104
10 and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip
12 to the SoC but to a PMIC. It allows the device to be powered up when
14 get access to the 'wakealarm' sysfs entry, this specific property can
15 be set when the IRQ#2 pin of the chip is not connected to the SoC but
20 - "compatible": must be "isil,isl12057"
21 - "reg": I2C bus address of the device
25 - "wakeup-source": mark the chip as a wakeup source, independently of
26 the availability of an IRQ line connected to the SoC.
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/arm/marvell/ |
| H A D | marvell,orion5x.txt | 1 Marvell Orion SoC Family Device Tree Bindings
2 ---------------------------------------------
4 Boards with a SoC of the Marvell Orion family, eg 88f5181
9 In addition, the above compatible shall be extended with the specific
10 SoC. Currently known SoC compatibles are:
12 "marvell,orion5x-88f5181"
13 "marvell,orion5x-88f5182"
15 And in addition, the compatible shall be extended with the specific
21 "lacie,ethernet-disk-mini-v2"
22 "lacie,d2-network"
[all …]
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| H A D | marvell,kirkwood.txt | 1 Marvell Kirkwood SoC Family Device Tree Bindings
2 ------------------------------------------------
4 Boards with a SoC of the Marvell Kirkwook family, eg 88f6281
9 In addition, the above compatible shall be extended with the specific
10 SoC. Currently known SoC compatibles are:
12 "marvell,kirkwood-88f6192"
13 "marvell,kirkwood-88f6281"
14 "marvell,kirkwood-88f6282"
15 "marvell,kirkwood-88f6283"
16 "marvell,kirkwood-88f6702"
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/sifive/ |
| H A D | sifive-blocks-ip-versioning.txt | 1 DT compatible string versioning for SiFive open-source IP blocks
4 strings for open-source SiFive IP blocks. HDL for these IP blocks
7 https://github.com/sifive/sifive-blocks
9 IP block-specific DT compatible strings are contained within the HDL,
10 in the form "sifive,<ip-block-name><integer version number>".
14 https://github.com/sifive/sifive-blocks/blob/v1.0/src/main/scala/devices/uart/UART.scala#L43
17 auto-discovery, the maintainers of these IP blocks intend to increment
25 upstream sifive-blocks commits. It is expected that most drivers will
26 match on these IP block-specific compatible strings.
28 DT data authors, when writing data for a particular SoC, should
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/dma/ |
| H A D | fsl-edma.txt | 3 The eDMA channels have multiplex capability by programmble memory-mapped
5 specific DMA request source can only be multiplexed by any channel of certain
10 - compatible :
11 - "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC
12 - "fsl,imx7ulp-edma" for eDMA2 used similar to that on i.mx7ulp
13 - "fsl,ls1028a-edma" followed by "fsl,vf610-edma" for eDMA used on the
14 LS1028A SoC.
15 - reg : Specifies base physical address(s) and size of the eDMA registers.
19 - interrupts : A list of interrupt-specifiers, one for each entry in
20 interrupt-names on vf610 similar SoC. But for i.mx7ulp per channel
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | mpic.txt | 14 - compatible
22 - reg
24 Value type: <prop-encoded-array>
29 - interrupt-controller
35 - #interrupt-cells
39 specifiers do not contain the interrupt-type or type-specific
42 - #address-cells
47 - pic-no-reset
53 configuration registers to a sane state-- masked or
60 - big-endian
[all …]
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| H A D | dcsr.txt | 21 - compatible
24 Definition: Must include "fsl,dcsr" and "simple-bus".
25 The DCSR space exists in the memory-mapped bus.
27 - #address-cells
33 - #size-cells
40 - ranges
42 Value type: <prop-encoded-arra
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | renesas,i2c.txt | 1 I2C for R-Car platforms
4 - compatible:
5 "renesas,i2c-r8a7742" if the device is a part of a R8A7742 SoC.
6 "renesas,i2c-r8a7743" if the device is a part of a R8A7743 SoC.
7 "renesas,i2c-r8a7744" if the device is a part of a R8A7744 SoC.
8 "renesas,i2c-r8a7745" if the device is a part of a R8A7745 SoC.
9 "renesas,i2c-r8a77470" if the device is a part of a R8A77470 SoC.
10 "renesas,i2c-r8a774a1" if the device is a part of a R8A774A1 SoC.
11 "renesas,i2c-r8a774b1" if the device is a part of a R8A774B1 SoC.
12 "renesas,i2c-r8a774c0" if the device is a part of a R8A774C0 SoC.
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/usb/ |
| H A D | mediatek,mtk-xhci.txt | 3 The device node for Mediatek SOC USB3.0 host controller
6 the second one supports dual-role mode, and the host is based on xHCI
11 ------------------------------------------------------------------------
14 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
15 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
16 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
18 - "mediatek,mt8173-xhci"
19 - reg : specifies physical base address and size of the registers
20 - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
21 - interrupts : interrupt used by the controller
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | brcm,brcmnand.txt | 3 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
4 flash chips. It has a memory-mapped register interface for both control
15 - compatible : May contain an SoC-specific compatibility string (see below)
16 to account for any SoC-specific hardware bits that may be
21 string, like "brcm,brcmnand-v7.0"
23 brcm,brcmnand-v2.1
24 brcm,brcmnand-v2.2
25 brcm,brcmnand-v4.0
26 brcm,brcmnand-v5.0
27 brcm,brcmnand-v6.0
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/ptp/ |
| H A D | brcm,ptp-dte.txt | 4 - compatible: should contain the core compatibility string
5 and the SoC compatibility string. The SoC
6 compatibility string is to handle SoC specific
9 "brcm,ptp-dte"
10 SoC compatibility strings:
11 "brcm,iproc-ptp-dte" - for iproc based SoC's
12 - reg: address and length of the DTE block's NCO registers
16 ptp: ptp-dte@180af650 {
17 compatible = "brcm,iproc-ptp-dte", "brcm,ptp-dte";
|
| /freebsd/sys/contrib/device-tree/Bindings/c6x/ |
| H A D | clocks.txt | 2 -------------------------
4 This is a first-cut support for the SoC clock controllers. This is still
10 - compatible: "ti,c64x+pll"
11 May also have SoC-specific value to support SoC-specific initialization
13 "ti,c6455-pll"
14 "ti,c6457-pll"
15 "ti,c6472-pll"
16 "ti,c6474-pll"
18 - reg: base address and size of register area
19 - clock-frequency: input clock frequency in hz
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-davinci.txt | 4 Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
5 dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
9 - #address-cells: number of cells required to define a chip select
11 - #size-cells: should be zero.
12 - compatible:
13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
15 - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC
17 - reg: Offset and length of SPI controller register space
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/clock/sifive/ |
| H A D | fu540-prci.txt | 3 On the FU540 family of SoCs, most system-wide clock and reset integration
7 - compatible: Should be "sifive,<chip>-prci". Only one value is
8 supported: "sifive,fu540-c000-prci"
9 - reg: Should describe the PRCI's register target physical address region
10 - clocks: Should point to the hfclk device tree node and the rtcclk
11 device tree node. The RTC clock here is not a time-of-day clock,
12 but is instead a high-stability clock source for system timers
14 - #clock-cells: Should be <1>
17 macros defined in include/dt-bindings/clock/sifive-fu540-prci.h.
22 underneath /, rather than /soc.
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/arm/ti/ |
| H A D | k3.txt | 1 Texas Instruments K3 Multicore SoC architecture device tree bindings
2 --------------------------------------------------------------------
4 Platforms based on Texas Instruments K3 Multicore SoC architecture
8 ----
10 Each device tree root node must specify which exact SoC in K3 Multicore SoC
13 - AM654
16 - J721E
20 ------
23 of the following board-specific compatible values:
25 - AM654 EVM
[all …]
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