| /freebsd/share/man/man4/ |
| H A D | ads111x.4 | 35 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
60 .Va dev.ads111x.<unit>.<channel>.voltage
61 variable is accessed for a given channel, the driver switches the
62 chip's internal mux to choose the right input pins for that channel,
63 directs it to make a single measurement, and returns the measured value
67 While device is directed to make a single measurement, it still averages
71 second, a single measurement would require 8 milliseconds.
75 making either single-ended or differential measurements.
79 driver models that by creating a separate output channel for each of
[all …]
|
| H A D | ng_hci.4 | 1 .\" Copyright (c) 2001-2002 Maksim Yevmenkin <m_evmenkin@yahoo.com>
44 Bluetooth is a short-range radio link intended to replace the cable(s)
50 asynchronous data channel, up to three simultaneous synchronous voice
51 channels, or a channel which simultaneously supports asynchronous data
53 Each voice channel supports a 64 kb/s synchronous
54 (voice) channel in each direction.
55 The asynchronous channel can support
59 The Bluetooth system provides a point-to-point connection (only two
60 Bluetooth units involved), or a point-to-multipoint connection.
61 In the point-to-multipoint connection,
[all …]
|
| H A D | snd_hdspe.4 | 34 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
56 .Bl -bullet -compact
58 RME HDSPe AIO (optional AO4S-192 and AI4S-192 extension boards)
66 For ADAT ports, 8 channel, 4 channel and 2 channel formats are supported.
67 The effective number of ADAT channels is 8 channels at single speed
68 (32kHz-48kHz), 4 channels at double speed (64kHz-96kHz), and 2 channels at
69 quad speed (128kHz-192kHz).
70 Depending on sample rate and channel format selected, not all pcm channels can
77 .Bl -tag -width indent
[all …]
|
| H A D | snd_hdsp.4 | 35 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
57 .Bl -bullet -compact
59 RME HDSP 9632 (optional AO4S-192 and AIS-192 extension boards)
67 For ADAT ports, 8 channel, 4 channel and 2 channel formats are supported.
68 The effective number of ADAT channels is 8 channels at single speed
69 (32kHz-48kHz) and 4 channels at double speed (64kHz-96kHz).
70 Only the HDSP 9632 can operate at quad speed (128kHz-192kHz), ADAT is
72 Depending on sample rate and channel format selected, not all pcm channels can
79 .Bl -tag -width indent
[all …]
|
| H A D | ng_l2cap.4 | 1 .\" Copyright (c) 2001-2002 Maksim Yevmenkin <m_evmenkin@yahoo.com>
45 L2CAP provides connection-oriented and connectionless data services to upper
52 .Bl -enum -offset indent
60 The Baseband always provides the impression of full-duplex communication
62 This does not imply that all L2CAP communications are bi-directional.
66 L2CAP provides a reliable channel using the mechanisms available at the
78 Each channel is bound to a single protocol in a many-to-one fashion.
80 channels can be bound to the same protocol, but a channel cannot be bound to
82 Each L2CAP packet received on a channel is directed to
85 Each one of the end-points of an L2CAP channel is referred to by a channel
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/regulator/ |
| H A D | dlg,da9121.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/ |
| H A D | trivial-devices.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-ma
[all...] |
| /freebsd/share/man/man9/ |
| H A D | ieee80211_radiotap.9 | 60 layer used by 802.11 drivers includes support for a device-independent
68 Radiotap was designed to balance the desire for a hardware-independent,
93 With radiotap setup, drivers just need to fill in per-packet
105 .Bd -literal -offset indent
115 .Bd -literal -offset indent
129 .Bl -tag -width indent
131 This field contains the unsigned 64-bit value, in microseconds,
138 This field contains a single unsigned 8-bit value, containing one or
140 .Bl -tag -width indent
153 data payload to align the payload to a 32-bit boundary.
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | st,stm32-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 STM32 ADC is a successive approximation analog-to-digital converter.
12 in single, continuous, scan or discontinuous mode. Result of the ADC is
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
27 - st,stm32f4-adc-core
[all …]
|
| H A D | st,stm32-dfsdm-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
28 - st,stm32h7-dfsdm
[all …]
|
| H A D | xilinx-xadc.txt | 22 - compatible: Should be one of
23 * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device
25 * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to
27 * "xlnx,system-management-wiz-1.3": When using the
30 - reg: Address and length of the register set for the device
31 - interrupts: Interrupt for the XADC control interface.
32 - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock,
33 when using the axi-xadc or the axi-system-management-wizard this must be
37 - xlnx,external-mux:
40 * "single": External multiplexer mode is used with one
[all …]
|
| H A D | renesas,gyroadc.txt | 1 * Renesas R-Car GyroADC device driver
5 are sampled by the GyroADC block in a round-robin fashion and the result
9 - compatible: Should be "<soc-specific>", "renesas,rcar-gyroadc".
10 The <soc-specific> should be one of:
11 renesas,r8a7791-gyroadc - for the GyroADC block present
13 renesas,r8a7792-gyroadc - for the GyroADC with interrupt
15 - reg: Address and length of the register set for the device
16 - clocks: References to all the clocks specified in the clock-names
18 Documentation/devicetree/bindings/clock/clock-bindings.txt.
19 - clock-names: Shall contain "fck". The "fck" is the GyroADC block clock.
[all …]
|
| H A D | renesas,rcar-gyroadc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car GyroADC
10 - Marek Vasut <marek.vasut+renesas@gmail.com>
15 are sampled by the GyroADC block in a round-robin fashion and the result
23 - enum:
24 - renesas,r8a7791-gyroadc
25 - renesas,r8a7792-gyroadc
[all …]
|
| H A D | ti,adc081c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI Single-channel I2C ADCs
10 - Jonathan Cameron <jic23@kernel.org>
11 - Lars-Peter Clausen <lars@metafoo.de>
14 Single-channel ADC supporting 8, 10, or 12-bit samples and high/low alerts.
19 - ti,adc081c
20 - ti,adc101c
21 - ti,adc121c
[all …]
|
| /freebsd/usr.sbin/pwm/ |
| H A D | pwm.8 | 47 Some PWM hardware supports multiple output channels within a single
50 instance controls a single PWM channel.
59 is the channel number within that unit.
62 .Bl -tag -width "-f device"
72 Show the configuration of the PWM channel.
74 Disable the PWM channel.
76 Configure the duty cycle (in nanoseconds or percentage) of the PWM channel.
81 Enable the PWM channel.
83 Configure the period (in nanoseconds) of the PWM channel.
88 .Bl -bullet
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/dma/ |
| H A D | qcom_hidma_mgmt.txt | 15 read/write in a single burst.
18 - compatible: "qcom,hidma-mgmt-1.0";
19 - reg: Address range for DMA device
20 - dma-channels: Number of channels supported by this DMA controller.
21 - max-write-burst-bytes: Maximum write burst in bytes that HIDMA can
22 occupy the bus for in a single transaction. A memcpy requested is
26 - max-read-burst-bytes: Maximum read burst in bytes that HIDMA can
27 occupy the bus for in a single transaction. A memcpy request is
31 - max-write-transactions: This value is how many times a write burst is
34 - max-read-transactions: This value is how many times a read burst is
[all …]
|
| /freebsd/sys/contrib/openzfs/man/man5/ |
| H A D | vdev_id.conf.5 | 29 more values on a single line.
34 .Bl -tag -width "-h"
41 A defined alias takes precedence over a topology-derived name, but the
49 .Pa /dev/disk/by-vdev .
56 .It Sy channel [ Ns Ar pci_slot ] Ar port Ar name
57 Maps a physical path to a channel name (typically representing a single
62 .Pa /dev/by-enclosure
74 .Pa /dev/by-enclosure/ Ns Ao Ar prefix Ac Ns - Ns Ao Ar channel Ac Ns Aq Ar num
79 .It Sy slot Ar prefix Ar new Op Ar channel
83 .Ar channel
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | max98373.txt | 7 - compatible : "maxim,max98373"
9 - reg : the I2C address of the device.
13 - maxim,vmon-slot-no : slot number used to send voltage information
18 - maxim,imon-slot-no : slot number used to send current information
21 - maxim,spkfb-slot-no : slot number used to send speaker feedback information
24 - maxim,interleave-mode : For cases where a single combined channel
26 to share a single data output channel on alternating frames.
28 on a single output channel.
36 maxim,vmon-slot-no = <0>;
37 maxim,imon-slot-no = <1>;
[all …]
|
| H A D | adi,max98388.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ryan Lee <ryans.lee@analog.com>
13 The MAX98388 is a mono Class-D speaker amplifier with I/V feedback.
18 - $ref: dai-common.yaml#
23 - adi,max98388
28 '#sound-dai-cells':
31 adi,vmon-slot-no:
38 adi,imon-slot-no:
[all …]
|
| H A D | samsung-i2s.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylweste
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | ti,sn65dsi83.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
13 Texas Instruments SN65DSI83 1x Single-link MIPI DSI
14 to 1x Single-link LVDS
16 Texas Instruments SN65DSI84 1x Single-link MIPI DSI
17 to 1x Dual-link or 2x Single-link LVDS
23 - ti,sn65dsi83
24 - ti,sn65dsi84
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/display/ |
| H A D | mipi-dsi-bus.txt | 8 This document describes DSI bus-specific properties only or defines existing
15 The following assumes that only a single peripheral is connected to a DSI
25 - #address-cells: The number of cells required to represent an address on the
26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
27 a maximum of 4 devices can be addressed on a single bus. Hence the value of
29 - #size-cells: Should be 0. There are cases where it makes sense to use a
33 - clock-master: boolean. Should be enabled if the host is being used in
43 ------------------------------------------------------
49 device-specific properties.
52 - reg: The virtual channel number of a DSI peripheral. Must be in the range
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/mux/ |
| H A D | mux-controller.txt | 7 multiplexer needed by each consumer, but a single mux controller can of course
8 control several multiplexers for a single consumer.
11 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
12 0-7 for an 8-way multiplexer, etc.
16 ---------
19 want to use with a property containing a 'mux-ctrl-list':
21 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
22 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
23 mux-ctrl-phandle : phandle to mux controller node
24 mux-ctrl-specifier : array of #mux-control-cells specifying the
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/input/ |
| H A D | pwm-vibrator.txt | 4 strength increases based on the duty cycle of the enable PWM channel
7 The binding supports an optional direction PWM channel, that can be
12 - compatible: should contain "pwm-vibrator"
13 - pwm-names: Should contain "enable" and optionally "direction"
14 - pwms: Should contain a PWM handle for each entry in pwm-names
17 - vcc-supply: Phandle for the regulator supplying power
18 - direction-duty-cycle-ns: Duty cycle of the direction PWM channel in
19 nanoseconds, defaults to 50% of the channel's
26 pinctrl-single,pins = <
32 pinctrl-single,pins = <
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/spmi/ |
| H A D | qcom,spmi-pmic-arb.txt | 4 controller with wrapping arbitration logic to allow for multiple on-chip
5 devices to control a single SPMI master.
13 See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for
17 - compatible : should be "qcom,spmi-pmic-arb".
18 - reg-names : must contain:
19 "core" - core registers
20 "intr" - interrupt controller registers
21 "cnfg" - configuration registers
23 "chnls" - tx-channel per virtual slave registers.
24 "obsrvr" - rx-channel (called observer) per virtual slave registers.
[all …]
|