| /linux/sound/soc/renesas/ |
| H A D | rz-ssi.c | 28 /* SSI REGISTER BITS */
86 int fifo_sample_size; /* sample capacity of SSI FIFO */
98 int (*transfer)(struct rz_ssi_priv *ssi, struct rz_ssi_stream *strm);
117 * The SSI supports full-duplex transmission and reception.
172 rz_ssi_stream_get(struct rz_ssi_priv *ssi, struct snd_pcm_substream *substream) in rz_ssi_stream_get() argument
174 struct rz_ssi_stream *stream = &ssi->playback; in rz_ssi_stream_get()
177 stream = &ssi->capture; in rz_ssi_stream_get()
182 static inline bool rz_ssi_is_dma_enabled(struct rz_ssi_priv *ssi) in rz_ssi_is_dma_enabled() argument
184 return (ssi->playback.dma_ch && (ssi->dma_rt || ssi->capture.dma_ch)); in rz_ssi_is_dma_enabled()
190 struct rz_ssi_priv *ssi = strm->priv; in rz_ssi_set_substream() local
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| /linux/drivers/hsi/clients/ |
| H A D | ssi_protocol.c | 5 * Implementation of the SSI McSAAB improved protocol.
45 * SSI protocol command definitions
101 * struct ssi_protocol - SSI protocol (McSAAB) data
111 * @keep_alive: Workaround for SSI HW bug
146 /* List of ssi protocol instances */
199 static struct hsi_msg *ssip_alloc_data(struct ssi_protocol *ssi, in ssip_alloc_data() argument
209 msg->channel = ssi->channel_id_data; in ssip_alloc_data()
217 struct ssi_protocol *ssi = hsi_client_drvdata(msg->cl); in ssip_release_cmd() local
220 spin_lock_bh(&ssi->lock); in ssip_release_cmd()
221 list_add_tail(&msg->link, &ssi->cmdqueue); in ssip_release_cmd()
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| H A D | Kconfig | 28 tristate "SSI protocol"
31 If you say Y here, you will enable the SSI protocol aka McSAAB.
36 tristate "HSI/SSI character driver"
39 If you say Y here, you will enable the HSI/SSI character driver.
41 serial communication with the cellular modem over HSI/SSI bus.
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| /linux/sound/soc/fsl/ |
| H A D | fsl_ssi.c | 3 // Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver
11 // The i.MX SSI core has some nasty limitations in AC97 mode. While most
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
60 * FSLSSI_I2S_FORMATS: audio formats supported by the SSI
62 * The SSI has a limitation in that the samples must be in the same byte
91 * - SSI inputs external bit clock and outputs frame sync clock -- CBM_CFS
201 bool imx21regs; /* imx21-class SSI - no SACC{ST,EN,DIS} regs */
207 * struct fsl_ssi - per-SSI private data
209 * @irq: IRQ of this SSI
220 * @fifo_depth: Depth of the SSI FIFOs
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| H A D | fsl_ssi.h | 3 * fsl_ssi.h - ALSA SSI interface for the Freescale MPC8610 and i.MX SoC
13 /* -- SSI Register Map -- */
15 /* SSI Transmit Data Register 0 */
17 /* SSI Transmit Data Register 1 */
19 /* SSI Receive Data Register 0 */
21 /* SSI Receive Data Register 1 */
23 /* SSI Control Register */
25 /* SSI Interrupt Status Register */
27 /* SSI Interrupt Enable Register */
29 /* SSI Transmit Configuration Register */
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| H A D | p1022_rdk.c | 38 #define CCSR_GUTS_DMUXCR_SSI 2 /* DMA controller/channel set to SSI */
104 /* Enable SSI Tx signal */ in p1022_rdk_machine_probe()
108 /* Enable SSI Rx signal */ in p1022_rdk_machine_probe()
112 /* Enable DMA Channel for SSI */ in p1022_rdk_machine_probe()
165 * This function is called to remove the sound device for one SSI. We
204 * Although this is a machine driver, the SSI node is the "master" node with
206 * device for each new SSI node that has a codec attached.
213 /* ssi_pdev is the platform device for the SSI node that probed us */ in p1022_rdk_probe()
222 /* Find the codec node for this SSI. */ in p1022_rdk_probe()
264 * We register two DAIs per SSI, one for playback and the other for in p1022_rdk_probe()
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| H A D | fsl_dma.c | 125 * limitation in the SSI driver requires the sample rates for playback and
458 * because the SSI is controlling the DMA controller. We want the DMA in fsl_dma_open()
459 * controller to be set up in advance, and then we signal only the SSI in fsl_dma_open()
523 /* Bus address of SSI STX register */ in fsl_dma_hw_params()
556 /* Due to a quirk of the SSI's STX register, the target address in fsl_dma_hw_params()
581 * controller checks the SSI to see if it needs to stop. BWC should in fsl_dma_hw_params()
593 * f = SSI FIFO depth in fsl_dma_hw_params()
594 * w = SSI watermark value (which equals f - 2) in fsl_dma_hw_params()
622 * device (the SSI's STX0 or SRX0 register). Snooping is only in fsl_dma_hw_params()
701 * When capture is started, the SSI immediately starts to fill its FIFO. in fsl_dma_pointer()
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| H A D | p1022_ds.c | 31 #define CCSR_GUTS_DMUXCR_SSI 2 /* DMA controller/channel set to SSI */
95 /* Enable SSI Tx signal */ in p1022_ds_machine_probe()
99 /* Enable SSI Rx signal */ in p1022_ds_machine_probe()
103 /* Enable DMA Channel for SSI */ in p1022_ds_machine_probe()
154 * This function is called to remove the sound device for one SSI. We
190 * Although this is a machine driver, the SSI node is the "master" node with
192 * device for each new SSI node that has a codec attached.
197 /* ssi_pdev is the platform device for the SSI node that probed us */ in p1022_ds_probe()
207 /* Find the codec node for this SSI. */ in p1022_ds_probe()
249 /* We register two DAIs per SSI, one for playback and the other for in p1022_ds_probe()
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| /linux/drivers/hsi/controllers/ |
| H A D | omap_ssi_core.c | 2 /* OMAP SSI driver.
42 struct hsi_controller *ssi = m->private; in ssi_regs_show() local
43 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); in ssi_regs_show()
46 pm_runtime_get_sync(ssi->device.parent); in ssi_regs_show()
50 pm_runtime_put(ssi->device.parent); in ssi_regs_show()
57 struct hsi_controller *ssi = m->private; in ssi_gdd_regs_show() local
58 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); in ssi_gdd_regs_show()
63 pm_runtime_get_sync(ssi->device.parent); in ssi_gdd_regs_show()
104 pm_runtime_put(ssi->device.parent); in ssi_gdd_regs_show()
112 static int ssi_debug_add_ctrl(struct hsi_controller *ssi) in ssi_debug_add_ctrl() argument
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| H A D | omap_ssi_port.c | 2 /* OMAP SSI port driver.
51 struct hsi_controller *ssi = to_hsi_controller(port->device.parent); in ssi_port_regs_show() local
52 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); in ssi_port_regs_show()
187 struct hsi_controller *ssi = to_hsi_controller(port->device.parent); in ssi_claim_lch() local
188 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); in ssi_claim_lch()
205 struct hsi_controller *ssi = to_hsi_controller(port->device.parent); in ssi_start_dma() local
206 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); in ssi_start_dma()
225 err = dma_map_sg(&ssi->device, msg->sgt.sgl, msg->sgt.nents, in ssi_start_dma()
228 dev_dbg(&ssi->device, "DMA map SG failed !\n"); in ssi_start_dma()
242 err = dma_map_sg(&ssi->device, msg->sgt.sgl, msg->sgt.nents, in ssi_start_dma()
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| H A D | omap_ssi.h | 2 /* OMAP SSI internal interface.
50 * struct omap_ssi_port - OMAP SSI port data
53 * @sst_dma: SSI transmitter physical base address
54 * @ssr_dma: SSI receiver physical base address
55 * @sst_base: SSI transmitter base address
56 * @ssr_base: SSI receiver base address
58 * @lock: Spin lock to serialize access to the SSI port
97 /* OMAP SSI port context */
119 * struct omap_ssi_controller - OMAP SSI controller data
121 * @sys: SSI I/O base address
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| H A D | Kconfig | 8 tristate "OMAP SSI hardware driver"
12 SSI is a legacy version of HSI. It is usually used to connect
14 If you say Y here, you will enable the OMAP SSI hardware driver.
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| /linux/sound/soc/renesas/rcar/ |
| H A D | ssi.c | 3 // Renesas R-Car SSIU/SSI support
13 * SSI interrupt status debug message when debugging
63 #define EN (1 << 0) /* SSI Module Enable */
79 #define SSI_NAME "ssi"
103 #define RSND_SSI_NO_BUSIF (1 << 1) /* SSI+DMA without BUSIF */
109 ((pos) = ((struct rsnd_ssi *)(priv)->ssi + i)); \
112 #define rsnd_ssi_get(priv, id) ((struct rsnd_ssi *)(priv->ssi) + id)
115 #define rsnd_ssi_is_parent(ssi, io) ((ssi) == rsnd_io_to_mod_ssip(io)) argument
125 struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); in rsnd_ssi_use_busif() local
131 if (!(rsnd_flags_has(ssi, RSND_SSI_NO_BUSIF))) in rsnd_ssi_use_busif()
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | fsl,ssi.yaml | 4 $id: http://devicetree.org/schemas/sound/fsl,ssi.yaml#
14 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
23 "fsl,ssi-dma-channel". The SOC-specific compatible string (e.g.
34 - fsl,imx50-ssi
35 - fsl,imx53-ssi
36 - const: fsl,imx51-ssi
37 - const: fsl,imx21-ssi
40 - fsl,imx25-ssi
41 - fsl,imx27-ssi
42 - fsl,imx35-ssi
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| H A D | eukrea-tlv320.txt | 9 - ssi-controller : The phandle of the SSI controller.
23 ssi-controller = <&ssi2>;
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| H A D | fsl,imx-audio-es8328.yaml | 24 ssi-controller:
26 description: The phandle of the i.MX SSI controller
81 - ssi-controller
96 ssi-controller = <&ssi1>;
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| /linux/Documentation/devicetree/bindings/hsi/ |
| H A D | omap-ssi.txt | 1 OMAP SSI controller bindings
3 OMAP3's Synchronous Serial Interface (SSI) controller implements a
9 - compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi"
27 Each port is represented as a sub-node of the ti,omap3-ssi device.
31 ti,omap3-ssi-port (applicable to OMAP34xx devices)
38 - ti,ssi-cawake-gpio: Defines which GPIO pin is used to signify CAWAKE
49 ssi-controller@48058000 {
50 compatible = "ti,omap3-ssi";
53 ti,hwmods = "ssi";
74 ssi-port@4805a000 {
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| /linux/Documentation/devicetree/bindings/spi/ |
| H A D | snps,dw-apb-ssi.yaml | 4 $id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
30 - baikal,bt1-sys-ssi
57 - snps,dw-apb-ssi
58 - snps,dwc-ssi-1.01a
62 const: amazon,alpine-dw-apb-ssi
63 - description: Vendor controllers which use snps,dw-apb-ssi as fallback
71 - const: snps,dw-apb-ssi
73 const: intel,keembay-ssi
75 const: intel,mountevans-imc-ssi
79 const: baikal,bt1-ssi
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| /linux/arch/mips/boot/dts/ingenic/ |
| H A D | cu1000-neo.dts | 68 &ssi {
192 pins_ssi: ssi {
193 function = "ssi";
194 groups = "ssi-dt-d", "ssi-dr-d", "ssi-clk-d", "ssi-ce0-d";
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| /linux/arch/arm/boot/dts/renesas/ |
| H A D | r8a7794.dtsi | 1031 <0 0xec541000 0 0x280>, /* SSI */
1033 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1049 clock-names = "ssi-all",
1050 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1051 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1052 "ssi.1", "ssi.0",
1066 reset-names = "ssi-all",
1067 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1068 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1069 "ssi.1", "ssi.0";
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| H A D | r8a7793.dtsi | 1064 <0 0xec541000 0 0x280>, /* SSI */
1066 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1082 clock-names = "ssi-all",
1083 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1084 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1085 "ssi.1", "ssi.0",
1098 reset-names = "ssi-all",
1099 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1100 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1101 "ssi.1", "ssi.0";
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| H A D | r8a7790.dtsi | 1266 <0 0xec541000 0 0x280>, /* SSI */
1268 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1286 clock-names = "ssi-all",
1287 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1288 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1289 "ssi.1", "ssi.0",
1304 reset-names = "ssi-all",
1305 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1306 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1307 "ssi.1", "ssi.0";
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r9a08g045.dtsi | 375 ssi0: ssi@100a8000 {
376 compatible = "renesas,r9a08g045-ssi",
377 "renesas,rz-ssi";
386 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
395 ssi1: ssi@100a8400 {
396 compatible = "renesas,r9a08g045-ssi",
397 "renesas,rz-ssi";
406 clock-names = "ssi", "ssi_sfr", "audio_clk1", "audio_clk2";
415 ssi2: ssi@100a8800 {
416 compatible = "renesas,r9a08g045-ssi",
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| H A D | r8a774c0.dtsi | 1350 <0 0xec541000 0 0x280>, /* SSI */
1352 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1371 clock-names = "ssi-all",
1372 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1373 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1374 "ssi.1", "ssi.0",
1389 reset-names = "ssi-all",
1390 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1391 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1392 "ssi.1", "ssi.0";
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| /linux/drivers/spi/ |
| H A D | spi-dw.h | 14 /* Synopsys DW SSI IP-core virtual IDs */
18 /* Synopsys DW SSI component versions (FourCC sequence) */
21 /* DW SSI IP-core ID and version check helpers */
36 /* Register offsets (Generic for both DWC APB SSI and DWC SSI IP-cores) */
65 /* Bit fields in CTRLR0 (DWC APB SSI) */
89 /* Bit fields in CTRLR0 (DWC SSI with AHB interface) */
154 u32 ip; /* Synopsys DW SSI IP-core ID */
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