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/freebsd/sys/contrib/device-tree/Bindings/misc/
H A Datmel-ssc.txt1 * Atmel SSC driver.
4 - compatible: "atmel,at91rm9200-ssc" or "atmel,at91sam9g45-ssc"
5 - atmel,at91rm9200-ssc: support pdc transfer
6 - atmel,at91sam9g45-ssc: support dma transfer
7 - reg: Should contain SSC registers location and length
8 - interrupts: Should contain SSC interrupt
14 Required properties for devices compatible with "atmel,at91sam9g45-ssc":
16 the memory interface and SSC DMA channel ID (for tx and rx).
22 - When SSC works in slave mode, according to the hardware design, the
28 - This property makes the SSC into an automatically registered DAI.
[all …]
/freebsd/sys/dev/isci/scil/
H A Dscu_bios_definitions.h230 * Spread Spectrum Clocking (SSC) setting for Tx:
394 * Spread Spectrum Clocking (SSC) settings for SATA and SAS.
395 * NOTE: Default SSC Modulation Frequency is 31.5KHz.
399 * Down-spreading SSC (only method allowed for SATA):
400 * SATA SSC Tx Disabled = 0x0
401 * SATA SSC Tx at +0 / -1419 PPM Spread = 0x2
402 * SATA SSC Tx at +0 / -2129 PPM Spread = 0x3
403 * SATA SSC Tx at +0 / -4257 PPM Spread = 0x6
404 * SATA SSC Tx at +0 / -4967 PPM Spread = 0x7
409 * SAS SSC Tx Disabled = 0x0
[all …]
/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dqcom,ssc-block-bus.yaml4 $id: http://devicetree.org/schemas/bus/qcom,ssc-block-bus.yaml#
7 title: The AHB Bus Providing a Global View of the SSC Block on (some) qcom SoCs
20 The SSC (Snapdragon Sensor Core) block contains a gpio controller, i2c/spi/uart
27 - const: qcom,msm8998-ssc-block-bus
28 - const: qcom,ssc-block-bus
74 SSC Branch Control Register reset (associated with the ssc_xo and
84 description: describes how to locate the ssc AXI halt register
88 - description: offset for the ssc AXI halt register
118 …// devices under this node are physically located in the SSC block, connected to an ssc-internal b…
124 compatible = "qcom,msm8998-ssc-block-bus", "qcom,ssc-block-bus";
/freebsd/sys/dev/usb/serial/
H A Dusb_serial.c265 ucom_attach(struct ucom_super_softc *ssc, struct ucom_softc *sc, in ucom_attach() argument
280 ssc->sc_unit = ucom_unit_alloc(); in ucom_attach()
281 if (ssc->sc_unit == -1) in ucom_attach()
285 snprintf(ssc->sc_ttyname, sizeof(ssc->sc_ttyname), in ucom_attach()
286 UCOM_TTY_PREFIX "%d", ssc->sc_unit); in ucom_attach()
289 error = usb_proc_create(&ssc->sc_tq, mtx, "ucom", USB_PRI_MED); in ucom_attach()
291 ucom_unit_free(ssc->sc_unit); in ucom_attach()
294 ssc->sc_subunits = subunits; in ucom_attach()
295 ssc->sc_flag = UCOM_FLAG_ATTACHED | in ucom_attach()
296 UCOM_FLAG_FREE_UNIT | (ssc->sc_flag & UCOM_FLAG_DEVICE_MODE); in ucom_attach()
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H A Dugensa.c193 struct ugensa_sub_softc *ssc; in ugensa_attach() local
213 ssc = sc->sc_sub + sc->sc_nports; in ugensa_attach()
214 ssc->sc_ucom_ptr = sc->sc_ucom + sc->sc_nports; in ugensa_attach()
221 &iface_index, ssc->sc_xfer, xfer_config, in ugensa_attach()
222 UGENSA_N_TRANSFER, ssc, &sc->sc_mtx); in ugensa_attach()
235 usbd_xfer_set_stall(ssc->sc_xfer[UGENSA_BULK_DT_WR]); in ugensa_attach()
236 usbd_xfer_set_stall(ssc->sc_xfer[UGENSA_BULK_DT_RD]); in ugensa_attach()
240 ssc->sc_ucom_ptr->sc_portno = sc->sc_nports; in ugensa_attach()
305 struct ugensa_sub_softc *ssc = usbd_xfer_softc(xfer); in ugensa_bulk_write_callback() local
314 if (ucom_get_data(ssc->sc_ucom_ptr, pc, 0, in ugensa_bulk_write_callback()
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/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dst,ssc-spi.yaml4 $id: http://devicetree.org/schemas/spi/st,ssc-spi.yaml#
7 title: STMicroelectronics SSC SPI Controller
10 The STMicroelectronics SSC SPI controller can be found on STi platforms
31 const: ssc
54 clock-names = "ssc";
H A Dspi-st-ssc.txt1 STMicroelectronics SSC (SPI) Controller
8 - clock-names : Must contain "ssc"
27 clock-names = "ssc";
H A Dspi-lantiq-ssc.txt1 Lantiq Synchronous Serial Controller (SSC) SPI master driver
10 For compatible "intel,lgm-ssc" - the common interrupt number for
/freebsd/sys/contrib/device-tree/Bindings/clock/ti/
H A Ddpll.txt45 "ssc-deltam" - DPLL supports spread spectrum clocking (SSC), contains
47 "ssc-modfreq" - DPLL supports spread spectrum clocking (SSC), contains
61 - ti,ssc-deltam : DPLL supports spread spectrum clocking, frequency
63 - ti,ssc-modfreq-hz : DPLL supports spread spectrum clocking, spread
65 - ti,ssc-downspread : DPLL supports spread spectrum clocking, boolean
/freebsd/sys/dev/ath/ath_rate/sample/
H A Dsample.c414 pick_sample_rate(struct sample_softc *ssc , struct ath_node *an, in pick_sample_rate() argument
474 if (sn->stats[size_bin][rix].successive_failures > ssc->max_successive_failures && in pick_sample_rate()
475 ticks - sn->stats[size_bin][rix].last_tx < ssc->stale_failure_timeout) { in pick_sample_rate()
668 struct sample_softc *ssc = ATH_SOFTC_SAMPLE(sc); in ath_rate_findrate() local
749 (sn->packets_since_sample[size_bin]*ssc->sample_rate/100)) { in ath_rate_findrate()
750 rix = pick_sample_rate(ssc, an, rt, size_bin); in ath_rate_findrate()
784 } else if (ticks - ssc->min_switch > sn->ticks_since_switch[size_bin]) { in ath_rate_findrate()
789 __func__, ticks - ssc->min_switch, sn->ticks_since_switch[size_bin]); in ath_rate_findrate()
969 struct sample_softc *ssc = ATH_SOFTC_SAMPLE(sc); in update_stats() local
1009 if (sn->stats[size_bin][rix0].total_packets < ssc->smoothing_minpackets) { in update_stats()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-st.txt1 ST SSC binding, for I2C mode operation
4 - compatible : Must be "st,comms-ssc-i2c" or "st,comms-ssc4-i2c"
7 - clock-names: Must contain "ssc".
35 clock-names = "ssc";
H A Dst,sti-i2c.yaml18 - st,comms-ssc-i2c
65 clock-names = "ssc";
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Drenesas,usb3-phy.yaml33 # If you want to use the ssc, the clock-frequency of usb_extal
51 renesas,ssc-range:
53 Enable/disable spread spectrum clock (ssc). 0 or the property doesn't
54 exist means disabling the ssc. The actual value will be -<value> ppm.
H A Dphy-rockchip-naneng-combphy.yaml43 rockchip,enable-ssc:
46 The option SSC can be enabled for U3, SATA and PCIE.
47 Most commercially available platforms use SSC to reduce EMI.
60 differential clock output(optional with SSC) for system applications.
H A Dbrcm-sata-phy.txt28 - brcm,enable-ssc: use spread spectrum clocking (SSC) on this port
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Datmel-at91sam9g20ek-wm8731-audio.txt7 - atmel,ssc-controller: The phandle of the SSC controller
24 atmel,ssc-controller = <&ssc0>;
H A Datmel-sam9x5-wm8731-audio.txt6 - atmel,ssc-controller: The phandle of the SSC controller
33 atmel,ssc-controller = <&ssc0>;
H A Datmel-wm8904.txt31 - atmel,ssc-controller: The phandle of the SSC controller
53 atmel,ssc-controller = <&ssc0>;
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstih407-family.dtsi367 clock-names = "ssc";
382 clock-names = "ssc";
397 clock-names = "ssc";
412 clock-names = "ssc";
427 clock-names = "ssc";
442 clock-names = "ssc";
459 clock-names = "ssc";
474 clock-names = "ssc";
489 clock-names = "ssc";
503 clock-names = "ssc";
[all...]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dmediatek,mt8186-fhctl.yaml15 Spread spectrum clocking (SSC) is another function provided by this hardware.
34 mediatek,hopping-ssc-percent:
57 mediatek,hopping-ssc-percent = <3>;
H A Dti,cdce925.yaml13 Flexible Low Power LVCMOS Clock Generator with SSC Support for EMI Reduction
65 description: SSC mode as defined in the data sheet
97 /* PLL options to get SSC 1% centered */
H A Dti,cdce925.txt32 - spread-spectrum: SSC mode as defined in the data sheet.
48 /* PLL options to get SSC 1% centered */
/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dat91sam9g20.dtsi36 ssc0: ssc@fffbc000 {
37 compatible = "atmel,at91sam9rl-ssc";
H A Dmpa1600.dts51 ssc0: ssc@fffd0000 {
55 ssc1: ssc@fffd4000 {
/freebsd/sys/arm64/rockchip/
H A Drk3568_combphy.c206 /* Set SSC downward spread spectrum */ in rk3568_combphy_enable()
225 /* Set SSC downward spread spectrum */ in rk3568_combphy_enable()
282 /* SSC control period */ in rk3568_combphy_enable()
318 /* Set SSC downward spread spectrum */ in rk3568_combphy_enable()
333 if (OF_hasprop(sc->node, "rockchip,enable-ssc")) { in rk3568_combphy_enable()
334 device_printf(dev, "setting rockchip,enable-ssc\n"); in rk3568_combphy_enable()

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