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/linux/Documentation/PCI/
H A Dpci-iov-howto.rst1 .. SPDX-License-Identifier: GPL-2.0
9 :Authors: - Yu Zhao <yu.zhao@intel.com>
10 - Donald Dutile <ddutile@redhat.com>
15 What is SR-IOV
16 --------------
18 Single Root I/O Virtualization (SR-IOV) is a PCI Express Extended
34 How can I enable SR-IOV capability
35 ----------------------------------
37 Multiple methods are available for SR-IOV enablement.
39 enabling and disabling of the capability via API provided by SR-IOV core.
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/linux/arch/powerpc/platforms/powernv/
H A Dpci-sriov.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 * The majority of the complexity in supporting SR-IOV on PowerNV comes from
20 * the address range that we want to map to be power-of-two sized and aligned.
24 * For a SR-IOV BAR things are a little more awkward since size and alignment
25 * are not coupled. The alignment is set based on the per-VF BAR size, but
26 * the total BAR area is: number-of-vfs * per-vf-size. The number of VFs
29 * allocate the SR-IOV BARs in a way that lets us map them using the MBT.
32 * of MBT entry that we use. We only support SR-IOV on PHB3 (IODA2) and above,
40 * b) An un-segmented BAR that maps the whole address range to a specific PE.
43 * We prefer to use mode a) since it only requires one MBT entry per SR-IOV BAR
[all …]
/linux/drivers/crypto/cavium/nitrox/
H A Dnitrox_sriov.c1 // SPDX-License-Identifier: GPL-2.0
12 * num_vfs_valid - validate VF count
83 /* PF has no queues in SR-IOV mode */ in nitrox_pf_cleanup()
84 atomic_set(&ndev->state, __NDEV_NOT_READY); in nitrox_pf_cleanup()
94 * nitrox_pf_reinit - re-initialize PF resources once SR-IOV is disabled
120 atomic_set(&ndev->state, __NDEV_READY); in nitrox_pf_reinit()
128 /* unregister interrupts for PF in SR-IOV */ in nitrox_sriov_cleanup()
137 /* register interrupts for PF in SR-IOV */ in nitrox_sriov_init()
160 return -EINVAL; in nitrox_sriov_enable()
173 ndev->mode = num_vfs_to_mode(num_vfs); in nitrox_sriov_enable()
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H A Dnitrox_dev.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/dma-mapping.h>
19 * struct nitrox_cmdq - NITROX command queue
68 * struct nitrox_hw - NITROX hardware information
69 * @partname: partname ex: CNN55xxx-xxx
120 * mbox_msg - Mailbox message data
149 * nitrox_vfdev - NITROX VF device instance in PF
167 * struct nitrox_iov - SR-IOV information
172 * @msix: MSI-X entry for PF in SR-IOV case
207 #define DEV(ndev) ((struct device *)(&(ndev)->pdev->dev))
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/linux/drivers/gpu/drm/xe/
H A Dxe_sriov_types.h1 /* SPDX-License-Identifier: MIT */
12 * VFID - Virtual Function Identifier
18 * Note: According to PCI spec, SR-IOV VF's numbers are 1-based (VF1, VF2, ...).
24 * enum xe_sriov_mode - SR-IOV mode
25 * @XE_SRIOV_MODE_NONE: bare-metal mode (non-virtualized)
26 * @XE_SRIOV_MODE_PF: SR-IOV Physical Function (PF) mode
27 * @XE_SRIOV_MODE_VF: SR-IOV Virtual Function (VF) mode
32 * attempt of checking the SR-IOV mode prior to the actual mode probe.
H A Dxe_sriov_pf.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2023-2024 Intel Corporation
27 struct device *dev = xe->drm.dev; in pf_reduce_totalvfs()
46 * xe_sriov_pf_readiness - Check if PF functionality can be enabled.
49 * This function is called as part of the SR-IOV probe to validate if all
56 struct device *dev = xe->drm.dev; in xe_sriov_pf_readiness()
74 xe->sriov.pf.device_total_vfs = totalvfs; in xe_sriov_pf_readiness()
75 xe->sriov.pf.driver_max_vfs = newlimit; in xe_sriov_pf_readiness()
81 * xe_sriov_pf_init_early - Initialize SR-IOV PF specific data.
92 xe->sriov.pf.vfs = drmm_kcalloc(&xe->drm, 1 + xe_sriov_pf_get_totalvfs(xe), in xe_sriov_pf_init_early()
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H A Dxe_sriov_pf_service.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2023-2025 Intel Corporation
17 * xe_sriov_pf_service_init - Early initialization of the SR-IOV PF service.
20 * Performs early initialization of the SR-IOV PF service.
32 xe->sriov.pf.service.version.base.major = GUC_RELAY_VERSION_BASE_MAJOR; in xe_sriov_pf_service_init()
33 xe->sriov.pf.service.version.base.minor = GUC_RELAY_VERSION_BASE_MINOR; in xe_sriov_pf_service_init()
36 xe->sriov.pf.service.version.latest.major = GUC_RELAY_VERSION_LATEST_MAJOR; in xe_sriov_pf_service_init()
37 xe->sriov.pf.service.version.latest.minor = GUC_RELAY_VERSION_LATEST_MINOR; in xe_sriov_pf_service_init()
45 struct xe_sriov_pf_service_version base = xe->sriov.pf.service.version.base; in pf_negotiate_version()
46 struct xe_sriov_pf_service_version latest = xe->sriov.pf.service.version.latest; in pf_negotiate_version()
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H A Dxe_gt_sriov_pf_service.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2023-2024 Intel Corporation
125 regs = ERR_PTR(-ENOPKG); in pick_runtime_regs()
140 xe_gt_assert(gt, !gt->sriov.pf.service.runtime.size); in pf_alloc_runtime_info()
141 xe_gt_assert(gt, !gt->sriov.pf.service.runtime.regs); in pf_alloc_runtime_info()
142 xe_gt_assert(gt, !gt->sriov.pf.service.runtime.values); in pf_alloc_runtime_info()
151 values = drmm_kcalloc(&xe->drm, size, sizeof(u32), GFP_KERNEL); in pf_alloc_runtime_info()
153 return -ENOMEM; in pf_alloc_runtime_info()
155 gt->sriov.pf.service.runtime.size = size; in pf_alloc_runtime_info()
156 gt->sriov.pf.service.runtime.regs = regs; in pf_alloc_runtime_info()
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/linux/drivers/pci/
H A Diov.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCI Express I/O Virtualization (IOV) support
4 * Single Root IOV 1.0
22 #define VIRTFN_ID_LEN 17 /* "virtfn%u\0" for 2^32 - 1 */
26 if (!dev->is_physfn) in pci_iov_virtfn_bus()
27 return -EINVAL; in pci_iov_virtfn_bus()
28 return dev->bus->number + ((dev->devfn + dev->sriov->offset + in pci_iov_virtfn_bus()
29 dev->sriov->stride * vf_id) >> 8); in pci_iov_virtfn_bus()
34 if (!dev->is_physfn) in pci_iov_virtfn_devfn()
35 return -EINVAL; in pci_iov_virtfn_devfn()
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H A Dpci-pf-stub.c1 // SPDX-License-Identifier: GPL-2.0
2 /* pci-pf-stub - simple stub driver for PCI SR-IOV PF device
5 * SR-IOV functionality while at the same time not actually needing a
13 * pci_pf_stub_whitelist - White list of devices to bind pci-pf-stub onto
17 * are adding support for SR-IOV here since there are no other drivers
30 pci_info(dev, "claimed by pci-pf-stub\n"); in pci_pf_stub_probe()
35 .name = "pci-pf-stub",
42 MODULE_DESCRIPTION("SR-IOV PF stub driver with no functionality");
/linux/Documentation/arch/powerpc/
H A Dpci_iov_resource_on_powernv.rst57 - For DMA we then provide an entire address space for each PE that can
63 - For MSIs, we have two windows in the address space (one at the top of
64 the 32-bit space and one much higher) which, via a combination of the
70 - Error messages just use the RTT.
81 - The M32 window:
87 32-bit PCIe accesses. We configure that window at boot from FW and
101 SR-IOV). We basically use the trick of forcing the bridge MMIO windows
110 - The M64 windows:
127 for large BARs in 64-bit space:
139 - We do the PE# allocation *after* the 64-bit space has been assigned
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/linux/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_iov.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
12 struct fm10k_intfc *interface = hw->back; in fm10k_iov_msg_error()
13 struct pci_dev *pdev = interface->pdev; in fm10k_iov_msg_error()
15 dev_err(&pdev->dev, "Unknown message ID %u on VF %d\n", in fm10k_iov_msg_error()
16 **results & FM10K_TLV_ID_MASK, vf_info->vf_idx); in fm10k_iov_msg_error()
22 * fm10k_iov_msg_queue_mac_vlan - Message handler for MAC/VLAN request from VF
37 struct fm10k_intfc *interface = hw->back; in fm10k_iov_msg_queue_mac_vlan()
60 /* if the length field has been set, this is a multi-bit in fm10k_iov_msg_queue_mac_vlan()
61 * update request. For multi-bit requests, simply disallow in fm10k_iov_msg_queue_mac_vlan()
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/linux/Documentation/translations/zh_CN/PCI/
H A Dpci-iov-howto.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/PCI/pci-iov-howto.rst
15 .. _cn_pci-iov-howto:
22 :作者: - Yu Zhao <yu.zhao@intel.com>
23 - Donald Dutile <ddutile@redhat.com>
28 什么是SR-IOV
29 ------------
31 单根I/O虚拟化（SR-IOV）是一种PCI Express扩展功能，它使一个物理设备显示为多个
42 我怎样才能启用SR-IOV功能
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/linux/Documentation/networking/
H A Dsriov.rst1 .. SPDX-License-Identifier: GPL-2.0
4 NIC SR-IOV APIs
8 model (see :ref:`switchdev`) to configure forwarding and security of SR-IOV
14 The old SR-IOV API is implemented in ``rtnetlink`` Netlink family as part of
23 - ``ndo_get_vf_port``
24 - ``ndo_set_vf_port``
25 - ``ndo_set_vf_rss_query_en``
/linux/io_uring/
H A Dnet.c1 // SPDX-License-Identifier: GPL-2.0
79 /* per-invocation mshot limit */
89 * The UAPI flags are the lower 8 bits, as that's all sqe->ioprio will hold
128 if (unlikely(sqe->off || sqe->addr || sqe->rw_flags || in io_shutdown_prep()
129 sqe->buf_index || sqe->splice_fd_i in io_shutdown_prep()
205 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_mshot_prep_retry() local
217 struct iovec *iov; io_net_import_vec() local
245 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_compat_msg_copy_hdr() local
295 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_msg_copy_hdr() local
353 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_send_setup() local
394 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_sendmsg_setup() local
420 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_sendmsg_prep() local
468 struct iovec *iov; io_bundle_nbufs() local
510 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_send_finish() local
542 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_sendmsg() local
592 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_send_select_buffer() local
640 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_send() local
749 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_recvmsg_prep_setup() local
780 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_recvmsg_prep() local
853 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_recv_finish() local
933 io_recvmsg_prep_multishot(struct io_async_msghdr * kmsg,struct io_sr_msg * sr,void __user ** buf,size_t * len) io_recvmsg_prep_multishot() argument
1018 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_recvmsg() local
1106 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_recv_buf_select() local
1178 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_recv() local
1453 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_send_zc_import() local
1535 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_sendmsg_zc() local
1605 struct io_sr_msg *sr = io_kiocb_to_cmd(req, struct io_sr_msg); io_sendrecv_fail() local
[all...]
/linux/drivers/net/ethernet/intel/ice/
H A Dice_irq.h1 /* SPDX-License-Identifier: GPL-2.0 */
21 /* First MSIX vector used by SR-IOV VFs. Calculated by subtracting the
22 * number of MSIX vectors needed for all SR-IOV VFs from the number of
/linux/Documentation/networking/device_drivers/ethernet/microsoft/
H A Dnetvsc.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Hyper-V network driver
17 ----------------
19 Hyper-V host version does. Windows Server 2016 and Azure
24 --------------------
25 Hyper-V supports receive side scaling. For TCP & UDP, packets can
41 ethtool -N eth0 rx-flow-hash udp4 sdfn
45 ethtool -N eth0 rx-flow-hash udp4 sd
49 ethtool -n eth0 rx-flow-hash udp4
52 --------------------------------
[all …]
/linux/Documentation/arch/x86/
H A Dsva.rst1 .. SPDX-License-Identifier: GPL-2.0
19 application page-faults. For more information please refer to the PCIe
34 Unlike Single Root I/O Virtualization (SR-IOV), Scalable IOV (SIOV) permits
40 ID (PASID), which is a 20-bit number defined by the PCIe SIG.
43 IOMMU to track I/O on a per-PASID granularity in addition to using the PCIe
55 ENQCMD works with non-posted semantics and carries a status back if the
67 A new thread-scoped MSR (IA32_PASID) provides the connection between
69 accesses an SVA-capable device, this MSR is initialized with a newly
70 allocated PASID. The driver for the device calls an IOMMU-specific API
71 that sets up the routing for DMA and page-requests.
[all …]
/linux/drivers/net/ethernet/qlogic/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
38 bool "QLOGIC QLCNIC 83XX family SR-IOV Support"
90 bool "QLogic QED 25/40/100Gb SR-IOV support"
/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_lib.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2024 Intel Corporation. */
9 * ixgbe_cache_ring_dcb_sriov - Descriptor ring to register mapping for SR-IOV
12 * Cache the descriptor ring offsets for SR-IOV to the assigned rings. It
20 struct ixgbe_ring_feature *fcoe = &adapter->ring_feature[RING_F_FCOE]; in ixgbe_cache_ring_dcb_sriov()
22 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; in ixgbe_cache_ring_dcb_sriov()
25 u8 tcs = adapter->hw_tcs; in ixgbe_cache_ring_dcb_sriov()
32 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) in ixgbe_cache_ring_dcb_sriov()
35 /* start at VMDq register offset for SR-IOV enabled setups */ in ixgbe_cache_ring_dcb_sriov()
36 reg_idx = vmdq->offset * __ALIGN_MASK(1, ~vmdq->mask); in ixgbe_cache_ring_dcb_sriov()
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-pci4 Contact: linux-pci@vger.kernel.org
15 (Note: kernels before 2.6.28 may require echo -n).
20 Contact: linux-pci@vger.kernel.org
31 (Note: kernels before 2.6.28 may require echo -n).
36 Contact: linux-pci@vger.kernel.org
55 Contact: Chris Wright <chrisw@sous-sol.org>
72 Contact: Linux PCI developers <linux-pci@vger.kernel.org>
74 Writing a non-zero value to this attribute will
76 re-discover previously removed devices.
80 Contact: Linux PCI developers <linux-pci@vger.kernel.org>
[all …]
/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Dfm10k.rst1 .. SPDX-License-Identifier: GPL-2.0+
4 Linux Base Driver for Intel(R) Ethernet Multi-host Controller
8 Copyright(c) 2015-2018 Intel Corporation.
12 - Identifying Your Adapter
13 - Additional Configurations
14 - Performance Tuning
15 - Known Issues
16 - Support
21 Ethernet Multi-host Controller.
29 ------------
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H A Digbvf.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
12 - Identifying Your Adapter
13 - Additional Configurations
14 - Support
16 This driver supports Intel 82576-based virtual function devices-based virtual
17 function devices that can only be activated on kernels that support SR-IOV.
19 SR-IOV requires the correct platform and OS support.
21 The guest OS loading this driver must support MSI-X interrupts.
45 -------
[all …]
H A Dixgbevf.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
13 - Identifying Your Adapter
14 - Known Issues
15 - Support
17 This driver supports 82599, X540, X550, and X552-based virtual function devices
18 that can only be activated on kernels that support SR-IOV.
44 SR-IOV requires the correct platform and OS support.
46 The guest OS loading this driver must support MSI-X interrupts.
62 to intel-wired-lan@lists.osuosl.org.
H A Dixgbe.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
13 - Identifying Your Adapter
14 - Command Line Parameters
15 - Additional Configurations
16 - Known Issues
17 - Support
36 ----------------------------------
38 82599-BASED ADAPTERS
41 - If your 82599-based Intel(R) Network Adapter came with Intel optics or is an
[all …]

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