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Searched full:spllc (Results 1 – 2 of 2) sorted by relevance

/linux/Documentation/devicetree/bindings/phy/
H A Dmediatek,tphy.yaml22 shared 0x0000 SPLLC
42 u3 port0 0x0700 SPLLC
51 u3 port1 0x1700 SPLLC
60 SPLLC shared by u3 ports and FMREG shared by u2 ports on V1 are put back
/linux/drivers/phy/mediatek/
H A Dphy-mtk-tphy.c304 void __iomem *spllc; member
794 mtk_phy_set_bits(u3_banks->spllc + U3P_SPLLC_XTALCTL3, in u3_phy_instance_init()
1101 u3_banks->spllc = tphy->sif_base + SSUSB_SIFSLV_V1_SPLLC; in phy_v1_banks_init()
1129 u3_banks->spllc = instance->port_base + SSUSB_SIFSLV_V2_SPLLC; in phy_v2_banks_init()