Searched full:smmuv2 (Results 1 – 2 of 2) sorted by relevance
191 For SMMUv2 implementations, there must be exactly one interrupt per
796 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */800 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */