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/linux/crypto/
H A Dsha256.c3 * Crypto API support for SHA-224, SHA-256, HMAC-SHA224, and HMAC-SHA256
8 * SHA224 Support Copyright 2007 Intel Corporation <jonathan.lynch@intel.com>
100 sha224(data, len, out); in crypto_sha224_digest()
182 /* HMAC-SHA224 */
320 .base.cra_name = "sha224",
321 .base.cra_driver_name = "sha224-lib",
356 .base.cra_name = "hmac(sha224)",
357 .base.cra_driver_name = "hmac-sha224-lib",
410 MODULE_DESCRIPTION("Crypto API support for SHA-224, SHA-256, HMAC-SHA224, and HMAC-SHA256");
412 MODULE_ALIAS_CRYPTO("sha224");
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/linux/drivers/crypto/intel/keembay/
H A DKconfig81 bool "Enable sha224 and hmac(sha224) support in Intel Keem Bay OCS HCU"
84 Enables support for sha224 and hmac(sha224) algorithms in the Intel
88 Provides OCS HCU hardware acceleration of sha224 and hmac(224).
H A Dkeembay-ocs-hcu-core.c784 alg_name = "sha224-keembay-ocs"; in kmb_ocs_hcu_setkey()
903 .cra_name = "sha224",
904 .cra_driver_name = "sha224-keembay-ocs",
929 .cra_name = "hmac(sha224)",
930 .cra_driver_name = "hmac-sha224-keembay-ocs",
/linux/include/crypto/
H A Dsha2.h135 * HMAC key and message context structs, shared by HMAC-SHA224 and HMAC-SHA256.
162 * If you don't need incremental computation, consider sha224() instead.
196 * sha224() - Compute SHA-224 message digest in one shot
203 void sha224(const u8 *data, size_t len, u8 out[at_least SHA224_DIGEST_SIZE]);
206 * struct hmac_sha224_key - Prepared key for HMAC-SHA224
214 * struct hmac_sha224_ctx - Context for computing HMAC-SHA224 of a message
222 * hmac_sha224_preparekey() - Prepare a key for HMAC-SHA224
224 * @raw_key: the raw HMAC-SHA224 key
236 * hmac_sha224_init() - Initialize an HMAC-SHA224 context for a new message
251 * hmac_sha224_init_usingrawkey() - Initialize an HMAC-SHA224 context for a new
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/linux/Documentation/devicetree/bindings/crypto/
H A Dnvidia,tegra234-se-hash.yaml11 SHA1, SHA224, SHA256, SHA384, SHA512, SHA3-224, SHA3-256, SHA3-384, SHA3-512
12 HMAC(SHA224), HMAC(SHA256), HMAC(SHA384), HMAC(SHA512)
/linux/drivers/crypto/caam/
H A Dkey_gen.h12 * SHA224, SHA384, SHA512.
30 * SHA224, SHA384, SHA512.
H A Dcaamhash_desc.c18 * Valid algorithm values - one of OP_ALG_ALGSEL_{MD5, SHA1, SHA224,
H A Dcaamalg_desc.c52 * OP_ALG_ALGSEL_{MD5, SHA1, SHA224, SHA256, SHA384, SHA512} ANDed
131 * OP_ALG_ALGSEL_{MD5, SHA1, SHA224, SHA256, SHA384, SHA512} ANDed
279 * OP_ALG_ALGSEL_{MD5, SHA1, SHA224, SHA256, SHA384, SHA512} ANDed
373 * OP_ALG_ALGSEL_{MD5, SHA1, SHA224, SHA256, SHA384, SHA512} ANDed
491 * OP_ALG_ALGSEL_{MD5, SHA1, SHA224, SHA256, SHA384, SHA512} ANDed
H A Ddesc_constr.h565 * Valid algorithm values - one of OP_ALG_ALGSEL_{MD5, SHA1, SHA224,
/linux/drivers/crypto/ccree/
H A Dcc_hash.h87 * @mode: The Hash mode. Supported modes: MD5/SHA1/SHA224/SHA256/SHA384/SHA512
99 * @mode: The Hash mode. Supported modes: MD5/SHA1/SHA224/SHA256/SHA384/SHA512
/linux/tools/testing/selftests/arm64/fp/
H A Dkernel-test.c50 "sha224-arm64",
51 "sha224-arm64-neon",
52 "sha224-ce",
/linux/lib/crypto/sparc/
H A Dsha256.h8 * SHA224 Support Copyright 2007 Intel Corporation <jonathan.lynch@intel.com>
/linux/drivers/crypto/
H A Dtalitos.c2145 * on h/w without explicit sha224 support, we initialize h/w context
2146 * manually with sha224 constants, and tell it to run sha256.
2439 .cra_name = "authenc(hmac(sha224),cbc(aes))",
2440 .cra_driver_name = "authenc-hmac-sha224-"
2461 .cra_name = "authenc(hmac(sha224),cbc(aes))",
2462 .cra_driver_name = "authenc-hmac-sha224-"
2482 .cra_name = "authenc(hmac(sha224),"
2484 .cra_driver_name = "authenc-hmac-sha224-"
2507 .cra_name = "authenc(hmac(sha224),"
2509 .cra_driver_name = "authenc-hmac-sha224-"
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H A Dimg-hash.c700 return img_hash_cra_init(tfm, "sha224-lib"); in img_hash_cra_sha224_init()
812 .cra_name = "sha224",
813 .cra_driver_name = "img-sha224",
1001 dev_info(dev, "Img MD5/SHA1/SHA224/SHA256 Hardware accelerator initialized\n"); in img_hash_probe()
H A Datmel-sha.c346 * multiple of 512 bits (SHA1/SHA224/SHA256) or 1024 bits (SHA384/SHA512).
348 * "padlen-1" zero bits. Then a 64 bits block (SHA1/SHA224/SHA256) or
352 * For SHA1/SHA224/SHA256, padlen is calculated as followed:
1284 .halg.base.cra_name = "sha224",
1285 .halg.base.cra_driver_name = "atmel-sha224",
2063 .halg.base.cra_name = "hmac(sha224)",
2064 .halg.base.cra_driver_name = "atmel-hmac-sha224",
2173 name = "atmel-hmac-sha224"; in atmel_sha_authenc_spawn()
2642 sha_dd->caps.has_sha224 ? "/SHA224" : "", in atmel_sha_probe()
/linux/lib/crypto/
H A Dhash_info.c19 [HASH_ALGO_SHA224] = "sha224",
H A DKconfig249 The SHA-224, SHA-256, HMAC-SHA224, and HMAC-SHA256 library functions.
/linux/lib/crypto/mips/
H A Dsha256.h12 * SHA224 Support Copyright 2007 Intel Corporation <jonathan.lynch@intel.com>
/linux/Documentation/crypto/
H A Dlibcrypto-hash.rst74 corresponding HMACs: HMAC-SHA224, HMAC-SHA256, HMAC-SHA384, and HMAC-SHA512.
/linux/drivers/crypto/tegra/
H A Dtegra-se-hash.c789 .cra_name = "sha224",
790 .cra_driver_name = "tegra-se-sha224",
977 .alg_base = "sha224",
991 .cra_name = "hmac(sha224)",
992 .cra_driver_name = "tegra-se-hmac-sha224",
/linux/drivers/crypto/allwinner/sun8i-ss/
H A Dsun8i-ss-hash.c8 * This file add support for MD5 and SHA1/SHA224/SHA256.
373 * since SS support only MD5,sha1,sha224 and sha256, blocksize in sun8i_ss_hash_need_fallback()
453 /* sha1 sha224 sha256 */ in hash_pad()
/linux/crypto/asymmetric_keys/
H A Dx509_cert_parser.c206 ctx->cert->sig->hash_algo = "sha224"; in x509_note_sig_algo()
226 ctx->cert->sig->hash_algo = "sha224"; in x509_note_sig_algo()
H A Dpkcs7_parser.c257 ctx->sinfo->sig->hash_algo = "sha224"; in pkcs7_sig_note_digest_algo()
/linux/drivers/crypto/inside-secure/
H A Dsafexcel_hash.c1334 .cra_name = "sha224",
1335 .cra_driver_name = "safexcel-sha224",
1353 return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha224", in safexcel_hmac_sha224_setkey()
1406 .cra_name = "hmac(sha224)",
1407 .cra_driver_name = "safexcel-hmac-sha224",
/linux/lib/crypto/tests/
H A Dsha224-testvecs.h2 /* This file was generated by: ./scripts/crypto/gen-hash-testvecs.py sha224 */

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