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Searched full:sgis (Results 1 – 14 of 14) sorted by relevance

/linux/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c138 /* Not a GICv4.1? No HW SGIs */ in vgic_mmio_write_v3_misc()
148 /* Switching HW SGIs? */ in vgic_mmio_write_v3_misc()
207 /* Not a GICv4.1? No HW SGIs */ in vgic_mmio_uaccess_write_v3_misc()
601 * The GICv3 per-IRQ registers are split to control PPIs and SGIs in the
1061 * An access targeting Group0 SGIs can only generate in vgic_v3_queue_sgi()
1062 * those, while an access targeting Group1 SGIs can in vgic_v3_queue_sgi()
1089 * @allow_group1: Does the sysreg access allow generation of G1 SGIs
1091 * With GICv3 (and ARE=1) CPUs trigger SGIs by writing to a system register.
H A Dvgic.c124 /* SGIs and PPIs */ in vgic_get_vcpu_irq()
728 /* SGIs and LPIs cannot be wired up to any device */ in kvm_vgic_set_owner()
989 * - Virtual SGIs directly injected via GICv4.1 must not affect EOIcount, as
991 * set vSGIEOICount when no SGIs are in the ap_list.
993 * - GICv2 SGIs with multiple sources are injected one source at a time, as
H A Dvgic-init.c107 * as the per-vCPU arrays of private IRQs (SGIs, PPIs). in kvm_vgic_create()
286 /* SGIs */ in vgic_allocate_private_irq()
353 * Enable and configure all SGIs to be edge-triggered and in vgic_allocate_private_irqs_locked()
/linux/drivers/irqchip/
H A Dirq-hip04.c122 /* Interrupt configuration for SGIs can't be changed */ in hip04_irq_set_type()
329 /* Get the interrupt number and add 16 to skip over SGIs */ in hip04_irq_domain_xlate()
H A Dirq-gic-common.c110 * Deactivate and disable all SPIs. Leave the PPI and SGIs in gic_dist_config()
H A Dirq-alpine-msi.c36 u32 num_spis; /* The number of SGIs for MSIs */
H A Dirq-gic.c297 /* Interrupt configuration for SGIs can't be changed */ in gic_set_type()
365 * works because we don't nest SGIs... in gic_handle_irq()
1000 * Now let's migrate and clear any potential SGIs that might be in gic_migrate_target()
1007 * for previously sent SGIs by us to other CPUs either. in gic_migrate_target()
H A Dirq-gic-v3-its.c4377 * There is no notion of affinity for virtual SGIs, at least in its_sgi_set_affinity()
4494 /* Yes, we do want 16 SGIs */ in its_sgi_irq_domain_alloc()
/linux/Documentation/virt/kvm/devices/
H A Darm-vgic-v3.rst140 GICD_TYPER2.nASSGIcap allows userspace to control the support of SGIs
348 SGIs and any interrupt with a higher ID than the number of interrupts
/linux/tools/testing/selftests/kvm/lib/arm64/
H A Dvgic.c137 "doesn't allow injecting SGIs. There's no mask for it."); in _kvm_arm_irq_line()
H A Dgic_v3.c336 /* Set a default priority for all the SGIs and PPIs */ in gicv3_cpu_init()
/linux/tools/testing/selftests/kvm/arm64/
H A Dvgic_irq.c559 * The kernel silently fails for invalid SPIs and SGIs (which in kvm_irq_set_level_info_check()
612 * either trying to inject SGIs when we configured the test to be in kvm_irq_write_ispendr_check()
861 /* Configure all SGIs with decreasing priority */ in guest_code_group_en()
/linux/drivers/soc/xilinx/
H A Dxlnx_event_manager.c587 /* Find GIC controller to map SGIs. */ in xlnx_event_init_sgi()
/linux/arch/arm64/kvm/
H A Dsys_regs.c616 * Group0 SGIs only, while ICC_SGI1R_EL1 can generate either group, in access_gic_sgi()