Searched full:sdhc (Results 1 – 25 of 89) sorted by relevance
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/linux/Documentation/devicetree/bindings/mmc/ |
H A D | amlogic,meson-mx-sdhc.yaml | 4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdhc.yaml# 7 title: Amlogic Meson SDHC controller 16 The SDHC MMC host controller on Amlogic SoCs provides an eMMC and MMC 24 - amlogic,meson8-sdhc 25 - amlogic,meson8b-sdhc 26 - amlogic,meson8m2-sdhc 27 - const: amlogic,meson-mx-sdhc 60 sdhc: mmc@8e00 { 61 compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc";
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H A D | vt8500-sdmmc.txt | 7 - compatible: Should be "wm,wm8505-sdhc". 15 sdhc@d800a000 { 16 compatible = "wm,wm8505-sdhc"; 19 clocks = <&sdhc>;
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/linux/drivers/mmc/host/ |
H A D | sdhci-xenon.h | 11 /* Register Offset of Xenon SDHC self-defined register */ 66 /* idx of SDHC */ 84 * record the current ios setting of Xenon SDHC.
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H A D | Makefile | 66 meson-mx-sdhc-objs := meson-mx-sdhc-clkc.o meson-mx-sdhc-mmc.o 67 obj-$(CONFIG_MMC_MESON_MX_SDHC) += meson-mx-sdhc.o
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H A D | meson-mx-sdhc-clkc.c | 3 * Amlogic Meson SDHC clock controller 13 #include "meson-mx-sdhc.h"
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H A D | sdhci-xenon-phy.c | 3 * PHY support for Xenon SDHC 449 /* Disable both SDHC Data Strobe and Enhanced Strobe */ in xenon_emmc_phy_disable_strobe() 483 /* Enable SDHC Data Strobe */ in xenon_emmc_phy_strobe_delay_adj() 487 * Enable SDHC Enhanced Strobe if supported in xenon_emmc_phy_strobe_delay_adj() 824 * and adjust Xenon SDHC delay. in xenon_phy_adj()
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/linux/arch/arm/boot/dts/amlogic/ |
H A D | meson8m2.dtsi | 87 &sdhc { 88 compatible = "amlogic,meson8m2-sdhc", "amlogic,meson-mx-sdhc";
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/linux/arch/powerpc/boot/dts/fsl/ |
H A D | qoriq-esdhc-0.dtsi | 35 sdhc: sdhc@114000 { label
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H A D | t102xsi-pre.dtsi | 59 sdhc = &sdhc;
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H A D | b4420si-pre.dtsi | 57 sdhc = &sdhc;
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H A D | b4860si-pre.dtsi | 57 sdhc = &sdhc;
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H A D | p5020si-pre.dtsi | 61 sdhc = &sdhc;
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H A D | t208xsi-pre.dtsi | 74 sdhc = &sdhc;
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H A D | t104xsi-pre.dtsi | 58 sdhc = &sdhc;
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H A D | p3041si-pre.dtsi | 61 sdhc = &sdhc;
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H A D | p2041si-pre.dtsi | 60 sdhc = &sdhc;
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H A D | p5040si-pre.dtsi | 60 sdhc = &sdhc;
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H A D | p4080si-pre.dtsi | 60 sdhc = &sdhc;
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H A D | t4240si-pre.dtsi | 64 sdhc = &sdhc;
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/linux/arch/arm/boot/dts/vt8500/ |
H A D | wm8650.dtsi | 164 clksdhc: sdhc { 194 sdhc@d800a000 { 195 compatible = "wm,wm8505-sdhc";
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H A D | wm8505.dtsi | 192 clksdhc: sdhc { 286 sdhc@d800a000 { 287 compatible = "wm,wm8505-sdhc";
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H A D | wm8850.dtsi | 206 clksdhc: sdhc { 297 sdhc@d800a000 { 298 compatible = "wm,wm8505-sdhc";
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H A D | wm8750.dtsi | 211 clksdhc: sdhc { 326 sdhc@d800a000 { 327 compatible = "wm,wm8505-sdhc";
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | vt8500.txt | 66 sdhc: sdhc {
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/linux/arch/powerpc/platforms/512x/ |
H A D | clock-commonclk.c | 746 * the Reference Manual discusses that for SDHC only even divide in mpc512x_clk_setup_clock_tree() 756 clks[MPC512x_CLK_SDHC_x4] = mpc512x_clk_factor("sdhc-x4", "csb", 2, 1); in mpc512x_clk_setup_clock_tree() 757 clks[MPC512x_CLK_SDHC_UG] = mpc512x_clk_divider("sdhc-ug", "sdhc-x4", 0, in mpc512x_clk_setup_clock_tree() 762 "sdhc2-ug", "sdhc-x4", 0, &clkregs->scfr2, in mpc512x_clk_setup_clock_tree() 866 clks[MPC512x_CLK_SDHC] = mpc512x_clk_gated("sdhc", "sdhc-ug", in mpc512x_clk_setup_clock_tree() 890 "sdhc-2", "sdhc2-ug", &clkregs->sccr2, 17); in mpc512x_clk_setup_clock_tree()
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