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/linux/Documentation/devicetree/bindings/mmc/
H A Dwm,wm8505-sdhc.yaml4 $id: http://devicetree.org/schemas/mmc/wm,wm8505-sdhc.yaml#
18 - const: wm,wm8505-sdhc
20 - const: wm,wm8650-sdhc
21 - const: wm,wm8505-sdhc
23 - const: wm,wm8750-sdhc
24 - const: wm,wm8505-sdhc
26 - const: wm,wm8850-sdhc
27 - const: wm,wm8505-sdhc
46 wm,wm8505-sdhc. On wm,wm8650-sdhc and later this property is implied and
60 compatible = "wm,wm8505-sdhc";
[all …]
H A Damlogic,meson-mx-sdhc.yaml4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdhc.yaml#
7 title: Amlogic Meson SDHC controller
16 The SDHC MMC host controller on Amlogic SoCs provides an eMMC and MMC
24 - amlogic,meson8-sdhc
25 - amlogic,meson8b-sdhc
26 - amlogic,meson8m2-sdhc
27 - const: amlogic,meson-mx-sdhc
60 sdhc: mmc@8e00 {
61 compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc";
H A Dmarvell,xenon-sdhci.yaml14 Each SDHC is independent and owns independent resources, such as register
17 Each SDHC should have an independent device tree node.
74 marvell,xenon-sdhc-id:
79 Indicate the corresponding bit index of current SDHC in SDHC System
81 enable/disable current SDHC.
96 entire SDHC type or property. For example, "emmc 5.1 phy" doesn't mean
97 that this Xenon SDHC only supports eMMC 5.1.
145 Xenon SDHC SoC usually doesn't provide re-tuning counter in
/linux/drivers/mmc/host/
H A Dsdhci-xenon.h11 /* Register Offset of Xenon SDHC self-defined register */
66 /* idx of SDHC */
84 * record the current ios setting of Xenon SDHC.
H A DMakefile66 meson-mx-sdhc-objs := meson-mx-sdhc-clkc.o meson-mx-sdhc-mmc.o
67 obj-$(CONFIG_MMC_MESON_MX_SDHC) += meson-mx-sdhc.o
H A Dmeson-mx-sdhc-mmc.c3 * Amlogic Meson6/Meson8/Meson8b/Meson8m2 SDHC MMC host controller driver.
26 #include "meson-mx-sdhc.h"
879 .compatible = "amlogic,meson8-sdhc",
883 .compatible = "amlogic,meson8b-sdhc",
887 .compatible = "amlogic,meson8m2-sdhc",
898 .name = "meson-mx-sdhc",
906 MODULE_DESCRIPTION("Meson6, Meson8, Meson8b and Meson8m2 SDHC Host Driver");
H A Dsdhci-xenon-phy.c3 * PHY support for Xenon SDHC
449 /* Disable both SDHC Data Strobe and Enhanced Strobe */ in xenon_emmc_phy_disable_strobe()
483 /* Enable SDHC Data Strobe */ in xenon_emmc_phy_strobe_delay_adj()
487 * Enable SDHC Enhanced Strobe if supported in xenon_emmc_phy_strobe_delay_adj()
824 * and adjust Xenon SDHC delay. in xenon_phy_adj()
/linux/arch/arm/boot/dts/amlogic/
H A Dmeson8m2.dtsi87 &sdhc {
88 compatible = "amlogic,meson8m2-sdhc", "amlogic,meson-mx-sdhc";
H A Dmeson8-fernsehfee3.dts22 mmc0 = &sdhc;
229 &sdhc {
/linux/arch/powerpc/boot/dts/fsl/
H A Dqoriq-esdhc-0.dtsi35 sdhc: sdhc@114000 { label
H A Dt102xsi-pre.dtsi59 sdhc = &sdhc;
H A Db4420si-pre.dtsi57 sdhc = &sdhc;
H A Db4860si-pre.dtsi57 sdhc = &sdhc;
H A Dp5020si-pre.dtsi61 sdhc = &sdhc;
H A Dt208xsi-pre.dtsi74 sdhc = &sdhc;
H A Dt104xsi-pre.dtsi58 sdhc = &sdhc;
H A Dp3041si-pre.dtsi61 sdhc = &sdhc;
H A Dp2041si-pre.dtsi60 sdhc = &sdhc;
H A Dp5040si-pre.dtsi60 sdhc = &sdhc;
H A Dp4080si-pre.dtsi60 sdhc = &sdhc;
H A Dt4240si-pre.dtsi64 sdhc = &sdhc;
/linux/Documentation/devicetree/bindings/clock/
H A Dvt8500.txt66 sdhc: sdhc {
/linux/arch/powerpc/platforms/512x/
H A Dclock-commonclk.c746 * the Reference Manual discusses that for SDHC only even divide in mpc512x_clk_setup_clock_tree()
756 clks[MPC512x_CLK_SDHC_x4] = mpc512x_clk_factor("sdhc-x4", "csb", 2, 1); in mpc512x_clk_setup_clock_tree()
757 clks[MPC512x_CLK_SDHC_UG] = mpc512x_clk_divider("sdhc-ug", "sdhc-x4", 0, in mpc512x_clk_setup_clock_tree()
762 "sdhc2-ug", "sdhc-x4", 0, &clkregs->scfr2, in mpc512x_clk_setup_clock_tree()
866 clks[MPC512x_CLK_SDHC] = mpc512x_clk_gated("sdhc", "sdhc-ug", in mpc512x_clk_setup_clock_tree()
890 "sdhc-2", "sdhc2-ug", &clkregs->sccr2, 17); in mpc512x_clk_setup_clock_tree()
/linux/arch/arm/boot/dts/vt8500/
H A Dwm8650.dtsi165 clksdhc: sdhc {
196 compatible = "wm,wm8505-sdhc";
/linux/arch/arm64/boot/dts/qcom/
H A Dipq6018-mp5496.dtsi42 &sdhc {

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