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Searched full:sclk_i2s1 (Results 1 – 19 of 19) sorted by relevance

/linux/Documentation/devicetree/bindings/sound/
H A Drockchip,rk3328-codec.yaml68 clocks = <&cru PCLK_ACODECPHY>, <&cru SCLK_I2S1>;
/linux/include/dt-bindings/clock/
H A Dexynos7-clk.h117 #define SCLK_I2S1 25 macro
H A Drk3128-cru.h29 #define SCLK_I2S1 81 macro
H A Drk3228-cru.h28 #define SCLK_I2S1 81 macro
H A Drv1108-cru.h26 #define SCLK_I2S1 76 macro
H A Drk3328-cru.h31 #define SCLK_I2S1 42 macro
H A Dpx30-cru.h22 #define SCLK_I2S1 20 macro
/linux/Documentation/devicetree/bindings/clock/
H A Dsamsung,exynos7-clock.yaml160 - const: sclk_i2s1
/linux/drivers/clk/rockchip/
H A Dclk-rk3128.c368 GATE(SCLK_I2S1, "sclk_i2s1", "i2s1_pre", CLK_SET_RATE_PARENT,
H A Dclk-rk3228.c434 GATE(SCLK_I2S1, "sclk_i2s1", "i2s1_pre", CLK_SET_RATE_PARENT,
H A Dclk-rv1108.c521 GATE(SCLK_I2S1, "sclk_i2s1", "i2s1_pre", CLK_SET_RATE_PARENT,
H A Dclk-rk3328.c387 GATE(SCLK_I2S1, "clk_i2s1", "i2s1_pre", CLK_SET_RATE_PARENT,
H A Dclk-px30.c638 GATE(SCLK_I2S1, "clk_i2s1", "clk_i2s1_mux", CLK_SET_RATE_PARENT,
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos7.dtsi243 "sclk_i2s1",
/linux/arch/arm/boot/dts/rockchip/
H A Drk3066a.dtsi198 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1>;
H A Drk322x.dtsi143 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
H A Drk3128.dtsi519 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S_2CH>;
/linux/drivers/clk/samsung/
H A Dclk-exynos4.c641 DIV(CLK_SCLK_I2S1, "sclk_i2s1", "sclk_audio1", DIV_PERIL5, 0, 6),
/linux/arch/arm64/boot/dts/rockchip/
H A Dpx30.dtsi412 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1>;