Searched full:sclk_i2s0 (Results  1 – 16 of 16) sorted by relevance
| /linux/Documentation/devicetree/bindings/sound/ | 
| H A D | rockchip-i2s.yaml | 133       clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
 | 
| /linux/include/dt-bindings/clock/ | 
| H A D | rk3128-cru.h | 28 #define SCLK_I2S0		80  macro
 | 
| H A D | rk3228-cru.h | 27 #define SCLK_I2S0		80  macro
 | 
| H A D | rv1108-cru.h | 25 #define SCLK_I2S0			75  macro
 | 
| H A D | rk3328-cru.h | 30 #define SCLK_I2S0		41  macro
 | 
| H A D | rk3288-cru.h | 37 #define SCLK_I2S0		82  macro
 | 
| /linux/drivers/clk/rockchip/ | 
| H A D | clk-rk3128.c | 358 	GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
 | 
| H A D | clk-rk3228.c | 424 	GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
 | 
| H A D | clk-rv1108.c | 508 	GATE(SCLK_I2S0, "sclk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
 | 
| H A D | clk-rk3288.c | 370 	GATE(SCLK_I2S0, "sclk_i2s0", "i2s_pre", CLK_SET_RATE_PARENT,
 | 
| H A D | clk-rk3328.c | 377 	GATE(SCLK_I2S0, "clk_i2s0", "i2s0_pre", CLK_SET_RATE_PARENT,
 | 
| /linux/arch/arm/boot/dts/rockchip/ | 
| H A D | rk3066a.dtsi | 182 		clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
 | 
| H A D | rk3188.dtsi | 170 		clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
 | 
| H A D | rk322x.dtsi | 156 		clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
 | 
| H A D | rk3128.dtsi | 436 		clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S_8CH>;
 | 
| H A D | rk3288.dtsi | 971 		clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0>;
 |