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/linux/drivers/clk/rockchip/
H A Dclk-rk3036.c295 COMPOSITE(SCLK_EMMC, "sclk_emmc", mux_mmc_src_p, 0,
305 MMC(SCLK_EMMC_DRV, "emmc_drv", "sclk_emmc", RK3036_EMMC_CON0, 1),
306 MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RK3036_EMMC_CON1, 0),
H A Dclk-rk3128.c321 COMPOSITE(SCLK_EMMC, "sclk_emmc", mux_mmc_src_p, 0,
541 MMC(SCLK_EMMC_DRV, "emmc_drv", "sclk_emmc", RK3228_EMMC_CON0, 1),
542 MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RK3228_EMMC_CON1, 0),
H A Dclk-rk3228.c395 DIV(SCLK_EMMC, "sclk_emmc", "sclk_emmc_src", 0,
644 MMC(SCLK_EMMC_DRV, "emmc_drv", "sclk_emmc", RK3228_EMMC_CON0, 1),
645 MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RK3228_EMMC_CON1, 0),
H A Dclk-rv1108.c728 DIV(SCLK_EMMC, "sclk_emmc", "sclk_emmc_src", 0,
767 MMC(SCLK_EMMC_DRV, "emmc_drv", "sclk_emmc", RV1108_EMMC_CON0, 1),
768 MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RV1108_EMMC_CON1, 1),
H A Dclk-rk3368.c552 COMPOSITE(SCLK_EMMC, "sclk_emmc", mux_mmc_src_p, 0,
562 MMC(SCLK_EMMC_DRV, "emmc_drv", "sclk_emmc", RK3368_EMMC_CON0, 1),
563 MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RK3368_EMMC_CON1, 0),
H A Dclk-rk3288.c535 COMPOSITE(SCLK_EMMC, "sclk_emmc", mux_mmc_src_p, 0,
548 MMC(SCLK_EMMC_DRV, "emmc_drv", "sclk_emmc", RK3288_EMMC_CON0, 1),
549 MMC(SCLK_EMMC_SAMPLE, "emmc_sample", "sclk_emmc", RK3288_EMMC_CON1, 0),
H A Dclk-rk3188.c404 COMPOSITE_NOMUX(SCLK_EMMC, "sclk_emmc", "hclk_peri", 0,
/linux/Documentation/devicetree/bindings/mmc/
H A Darasan,sdhci.yaml212 clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
215 assigned-clocks = <&cru SCLK_EMMC>;
/linux/include/dt-bindings/clock/
H A Drk3036-cru.h21 #define SCLK_EMMC 71 macro
H A Drk3188-cru-common.h30 #define SCLK_EMMC 74 macro
H A Drk3128-cru.h24 #define SCLK_EMMC 71 macro
H A Drk3228-cru.h22 #define SCLK_EMMC 71 macro
H A Drv1108-cru.h21 #define SCLK_EMMC 71 macro
H A Drk3368-cru.h26 #define SCLK_EMMC 71 macro
H A Drk3308-cru.h62 #define SCLK_EMMC 58 macro
H A Drk3328-cru.h24 #define SCLK_EMMC 35 macro
H A Dpx30-cru.h59 #define SCLK_EMMC 57 macro
H A Drk3288-cru.h26 #define SCLK_EMMC 71 macro
H A Drk3399-cru.h35 #define SCLK_EMMC 78 macro
/linux/arch/arm/boot/dts/rockchip/
H A Drk3xxx.dtsi240 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
H A Drk3036.dtsi285 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
H A Drv1108.dtsi466 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
H A Drk322x.dtsi788 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
/linux/arch/arm64/boot/dts/rockchip/
H A Dpx30.dtsi297 <&cru SCLK_EMMC>,
1026 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
H A Drk3368.dtsi214 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,

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