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/linux/drivers/gpu/drm/panel/
H A Dpanel-feiyang-fy07024di26a30d.c57 /* T1 (dvdd start + dvdd rise) 0 < T1 <= 10ms */ in feiyang_prepare()
64 /* T3 (dvdd rise + avdd start + avdd rise) T3 >= 20ms */ in feiyang_prepare()
70 * T5 + T6 (avdd rise + video & logic signal rise) in feiyang_prepare()
77 /* T12 (video & logic signal rise + backlight rise) T12 >= 200ms */ in feiyang_prepare()
97 /* T12 (video & logic signal rise + backlight rise) T12 >= 200ms */ in feiyang_enable()
130 /* T11 (dvdd rise to fall) 0 < T11 <= 10ms */ in feiyang_unprepare()
/linux/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs42l42.yaml75 cirrus,ts-dbnc-rise:
162 If present this sets the rate that the HS bias should rise and fall.
163 The actual rise and fall times depend on external hardware (the
164 datasheet gives several rise and fall time examples).
166 0 - Fast rise time; slow, load-dependent fall time
219 cirrus,ts-dbnc-rise = <CS42L42_TS_DBNCE_1000>;
/linux/Documentation/devicetree/bindings/phy/
H A Dfsl,imx8mq-usb-phy.yaml54 fsl,phy-tx-rise-tune-percent:
56 Adjusts the rise/fall time duration of the HS waveform relative to
128 fsl,phy-tx-rise-tune-percent:
H A Dphy-stm32-usbphyc.yaml119 description: Enables the FS rise/fall tuning option
123 description: Enables the HS rise/fall reduction feature
/linux/Documentation/leds/
H A Dleds-sc27xx.rst12 hardware pattern, which is used to configure the rise time,
17 format, we should set brightness as 0 for rise stage, fall
H A Dleds-cht-wcove.rst27 The rise and fall times must be the same value.
/linux/Documentation/devicetree/bindings/usb/
H A Dchipidea,usb2-imx.yaml124 fsl,picophy-rise-fall-time-adjust:
126 HS Transmitter Rise/Fall Time Adjustment. Adjust the rise/fall times
127 of the high-speed transmitter waveform. It has no unit. The rise/fall
/linux/drivers/gpio/
H A Dgpio-mt7621.c145 u32 rise, fall, high, low; in mt7621_gpio_irq_unmask() local
151 rise = mtk_gpio_r32(rg, GPIO_REG_REDGE); in mt7621_gpio_irq_unmask()
155 mtk_gpio_w32(rg, GPIO_REG_REDGE, rise | (BIT(mask) & rg->rising)); in mt7621_gpio_irq_unmask()
167 u32 rise, fall, high, low; in mt7621_gpio_irq_mask() local
170 rise = mtk_gpio_r32(rg, GPIO_REG_REDGE); in mt7621_gpio_irq_mask()
175 mtk_gpio_w32(rg, GPIO_REG_REDGE, rise & ~BIT(mask)); in mt7621_gpio_irq_mask()
H A Dgpio-mlxbf2.c291 bool rise = false; in mlxbf2_gpio_irq_set_type() local
297 rise = true; in mlxbf2_gpio_irq_set_type()
300 rise = true; in mlxbf2_gpio_irq_set_type()
317 if (rise) { in mlxbf2_gpio_irq_set_type()
/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mux-ltc4306.txt24 - ltc,downstream-accelerators-enable: Enables the rise time accelerators
26 - ltc,upstream-accelerators-enable: Enables the rise time accelerators
H A Di2c-rk3x.yaml89 Number of nanoseconds the SCL signal takes to rise
/linux/drivers/clk/tegra/
H A Dclk-tegra114.c21 #define CPU_FINETRIM_DR 0x4d8 /* rise->rise prop dly A */
22 #define CPU_FINETRIM_R 0x4e4 /* rise->rise prop dly inc A */
1196 /* Use hardwired rise->rise & fall->fall clock propagation delays */ in tegra114_clock_tune_cpu_trimmers_high()
1220 * Use software-specified rise->rise & fall->fall clock in tegra114_clock_tune_cpu_trimmers_low()
1245 /* Increment the rise->rise clock delay by four steps */ in tegra114_clock_tune_cpu_trimmers_init()
1252 * Use the rise->rise clock propagation delay specified in the in tegra114_clock_tune_cpu_trimmers_init()
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmvebu-devbus.txt92 address and data to DEV_WEn rise.
100 data after DEV_WEn rise.
/linux/Documentation/devicetree/bindings/watchdog/
H A Dstarfive,jh7100-wdt.yaml17 output(WDOGINT) will rise when counter is 0. The counter will reload
/linux/drivers/leds/
H A Dleds-sc27xx-bltc.c157 /* Reset the rise, high, fall and low time to zero. */ in sc27xx_led_pattern_clear()
183 * Must contain 4 tuples to configure the rise time, high time, fall in sc27xx_led_pattern_set()
/linux/Documentation/ABI/testing/
H A Dsysfs-class-led-driver-lm353327 Set the pattern generator fall and rise times (0..7), where:
/linux/drivers/usb/chipidea/
H A Dotg_fsm.h17 /* Wait for VBUS Rise */
/linux/drivers/input/misc/
H A Drk805-pwrkey.c77 dev_err(&pdev->dev, "Can't register rise irq: %d\n", err); in rk805_pwrkey_probe()
/linux/Documentation/filesystems/
H A Dlocks.rst35 for example. This gave rise to some other subtle problems if sendmail was
/linux/drivers/gpu/drm/mediatek/
H A Dmtk_hdmi_ddc_v2.c83 /* If down, rise bus for write operation */ in mtk_ddcm_write_hdmi()
120 /* The I2C bus might be down after WR operation: rise it again */ in mtk_ddcm_write_hdmi()
/linux/include/linux/
H A Dled-lm3530.h89 * @brt_ramp_rise: rate of rise of led current
/linux/drivers/pinctrl/
H A Dpinctrl-at91.h59 #define PIO_FRLHSR 0xd8 /* Fall/Rise - Low/High Status Register */
/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_slpc.c393 /* Actual frequency should rise above min */ in run_test()
395 pr_err("Actual freq did not rise above min\n"); in run_test()
/linux/drivers/char/
H A Dnsc_gpio.c36 (config & 32) ? "HI" : "LO", /* trigger on rise/fall edge */ in nsc_gpio_dump()
/linux/Documentation/driver-api/gpio/
H A Dintro.rst108 value (after the appropriate rise time passes), you know some other component is

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