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/linux/drivers/gpu/drm/panel/
H A Dpanel-feiyang-fy07024di26a30d.c58 /* T1 (dvdd start + dvdd rise) 0 < T1 <= 10ms */ in feiyang_prepare()
65 /* T3 (dvdd rise + avdd start + avdd rise) T3 >= 20ms */ in feiyang_prepare()
71 * T5 + T6 (avdd rise + video & logic signal rise) in feiyang_prepare()
78 /* T12 (video & logic signal rise + backlight rise) T12 >= 200ms */ in feiyang_prepare()
98 /* T12 (video & logic signal rise + backlight rise) T12 >= 200ms */ in feiyang_enable()
133 /* T11 (dvdd rise to fall) 0 < T11 <= 10ms */ in feiyang_unprepare()
/linux/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs42l42.yaml75 cirrus,ts-dbnc-rise:
162 If present this sets the rate that the HS bias should rise and fall.
163 The actual rise and fall times depend on external hardware (the
164 datasheet gives several rise and fall time examples).
166 0 - Fast rise time; slow, load-dependent fall time
219 cirrus,ts-dbnc-rise = <CS42L42_TS_DBNCE_1000>;
H A Dcirrus,cs42l43.yaml138 cirrus,tip-rise-db-ms:
168 cirrus,ring-rise-db-ms:
/linux/drivers/gpio/
H A Dgpio-mt7621.c112 u32 rise, fall, high, low; in mediatek_gpio_irq_unmask() local
117 rise = mtk_gpio_r32(rg, GPIO_REG_REDGE); in mediatek_gpio_irq_unmask()
121 mtk_gpio_w32(rg, GPIO_REG_REDGE, rise | (BIT(pin) & rg->rising)); in mediatek_gpio_irq_unmask()
135 u32 rise, fall, high, low; in mediatek_gpio_irq_mask() local
138 rise = mtk_gpio_r32(rg, GPIO_REG_REDGE); in mediatek_gpio_irq_mask()
143 mtk_gpio_w32(rg, GPIO_REG_REDGE, rise & ~BIT(pin)); in mediatek_gpio_irq_mask()
H A Dgpio-stmpe.c310 u8 rise = NOT_SUPPORTED_IDX; in stmpe_dbg_show_one() local
333 rise = !!(ret & mask); in stmpe_dbg_show_one()
358 rise_values[rise], in stmpe_dbg_show_one()
/linux/Documentation/leds/
H A Dleds-sc27xx.rst12 hardware pattern, which is used to configure the rise time,
17 format, we should set brightness as 0 for rise stage, fall
H A Dleds-cht-wcove.rst27 The rise and fall times must be the same value.
/linux/drivers/net/wireless/intel/iwlwifi/fw/api/
H A Drx.h32 * @system_timestamp: GP2 at on air rise
33 * @timestamp: TSF at on air rise
34 * @beacon_time_stamp: beacon at on-air rise
507 * @gp2_on_air_rise: GP2 timer value on air rise (INA)
514 * TSF value on air rise (INA), only valid if
604 * @gp2_on_air_rise: GP2 timer value on air rise (INA)
611 * TSF value on air rise (INA), only valid if
795 * @on_air_rise_time: GP2 during on air rise
820 * @on_air_rise_time: GP2 during on air rise
/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-mux-ltc4306.txt24 - ltc,downstream-accelerators-enable: Enables the rise time accelerators
26 - ltc,upstream-accelerators-enable: Enables the rise time accelerators
H A Di2c-rk3x.yaml86 Number of nanoseconds the SCL signal takes to rise
/linux/Documentation/devicetree/bindings/phy/
H A Dfsl,imx8mq-usb-phy.yaml49 fsl,phy-tx-rise-tune-percent:
51 Adjusts the rise/fall time duration of the HS waveform relative to
H A Dphy-stm32-usbphyc.yaml119 description: Enables the FS rise/fall tuning option
123 description: Enables the HS rise/fall reduction feature
/linux/drivers/clk/tegra/
H A Dclk-tegra114.c20 #define CPU_FINETRIM_DR 0x4d8 /* rise->rise prop dly A */
21 #define CPU_FINETRIM_R 0x4e4 /* rise->rise prop dly inc A */
1202 /* Use hardwired rise->rise & fall->fall clock propagation delays */ in tegra114_clock_tune_cpu_trimmers_high()
1226 * Use software-specified rise->rise & fall->fall clock in tegra114_clock_tune_cpu_trimmers_low()
1251 /* Increment the rise->rise clock delay by four steps */ in tegra114_clock_tune_cpu_trimmers_init()
1258 * Use the rise->rise clock propagation delay specified in the in tegra114_clock_tune_cpu_trimmers_init()
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmvebu-devbus.txt92 address and data to DEV_WEn rise.
100 data after DEV_WEn rise.
/linux/drivers/leds/
H A Dleds-sc27xx-bltc.c157 /* Reset the rise, high, fall and low time to zero. */ in sc27xx_led_pattern_clear()
183 * Must contain 4 tuples to configure the rise time, high time, fall in sc27xx_led_pattern_set()
/linux/drivers/gpu/drm/bridge/
H A Dparade-ps8622.c359 * T1 is the range of time that it takes for the power to rise after we in ps8622_pre_enable()
363 * If it takes T1.max for the power to rise, we need to wait atleast in ps8622_pre_enable()
365 * power to rise, we need to wait at most T2.max before deasserting the in ps8622_pre_enable()
/linux/Documentation/devicetree/bindings/watchdog/
H A Dstarfive,jh7100-wdt.yaml17 output(WDOGINT) will rise when counter is 0. The counter will reload
/linux/Documentation/ABI/testing/
H A Dsysfs-class-led-driver-lm353327 Set the pattern generator fall and rise times (0..7), where:
/linux/drivers/usb/chipidea/
H A Dotg_fsm.h17 /* Wait for VBUS Rise */
/linux/drivers/input/misc/
H A Drk805-pwrkey.c77 dev_err(&pdev->dev, "Can't register rise irq: %d\n", err); in rk805_pwrkey_probe()
/linux/Documentation/filesystems/
H A Dlocks.rst35 for example. This gave rise to some other subtle problems if sendmail was
/linux/include/linux/
H A Dled-lm3530.h89 * @brt_ramp_rise: rate of rise of led current
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru-chromebook.dtsi449 /* These are relatively safe rise/fall times */
465 /* These are relatively safe rise/fall times */
/linux/drivers/pinctrl/
H A Dpinctrl-at91.h59 #define PIO_FRLHSR 0xd8 /* Fall/Rise - Low/High Status Register */
/linux/drivers/media/rc/img-ir/
H A Dimg-ir-raw.c25 /* find whether both rise and fall was detected */ in img_ir_refresh_raw()

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