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/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/
H A DRISCVCInstructions.h21 struct RxC { struct
30 constexpr RxC DecodeCR_RD(uint32_t inst) { return RxC{DecodeRD(inst), false}; } in DecodeCR_RD() argument
31 constexpr RxC DecodeCI_RD(uint32_t inst) { return RxC{DecodeRD(inst), false}; } in DecodeCI_RD()
32 constexpr RxC DecodeCR_RS1(uint32_t inst) { return RxC{DecodeRD(inst), false}; } in DecodeCR_RS1()
33 constexpr RxC DecodeCI_RS1(uint32_t inst) { return RxC{DecodeRD(inst), false}; } in DecodeCI_RS1()
34 constexpr RxC DecodeCR_RS2(uint32_t inst) { in DecodeCR_RS2()
35 return RxC{(inst & 0x7C) >> 2, false}; in DecodeCR_RS2()
38 constexpr RxC DecodeCIW_RD(uint32_t inst) { return RxC{(inst & 0x1C) >> 2}; } in DecodeCIW_RD()
39 constexpr RxC DecodeCL_RD(uint32_t inst) { return RxC{DecodeCIW_RD(inst)}; } in DecodeCL_RD()
40 constexpr RxC DecodeCA_RD(uint32_t inst) { return RxC{(inst & 0x380) >> 7}; } in DecodeCA_RD()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmicrel-ksz90x1.txt48 - rxc-skew-ps : Skew control of RXC pad
66 rxc-skew-ps=<0> actually results in -900 picoseconds adjustment.
74 The following 5-bit values table apply to rxc-skew-ps and txc-skew-ps.
137 - rxc-skew-ps : Skew control of RX clock pad
165 A negative value can be assigned as rxc-skew-psec = <(-100)>;.
171 - rxc-skew-psec : Skew control of RX clock pad
191 rxc-skew-ps = <1800>;
201 rxc-skew-ps = <1800>;
H A Dmediatek-dwmac.txt35 - mediatek,rmii-rxc: boolean property, if present indicates that the RMII
36 reference clock, which is from external PHYs, is connected to RXC pin
47 - mediatek,rxc-inverse: boolean property, if present indicates that
84 mediatek,rmii-rxc;
86 mediatek,rxc-inverse;
H A Dmediatek,star-emac.yaml51 mediatek,rmii-rxc:
55 PHYs, is connected to RXC pin. Otherwise, is connected to TXC pin.
57 mediatek,rxc-inverse:
60 If present, indicates that clock on RXC pad will be inversed.
H A Dmediatek-dwmac.yaml96 mediatek,rmii-rxc:
100 PHYs, is connected to RXC pin. Otherwise, is connected to TXC pin.
118 mediatek,rxc-inverse:
H A Dengleder,tsnep.yaml95 rxc-skew-ps = <1080>;
115 rxc-skew-ps = <1080>;
/freebsd/sys/dev/vmware/vmxnet3/
H A Dif_vmx.c844 struct vmxnet3_comp_ring *rxc; in vmxnet3_init_rxq() local
850 rxc = &rxq->vxrxq_comp_ring; in vmxnet3_init_rxq()
863 rxc->vxcr_ndesc = scctx->isc_nrxd[0]; in vmxnet3_init_rxq()
917 struct vmxnet3_comp_ring *rxc; in vmxnet3_rx_queues_alloc() local
920 rxc = &rxq->vxrxq_comp_ring; in vmxnet3_rx_queues_alloc()
923 rxc->vxcr_u.rxcd = in vmxnet3_rx_queues_alloc()
925 rxc->vxcr_paddr = paddrs[q * nrxqs + 0]; in vmxnet3_rx_queues_alloc()
1454 struct vmxnet3_comp_ring *rxc; in vmxnet3_isc_rxd_available() local
1463 rxc = &rxq->vxrxq_comp_ring; in vmxnet3_isc_rxd_available()
1466 completed_gen = rxc->vxcr_gen; in vmxnet3_isc_rxd_available()
[all …]
/freebsd/sys/dev/ste/
H A Dif_ste.c1120 struct ste_chain_onefrag *rxc; in ste_dma_alloc() local
1283 rxc = &sc->ste_cdata.ste_rx_chain[i]; in ste_dma_alloc()
1284 rxc->ste_ptr = NULL; in ste_dma_alloc()
1285 rxc->ste_mbuf = NULL; in ste_dma_alloc()
1286 rxc->ste_next = NULL; in ste_dma_alloc()
1287 rxc->ste_map = NULL; in ste_dma_alloc()
1289 &rxc->ste_map); in ste_dma_alloc()
1305 struct ste_chain_onefrag *rxc; in ste_dma_free() local
1324 rxc = &sc->ste_cdata.ste_rx_chain[i]; in ste_dma_free()
1325 if (rxc->ste_map != NULL) { in ste_dma_free()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dsama5d3xmb_gmac.dtsi24 rxc-skew-ps = <3000>;
38 rxc-skew-ps = <3000>;
H A Dsama5d3xcm_cmp.dtsi59 rxc-skew-ps = <3000>;
73 rxc-skew-ps = <3000>;
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dfsl,asrc.txt25 - dma-names : Contains "rxa", "rxb", "rxc", "txa", "txb" and "txc".
76 dma-names = "rxa", "rxb", "rxc",
/freebsd/sys/contrib/device-tree/src/arm/gemini/
H A Dgemini-nas4220b.dts114 pins = "Y7 GMAC0 RXC", "Y11 GMAC1 RXC";
H A Dgemini-sq201.dts189 pins = "Y7 GMAC0 RXC";
205 pins = "Y11 GMAC1 RXC";
H A Dgemini-sl93512r.dts197 pins = "T11 GMAC1 RXC";
213 pins = "T8 GMAC0 RXC";
H A Dgemini-dlink-dns-313.dts243 pins = "T8 GMAC0 RXC";
247 pins = "T11 GMAC1 RXC";
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6dl-mba6.dtsi21 rxc-skew-ps = <1860>;
H A Dimx6q-mba6.dtsi27 rxc-skew-ps = <1860>;
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dholly.dts69 txc-rxc-delay-disable;
75 txc-rxc-delay-disable;
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Drzg2ul-smarc-som.dtsi83 rxc-skew-psec = <2400>;
112 rxc-skew-psec = <2400>;
H A Dr8a779a0-falcon.dts32 rxc-skew-ps = <1500>;
H A Drzg2l-smarc-som.dtsi107 rxc-skew-psec = <2400>;
135 rxc-skew-psec = <2400>;
/freebsd/sys/contrib/device-tree/src/arm/intel/socfpga/
H A Dsocfpga_arria10_mercury_aa1.dtsi53 rxc-skew-ps = <1680>; /* 780ps */
H A Dsocfpga_cyclone5_de0_nano_soc.dts59 rxc-skew-ps = <1680>; /* 780ps */
/freebsd/sys/dev/mii/
H A Dmicphy.c222 "rxc-skew-ps", 0x1f, 0, "txc-skew-ps", 0x1f, 5, in ksz9031_load_values()
232 "rxdv-skew-ps", 0xf, 8, "rxc-skew-ps", 0xf, 12); in ksz9021_load_values()
/freebsd/sys/contrib/device-tree/src/arm64/intel/
H A Dsocfpga_agilex_socdk_nand.dts76 rxc-skew-ps = <1680>; /* 780ps */

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