Searched full:rxaui (Results 1 – 10 of 10) sorted by relevance
/linux/Documentation/devicetree/bindings/net/ |
H A D | marvell,pp2.yaml | 102 one lane is sufficient, but some (e.g. RXAUI) may require two. 112 - rxaui
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H A D | ethernet-controller.yaml | 98 - rxaui
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/linux/Documentation/devicetree/bindings/phy/ |
H A D | transmit-amplitude.yaml | 45 - rxaui
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/linux/Documentation/ABI/testing/ |
H A D | sysfs-class-net-phydev | 43 xgmii, moca, qsgmii, trgmii, 1000base-x, 2500base-x, rxaui,
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/linux/drivers/phy/marvell/ |
H A D | phy-mvebu-cp110-comphy.c | 401 "RXAUI is not supported on comphy lane %d\n", in mvebu_comphy_ethernet_init_reset() 784 dev_dbg(priv->dev, "set lane %d to RXAUI mode\n", in mvebu_comphy_power_on()
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/linux/drivers/net/ethernet/cavium/thunder/ |
H A D | thunder_bgx.c | 764 /* Set interleaved running disparity for RXAUI */ in bgx_lmac_xaui_init() 1255 dev_info(dev, "%s: RXAUI\n", (char *)str); in bgx_print_qlm_mode()
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/linux/drivers/net/phy/ |
H A D | marvell10g.c | 1001 * xaui / rxaui modes according to the speed. in mv3310_update_interface()
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H A D | phylink.c | 1905 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching in phylink_validate_phy()
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/linux/drivers/net/ethernet/marvell/octeontx2/af/ |
H A D | cgx.c | 52 [LMAC_MODE_RXAUI] = "RXAUI",
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/linux/drivers/net/dsa/mv88e6xxx/ |
H A D | chip.c | 775 * (Note that 6x90 doesn't support RXAUI nor XAUI). in mv88e6390x_phylink_get_caps() 780 * configured for RXAUI, 1000BASE-X, SGMII or 2500BASE-X. in mv88e6390x_phylink_get_caps() 785 * configured for RXAUI, 1000BASE-X, SGMII or 2500BASE-X. in mv88e6390x_phylink_get_caps()
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