/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | qcom,sdx75-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sdx75-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SDX75 13 RPMh interconnect providers support system bandwidth requirements through 14 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 17 least one RPMh device child node pertaining to their RSC and each provider 18 can map to multiple RPMh resources. 42 - $ref: qcom,rpmh-common.yaml# 67 - description: RPMH CC QPIC Clock 78 #include <dt-bindings/clock/qcom,rpmh.h>
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H A D | qcom,qdu1000-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,qdu1000-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on QDU1000 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 18 least one RPMh device child node pertaining to their RSC and each provider 19 can map to multiple RPMh resources. 35 - $ref: qcom,rpmh-common.yaml# 57 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
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H A D | qcom,rpmh-common.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,rpmh-common.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 18 least one RPMh device child node pertaining to their RSC and each provider 19 can map to multiple RPMh resources. 32 this interconnect to send RPMh commands.
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H A D | qcom,sm8650-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 18 least one RPMh device child node pertaining to their RSC and each provider 19 can map to multiple RPMh resources. 21 See also:: include/dt-bindings/interconnect/qcom,sm8650-rpmh.h 52 - $ref: qcom,rpmh-common.yaml# 103 - description: RPMH CC IPA clock
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H A D | qcom,sm8550-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8550-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8550 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 18 least one RPMh device child node pertaining to their RSC and each provider 19 can map to multiple RPMh resources. 21 See also:: include/dt-bindings/interconnect/qcom,sm8550-rpmh.h 49 - $ref: qcom,rpmh-common.yaml# 100 - description: RPMH CC IPA clock
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H A D | qcom,x1e80100-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,x1e80100-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on X1E80100 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 18 least one RPMh device child node pertaining to their RSC and each provider 19 can map to multiple RPMh resources. 21 See also:: include/dt-bindings/interconnect/qcom,x1e80100-rpmh.h 53 - $ref: qcom,rpmh-common.yaml#
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H A D | qcom,sm7150-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm7150-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM7150 13 RPMh interconnect providers support system bandwidth requirements through 14 RPMh hardware accelerators known as Bus Clock Manager (BCM). 16 See also:: include/dt-bindings/interconnect/qcom,sm7150-rpmh.h 19 - $ref: qcom,rpmh-common.yaml# 46 - $ref: qcom,rpmh-common.yaml#
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H A D | qcom,sm8450-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8450-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8450 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). 45 - $ref: qcom,rpmh-common.yaml# 86 - description: RPMH CC IPA clock 107 #include <dt-bindings/clock/qcom,rpmh.h>
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H A D | qcom,sc7280-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SC7280 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). 46 - $ref: qcom,rpmh-common.yaml# 83 - description: RPMH CC IPA clock
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H A D | qcom,sc8280xp-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sc8280xp-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SC8280XP 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). 39 - $ref: qcom,rpmh-common.yaml#
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H A D | qcom,sa8775p-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sa8775p-rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect on SA8775P 13 RPMh interconnect providers support system bandwidth requirements through 14 RPMh hardware accelerators known as Bus Clock Manager (BCM). 40 - $ref: qcom,rpmh-common.yaml#
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H A D | qcom,rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,rpmh.yaml# 7 title: Qualcomm RPMh Network-On-Chip Interconnect 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 18 least one RPMh device child node pertaining to their RSC and each provider 19 can map to multiple RPMh resources. 110 - $ref: qcom,rpmh-common.yaml#
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H A D | qcom,sm6350-rpmh.yaml | 4 $id: http://devicetree.org/schemas/interconnect/qcom,sm6350-rpmh.yaml# 7 title: Qualcomm SM6350 RPMh Network-On-Chip Interconnect 13 Qualcomm RPMh-based interconnect provider on SM6350. 16 - $ref: qcom,rpmh-common.yaml# 41 $ref: qcom,rpmh-common.yaml#
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H A D | qcom,bcm-voter.yaml | 48 # as defined in Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml 56 # as defined in Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml
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/linux/Documentation/devicetree/bindings/soc/qcom/ |
H A D | qcom,rpmh-rsc.yaml | 4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpmh-rsc.yaml# 7 title: Qualcomm RPMH RSC 13 Resource Power Manager Hardened (RPMH) is the mechanism for communicating 31 See also:: <dt-bindings/soc/qcom,rpmh-rsc.h> 42 Drivers that want to use the RSC to communicate with RPMH must specify their 47 const: qcom,rpmh-rsc 116 $ref: /schemas/regulator/qcom,rpmh-regulator.yaml# 141 #include <dt-bindings/soc/qcom,rpmh-rsc.h> 144 compatible = "qcom,rpmh-rsc"; 169 #include <dt-bindings/soc/qcom,rpmh-rsc.h> [all …]
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H A D | qcom-stats.yaml | 22 - qcom,rpmh-stats 23 - qcom,sdm845-rpmh-stats 47 const: qcom,rpmh-stats 55 # Example of rpmh sleep stats 58 compatible = "qcom,rpmh-stats";
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/linux/drivers/pmdomain/qcom/ |
H A D | rpmhpd.c | 16 #include <soc/qcom/rpmh.h> 25 * struct rpmhpd - top level RPMh power domain resource data structure 26 * @dev: rpmh power domain controller device 71 /* RPMH powerdomains */ 220 /* SA8540P RPMH powerdomains */ 239 /* SA8775P RPMH power domains */ 262 /* SAR2130P RPMH powerdomains */ 286 /* SDM670 RPMH powerdomains */ 303 /* SDM845 RPMH powerdomains */ 321 /* SDX55 RPMH powerdomains */ [all …]
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H A D | Kconfig | 21 tristate "Qualcomm RPMh Power domain driver" 24 QCOM RPMh Power domain driver to support power-domains with 26 value to RPMh which then translates it into corresponding voltage
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/linux/drivers/regulator/ |
H A D | qcom-rpmh-regulator.c | 19 #include <soc/qcom/rpmh.h> 21 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 24 * enum rpmh_regulator_type - supported RPMh accelerator types 25 * @VRM: RPMh VRM accelerator which supports voting on enable, voltage, 27 * @XOB: RPMh XOB accelerator which supports voting on the enable state 68 * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations 69 * @regulator_type: RPMh accelerator type used to manage this 99 * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a 101 * @dev: Device pointer for the top-level PMIC RPMh 103 * handle in RPMh write requests. [all …]
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/linux/drivers/soc/qcom/ |
H A D | rpmh.c | 21 #include <soc/qcom/rpmh.h> 23 #include "rpmh-internal.h" 160 * __rpmh_write: Cache and send the RPMH request 166 * Cache the RPMH request and send if the state is ACTIVE_ONLY. 212 * rpmh_write_async: Write a set of RPMH commands 219 * Write a set of RPMH commands, the order of commands is maintained 244 * rpmh_write: Write a set of RPMH commands and block until response 306 * rpmh_write_batch: Write multiple sets of RPMH commands and wait for the 371 pr_err("Error(%d) sending RPMH message addr=%#x\n", in rpmh_write_batch() 459 pr_debug("%s: skipping RPMH req: a:%#x s:%#x w:%#x", in rpmh_flush()
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H A D | Makefile | 23 qcom_rpmh-y += rpmh-rsc.o 24 qcom_rpmh-y += rpmh.o
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/linux/drivers/interconnect/qcom/ |
H A D | bcm-voter.h | 10 #include <soc/qcom/rpmh.h> 13 #include "icc-rpmh.h"
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H A D | sdx55.h | 9 /* 0 was used by MASTER_IPA_CORE, now represented as RPMh clock */ 31 /* 22 was used by SLAVE_IPA_CORE, now represented as RPMh clock */
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H A D | bcm-voter.c | 13 #include <soc/qcom/rpmh.h> 17 #include "icc-rpmh.h" 318 pr_err("Error sending AMC RPMH requests (%d)\n", ret); in qcom_icc_bcm_voter_commit() 349 pr_err("Error sending WAKE RPMH requests (%d)\n", ret); in qcom_icc_bcm_voter_commit() 357 pr_err("Error sending SLEEP RPMH requests (%d)\n", ret); in qcom_icc_bcm_voter_commit()
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,sc7180-lpasscorecc.yaml | 81 #include <dt-bindings/clock/qcom,rpmh.h> 94 #include <dt-bindings/clock/qcom,rpmh.h>
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