Home
last modified time | relevance | path

Searched full:rpmh (Results 1 – 25 of 269) sorted by relevance

1234567891011

/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,rpmhcc.yaml7 title: Qualcomm Technologies, Inc. RPMh Clocks
13 Resource Power Manager Hardened (RPMh) manages shared resources on
20 - qcom,qdu1000-rpmh-clk
21 - qcom,sa8775p-rpmh-clk
22 - qcom,sc7180-rpmh-clk
23 - qcom,sc7280-rpmh-clk
24 - qcom,sc8180x-rpmh-clk
25 - qcom,sc8280xp-rpmh-clk
26 - qcom,sdm670-rpmh-clk
27 - qcom,sdm845-rpmh-clk
[all …]
/linux/Documentation/devicetree/bindings/regulator/
H A Dqcom,rpmh-regulator.yaml4 $id: http://devicetree.org/schemas/regulator/qcom,rpmh-regulator.yaml#
7 title: Qualcomm Technologies, Inc. RPMh Regulators
14 rpmh-regulator devices support PMIC regulator management via the Voltage
15 Regulator Manager (VRM) and Oscillator Buffer (XOB) RPMh accelerators.
29 RPMh regulators must be described in two levels of device nodes. The first
31 RPMh device node. The second level describes each regulator within the PMIC
33 RPMh resource.
63 - qcom,pm6150-rpmh-regulators
64 - qcom,pm6150l-rpmh-regulators
65 - qcom,pm6350-rpmh-regulators
[all …]
/linux/drivers/clk/qcom/
H A Dclk-rpmh.c13 #include <soc/qcom/rpmh.h>
16 #include <dt-bindings/clock/qcom,rpmh.h>
23 * @unit: divisor used to convert Hz value to an RPMh msg
24 * @width: multiplier used to convert Hz value to an RPMh msg
36 * struct clk_rpmh - individual rpmh clock data structure
38 * @res_name: resource name for the rpmh clock
40 * @res_addr: base address of the rpmh resource within the RPMh
41 * @res_on_val: rpmh clock enable value
42 * @state: rpmh clock requested state
43 * @aggr_state: rpmh clock aggregated state
[all …]
/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sdx75-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sdx75-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SDX75
13 RPMh interconnect providers support system bandwidth requirements through
14 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
17 least one RPMh device child node pertaining to their RSC and each provider
18 can map to multiple RPMh resources.
42 - $ref: qcom,rpmh-common.yaml#
67 - description: RPMH CC QPIC Clock
78 #include <dt-bindings/clock/qcom,rpmh.h>
H A Dqcom,qdu1000-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,qdu1000-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on QDU1000
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
18 least one RPMh device child node pertaining to their RSC and each provider
19 can map to multiple RPMh resources.
35 - $ref: qcom,rpmh-common.yaml#
57 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
H A Dqcom,rpmh-common.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,rpmh-common.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
18 least one RPMh device child node pertaining to their RSC and each provider
19 can map to multiple RPMh resources.
32 this interconnect to send RPMh commands.
H A Dqcom,sm8650-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
18 least one RPMh device child node pertaining to their RSC and each provider
19 can map to multiple RPMh resources.
21 See also:: include/dt-bindings/interconnect/qcom,sm8650-rpmh.h
52 - $ref: qcom,rpmh-common.yaml#
103 - description: RPMH CC IPA clock
H A Dqcom,sm8550-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8550-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8550
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
18 least one RPMh device child node pertaining to their RSC and each provider
19 can map to multiple RPMh resources.
21 See also:: include/dt-bindings/interconnect/qcom,sm8550-rpmh.h
49 - $ref: qcom,rpmh-common.yaml#
100 - description: RPMH CC IPA clock
H A Dqcom,x1e80100-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,x1e80100-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on X1E80100
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
18 least one RPMh device child node pertaining to their RSC and each provider
19 can map to multiple RPMh resources.
21 See also:: include/dt-bindings/interconnect/qcom,x1e80100-rpmh.h
53 - $ref: qcom,rpmh-common.yaml#
H A Dqcom,sm7150-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm7150-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM7150
13 RPMh interconnect providers support system bandwidth requirements through
14 RPMh hardware accelerators known as Bus Clock Manager (BCM).
16 See also:: include/dt-bindings/interconnect/qcom,sm7150-rpmh.h
19 - $ref: qcom,rpmh-common.yaml#
46 - $ref: qcom,rpmh-common.yaml#
H A Dqcom,sm8450-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8450-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8450
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM).
45 - $ref: qcom,rpmh-common.yaml#
86 - description: RPMH CC IPA clock
107 #include <dt-bindings/clock/qcom,rpmh.h>
H A Dqcom,sc8280xp-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sc8280xp-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SC8280XP
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM).
39 - $ref: qcom,rpmh-common.yaml#
H A Dqcom,sc7280-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SC7280
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM).
46 - $ref: qcom,rpmh-common.yaml#
83 - description: RPMH CC IPA clock
H A Dqcom,sa8775p-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sa8775p-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SA8775P
13 RPMh interconnect providers support system bandwidth requirements through
14 RPMh hardware accelerators known as Bus Clock Manager (BCM).
40 - $ref: qcom,rpmh-common.yaml#
H A Dqcom,sm6350-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm6350-rpmh.yaml#
7 title: Qualcomm SM6350 RPMh Network-On-Chip Interconnect
13 Qualcomm RPMh-based interconnect provider on SM6350.
16 - $ref: qcom,rpmh-common.yaml#
41 $ref: qcom,rpmh-common.yaml#
H A Dqcom,rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
18 least one RPMh device child node pertaining to their RSC and each provider
19 can map to multiple RPMh resources.
110 - $ref: qcom,rpmh-common.yaml#
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,rpmh-rsc.yaml4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpmh-rsc.yaml#
7 title: Qualcomm RPMH RSC
13 Resource Power Manager Hardened (RPMH) is the mechanism for communicating
31 See also:: <dt-bindings/soc/qcom,rpmh-rsc.h>
42 Drivers that want to use the RSC to communicate with RPMH must specify their
47 const: qcom,rpmh-rsc
116 $ref: /schemas/regulator/qcom,rpmh-regulator.yaml#
141 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
144 compatible = "qcom,rpmh-rsc";
169 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
[all …]
H A Dqcom-stats.yaml22 - qcom,rpmh-stats
23 - qcom,sdm845-rpmh-stats
47 const: qcom,rpmh-stats
55 # Example of rpmh sleep stats
58 compatible = "qcom,rpmh-stats";
/linux/drivers/pmdomain/qcom/
H A Drpmhpd.c16 #include <soc/qcom/rpmh.h>
25 * struct rpmhpd - top level RPMh power domain resource data structure
26 * @dev: rpmh power domain controller device
71 /* RPMH powerdomains */
220 /* SA8540P RPMH powerdomains */
239 /* SA8775P RPMH power domains */
262 /* SDM670 RPMH powerdomains */
279 /* SDM845 RPMH powerdomains */
297 /* SDX55 RPMH powerdomains */
309 /* SDX65 RPMH powerdomains */
[all …]
H A DKconfig21 tristate "Qualcomm RPMh Power domain driver"
24 QCOM RPMh Power domain driver to support power-domains with
26 value to RPMh which then translates it into corresponding voltage
/linux/drivers/regulator/
H A Dqcom-rpmh-regulator.c19 #include <soc/qcom/rpmh.h>
21 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
24 * enum rpmh_regulator_type - supported RPMh accelerator types
25 * @VRM: RPMh VRM accelerator which supports voting on enable, voltage,
27 * @XOB: RPMh XOB accelerator which supports voting on the enable state
68 * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations
69 * @regulator_type: RPMh accelerator type used to manage this
99 * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a
101 * @dev: Device pointer for the top-level PMIC RPMh
103 * handle in RPMh write requests.
[all …]
/linux/drivers/soc/qcom/
H A Drpmh.c21 #include <soc/qcom/rpmh.h>
23 #include "rpmh-internal.h"
160 * __rpmh_write: Cache and send the RPMH request
166 * Cache the RPMH request and send if the state is ACTIVE_ONLY.
212 * rpmh_write_async: Write a set of RPMH commands
219 * Write a set of RPMH commands, the order of commands is maintained
244 * rpmh_write: Write a set of RPMH commands and block until response
306 * rpmh_write_batch: Write multiple sets of RPMH commands and wait for the
371 pr_err("Error(%d) sending RPMH message addr=%#x\n", in rpmh_write_batch()
459 pr_debug("%s: skipping RPMH req: a:%#x s:%#x w:%#x", in rpmh_flush()
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8550-samsung-q5q.dts11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
110 compatible = "qcom,pm8550-rpmh-regulators";
231 compatible = "qcom,pm8550vs-rpmh-regulators";
243 compatible = "qcom,pm8550vs-rpmh-regulators";
255 compatible = "qcom,pm8550vs-rpmh-regulators";
295 compatible = "qcom,pm8550ve-rpmh-regulators";
328 compatible = "qcom,pm8550vs-rpmh-regulators";
396 compatible = "qcom,pm8010-rpmh-regulators";
450 compatible = "qcom,pm8010-rpmh-regulators";
H A Dqcs8550-aim300.dtsi6 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 compatible = "qcom,pm8550-rpmh-regulators";
145 compatible = "qcom,pm8550vs-rpmh-regulators";
161 compatible = "qcom,pm8550vs-rpmh-regulators";
177 compatible = "qcom,pm8550vs-rpmh-regulators";
221 compatible = "qcom,pm8550ve-rpmh-regulators";
258 compatible = "qcom,pm8550vs-rpmh-regulators";
/linux/Documentation/devicetree/bindings/power/
H A Dqcom,rpmpd.yaml7 title: Qualcomm RPM/RPMh Power domains
13 For RPM/RPMh Power domains, we communicate a performance state to RPM/RPMh
85 // Example 1 (rpmh power domain controller and OPP table):

1234567891011