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/linux/arch/nios2/include/asm/
H A Dasm-macros.h14 * ANDs reg2 with mask and places the result in reg1.
16 * You cannnot use the same register for reg1 & reg2.
19 .macro ANDI32 reg1, reg2, mask
24 and \reg1, \reg1, \reg2
26 andi \reg1, \reg2, %lo(\mask)
29 andhi \reg1, \reg2, %hi(\mask)
34 * ORs reg2 with mask and places the result in reg1.
36 * It is safe to use the same register for reg1 & reg2.
39 .macro ORI32 reg1, reg2, mask
42 orhi \reg1, \reg2, %hi(\mask)
[all …]
/linux/arch/sparc/include/asm/
H A Dtsb.h99 #define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \ argument
100 661: casa [TSB] ASI_N, REG1, REG2; \
103 casa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \
106 #define TSB_CAS_TAG(TSB, REG1, REG2) \ argument
107 661: casxa [TSB] ASI_N, REG1, REG2; \
110 casxa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \
120 #define TSB_LOCK_TAG(TSB, REG1, REG2) \ argument
122 sethi %hi(TSB_TAG_LOCK_HIGH), REG2;\
123 andcc REG1, REG2, %g0; \
126 TSB_CAS_TAG_HIGH(TSB, REG1, REG2); \
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H A Dtrap_block.h176 * area base of the current processor into DEST. REG1, REG2, and REG3 are
184 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \ argument
186 sethi %hi(trap_block), REG2; \
188 or REG2, %lo(trap_block), REG2; \
189 add REG2, REG1, REG2; \
190 ldx [REG2 + TRAP_PER_CPU_PER_CPU_BASE], DEST;
213 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) argument
/linux/arch/arm64/include/asm/
H A Dkvm_ptrauth.h26 .macro ptrauth_save_state base, reg1, reg2
28 mrs_s \reg2, SYS_APIAKEYHI_EL1
29 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APIAKEYLO_EL1)]
31 mrs_s \reg2, SYS_APIBKEYHI_EL1
32 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APIBKEYLO_EL1)]
34 mrs_s \reg2, SYS_APDAKEYHI_EL1
35 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APDAKEYLO_EL1)]
37 mrs_s \reg2, SYS_APDBKEYHI_EL1
38 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APDBKEYLO_EL1)]
40 mrs_s \reg2, SYS_APGAKEYHI_EL1
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/linux/arch/arm/probes/kprobes/
H A Dtest-core.h239 #define TEST_RR(code1, reg1, val1, code2, reg2, val2, code3) \ argument
240 TESTCASE_START(code1 #reg1 code2 #reg2 code3) \
242 TEST_ARG_REG(reg2, val2) \
244 TEST_INSTRUCTION(code1 #reg1 code2 #reg2 code3) \
247 #define TEST_RRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\ argument
248 TESTCASE_START(code1 #reg1 code2 #reg2 code3 #reg3 code4) \
250 TEST_ARG_REG(reg2, val2) \
253 TEST_INSTRUCTION(code1 #reg1 code2 #reg2 code3 #reg3 code4) \
256 #define TEST_RRRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4, reg4, val4) \ argument
257 TESTCASE_START(code1 #reg1 code2 #reg2 code3 #reg3 code4 #reg4) \
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/linux/arch/arm/lib/
H A Dcopy_from_user.S46 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
48 ldr1w \ptr, \reg2, \abort
53 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
54 ldr4w \ptr, \reg1, \reg2, \reg3, \reg4, \abort
66 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
67 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4})
70 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
71 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
86 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
87 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
H A Dcopy_to_user.S40 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
41 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
44 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
45 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
64 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
66 str1w \ptr, \reg2, \abort
83 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
84 USERL(\abort, stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
H A Dcsumpartialcopy.S29 .macro load2b, reg1, reg2 argument
31 ldrb \reg2, [r0], #1
38 .macro load2l, reg1, reg2 argument
40 ldr \reg2, [r0], #4
43 .macro load4l, reg1, reg2, reg3, reg4
44 ldmia r0!, {\reg1, \reg2, \reg3, \reg4}
H A Dmemcpy.S21 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
22 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
25 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
26 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
37 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
38 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
H A Dcsumpartialcopyuser.S60 .macro load2b, reg1, reg2 argument
62 ldrusr \reg2, r0, 1
69 .macro load2l, reg1, reg2 argument
71 ldrusr \reg2, r0, 4
74 .macro load4l, reg1, reg2, reg3, reg4
76 ldrusr \reg2, r0, 4
/linux/sound/soc/codecs/
H A Drt700-sdw.c90 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; in rt700_sdw_read() local
106 reg2 = reg + 0x1000; in rt700_sdw_read()
107 reg2 |= 0x80; in rt700_sdw_read()
108 ret = regmap_write(rt700->sdw_regmap, reg2, val2); in rt700_sdw_read()
134 reg2 = reg + 0x1000; in rt700_sdw_read()
135 reg2 |= 0x80; in rt700_sdw_read()
136 ret = regmap_write(rt700->sdw_regmap, reg2, (*val & 0xff)); in rt700_sdw_read()
140 reg2 = reg - 0x1000; in rt700_sdw_read()
141 reg2 &= ~0x80; in rt700_sdw_read()
143 reg2, ((*val >> 8) & 0xff)); in rt700_sdw_read()
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H A Drt715-sdw.c153 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; in rt715_sdw_read() local
169 reg2 = reg + 0x1000; in rt715_sdw_read()
170 reg2 |= 0x80; in rt715_sdw_read()
171 ret = regmap_write(rt715->sdw_regmap, reg2, val2); in rt715_sdw_read()
197 reg2 = reg + 0x1000; in rt715_sdw_read()
198 reg2 |= 0x80; in rt715_sdw_read()
199 ret = regmap_write(rt715->sdw_regmap, reg2, (*val & 0xff)); in rt715_sdw_read()
203 reg2 = reg - 0x1000; in rt715_sdw_read()
204 reg2 &= ~0x80; in rt715_sdw_read()
205 ret = regmap_write(rt715->sdw_regmap, reg2, in rt715_sdw_read()
275 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2; rt715_sdw_write() local
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H A Drt711-sdw.c96 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; in rt711_sdw_read() local
112 reg2 = reg + 0x1000; in rt711_sdw_read()
113 reg2 |= 0x80; in rt711_sdw_read()
114 ret = regmap_write(rt711->sdw_regmap, reg2, val2); in rt711_sdw_read()
140 reg2 = reg + 0x1000; in rt711_sdw_read()
141 reg2 |= 0x80; in rt711_sdw_read()
142 ret = regmap_write(rt711->sdw_regmap, reg2, (*val & 0xff)); in rt711_sdw_read()
146 reg2 = reg - 0x1000; in rt711_sdw_read()
147 reg2 &= ~0x80; in rt711_sdw_read()
149 reg2, ((*val >> 8) & 0xff)); in rt711_sdw_read()
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/linux/arch/s390/include/asm/
H A Dap.h139 unsigned long reg2; in ap_tapq() local
146 " lgr %[reg2],2\n" /* gr2 into reg2 */ in ap_tapq()
147 : [reg1] "=&d" (reg1.value), [reg2] "=&d" (reg2) in ap_tapq()
151 info->value = reg2; in ap_tapq()
256 struct ap_config_info *reg2 = config; in ap_qci() local
260 " lgr 2,%[reg2]\n" /* ptr to config into gr2 */ in ap_qci()
266 : [reg0] "d" (reg0), [reg2] "d" (reg2) in ap_qci()
309 unsigned long reg2 = pa_ind; in ap_aqic() local
316 " lgr 2,%[reg2]\n" /* ni addr into gr2 */ in ap_aqic()
320 : [reg0] "d" (reg0), [reg2] "d" (reg2) in ap_aqic()
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/linux/arch/x86/events/intel/
H A Duncore_nhmex.c355 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; in nhmex_bbox_hw_config() local
374 reg2->config = event->attr.config2; in nhmex_bbox_hw_config()
382 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; in nhmex_bbox_msr_enable_event() local
386 wrmsrl(reg1->reg + 1, reg2->config); in nhmex_bbox_msr_enable_event()
446 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; in nhmex_sbox_hw_config() local
459 reg2->config = event->attr.config2; in nhmex_sbox_hw_config()
467 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; in nhmex_sbox_msr_enable_event() local
472 wrmsrl(reg1->reg + 2, reg2->config); in nhmex_sbox_msr_enable_event()
673 struct hw_perf_event_extra *reg2 = &event->hw.branch_reg; in nhmex_mbox_get_constraint() local
694 if (reg2->idx != EXTRA_REG_NONE && in nhmex_mbox_get_constraint()
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/linux/drivers/rtc/
H A Drtc-aspeed.c26 u32 reg1, reg2; in aspeed_rtc_read_time() local
34 reg2 = readl(rtc->base + RTC_YEAR); in aspeed_rtc_read_time()
36 } while (reg2 != readl(rtc->base + RTC_YEAR)); in aspeed_rtc_read_time()
43 cent = (reg2 >> 16) & 0x1f; in aspeed_rtc_read_time()
44 year = (reg2 >> 8) & 0x7f; in aspeed_rtc_read_time()
45 tm->tm_mon = ((reg2 >> 0) & 0x0f) - 1; in aspeed_rtc_read_time()
56 u32 reg1, reg2, ctrl; in aspeed_rtc_set_time() local
65 reg2 = ((cent & 0x1f) << 16) | ((year & 0x7f) << 8) | in aspeed_rtc_set_time()
72 writel(reg2, rtc->base + RTC_YEAR); in aspeed_rtc_set_time()
/linux/arch/parisc/net/
H A Dbpf_jit.h103 #define hppa_or(reg1, reg2, target) \ argument
104 hppa_t6_insn(0x02, reg2, reg1, 0, 0, 0x09, target) /* or reg1,reg2,target */
105 #define hppa_or_cond(reg1, reg2, cond, f, target) \ argument
106 hppa_t6_insn(0x02, reg2, reg1, cond, f, 0x09, target)
107 #define hppa_and(reg1, reg2, target) \ argument
108 hppa_t6_insn(0x02, reg2, reg1, 0, 0, 0x08, target) /* and reg1,reg2,target */
109 #define hppa_and_cond(reg1, reg2, cond, f, target) \ argument
110 hppa_t6_insn(0x02, reg2, reg1, cond, f, 0x08, target)
111 #define hppa_xor(reg1, reg2, target) \ argument
112 hppa_t6_insn(0x02, reg2, reg1, 0, 0, 0x0a, target) /* xor reg1,reg2,target */
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/linux/arch/s390/boot/
H A Dphysmem_info.c62 unsigned long reg1, reg2, ry; in __diag260() local
73 " epsw %[reg1],%[reg2]\n" in __diag260()
75 " st %[reg2],4(%[psw_pgm])\n" in __diag260()
85 [reg2] "=&a" (reg2), in __diag260()
121 unsigned long reg1, reg2; in diag500_storage_limit() local
126 " epsw %[reg1],%[reg2]\n" in diag500_storage_limit()
128 " st %[reg2],4(%[psw_pgm])\n" in diag500_storage_limit()
137 [reg2] "=&a" (reg2), in diag500_storage_limit()
154 unsigned long reg1, reg2; in tprot() local
161 " epsw %[reg1],%[reg2]\n" in tprot()
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/linux/arch/powerpc/kernel/
H A Dkvm_emul.S20 #define LL64(reg, offs, reg2) ld reg, (offs)(reg2) argument
21 #define STL64(reg, offs, reg2) std reg, (offs)(reg2) argument
23 #define LL64(reg, offs, reg2) lwz reg, (offs + 4)(reg2) argument
24 #define STL64(reg, offs, reg2) stw reg, (offs + 4)(reg2) argument
/linux/arch/arm/kernel/
H A Dhyp-stub.S31 .macro store_primary_cpu_mode reg1, reg2 argument
34 str_l \reg1, __boot_cpu_mode, \reg2
43 .macro compare_cpu_mode_with_primary mode, reg1, reg2 argument
44 adr_l \reg2, __boot_cpu_mode
45 ldr \reg1, [\reg2]
48 strne \reg1, [\reg2] @ record what happened and give up
53 .macro store_primary_cpu_mode reg1:req, reg2:req
60 .macro compare_cpu_mode_with_primary mode, reg1, reg2 argument
/linux/drivers/gpu/drm/i915/display/
H A Dintel_pmdemand.c425 u32 reg1, reg2; in intel_pmdemand_init_pmdemand_params() local
440 reg2 = intel_de_read(display, XELPDP_INITIATE_PMDEMAND_REQUEST(1)); in intel_pmdemand_init_pmdemand_params()
452 REG_FIELD_GET(XELPDP_PMDEMAND_CDCLK_FREQ_MASK, reg2); in intel_pmdemand_init_pmdemand_params()
454 REG_FIELD_GET(XELPDP_PMDEMAND_DDICLK_FREQ_MASK, reg2); in intel_pmdemand_init_pmdemand_params()
466 REG_FIELD_GET(XELPDP_PMDEMAND_SCALERS_MASK, reg2); in intel_pmdemand_init_pmdemand_params()
519 u32 *reg1, u32 *reg2, bool serialized) in intel_pmdemand_update_params() argument
555 update_reg(reg2, cdclk_freq_mhz, XELPDP_PMDEMAND_CDCLK_FREQ_MASK); in intel_pmdemand_update_params()
556 update_reg(reg2, ddiclk_max, XELPDP_PMDEMAND_DDICLK_FREQ_MASK); in intel_pmdemand_update_params()
557 update_reg(reg2, plls, XELPDP_PMDEMAND_PLLS_MASK); in intel_pmdemand_update_params()
565 update_reg(reg2, scalers, XELPDP_PMDEMAND_SCALERS_MASK); in intel_pmdemand_update_params()
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/linux/drivers/media/dvb-frontends/
H A Dtua6100.c65 u8 reg2[] = { 0x02, 0x00, 0x00 }; in tua6100_set_params() local
68 struct i2c_msg msg2 = { .addr = priv->i2c_address, .flags = 0, .buf = reg2, .len = 3 }; in tua6100_set_params()
92 reg2[1] = (_R_VAL >> 8) & 0x03; in tua6100_set_params()
93 reg2[2] = _R_VAL; in tua6100_set_params()
95 reg2[1] |= 0x1c; in tua6100_set_params()
97 reg2[1] |= 0x0c; in tua6100_set_params()
99 reg2[1] |= 0x1c; in tua6100_set_params()
/linux/drivers/gpu/drm/amd/display/dc/irq/dcn401/
H A Dirq_service_dcn401.c189 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
197 .ack_reg = SRI(reg2, block, reg_num),\
199 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK,\
201 block ## reg_num ## _ ## reg2 ## __ ## mask2 ## _MASK \
203 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument
211 .ack_reg = SRI_DMUB(reg2),\
213 reg2 ## __ ## mask2 ## _MASK,\
215 reg2 ## __ ## mask2 ## _MASK \
/linux/arch/arm64/lib/
H A Dcopy_from_user.S47 .macro ldp1 reg1, reg2, ptr, val
48 user_ldp 9997f, \reg1, \reg2, \ptr, \val
51 .macro stp1 reg1, reg2, ptr, val
52 stp \reg1, \reg2, [\ptr], \val
H A Dcopy_to_user.S46 .macro ldp1 reg1, reg2, ptr, val
47 ldp \reg1, \reg2, [\ptr], \val
50 .macro stp1 reg1, reg2, ptr, val
51 user_stp 9997f, \reg1, \reg2, \ptr, \val

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