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/freebsd/crypto/openssl/crypto/aria/
H A Daria.c474 register uint32_t reg0, reg1, reg2, reg3; in ossl_aria_encrypt() local
491 reg2 = GET_U32_BE(in, 2); in ossl_aria_encrypt()
494 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
497 ARIA_SUBST_DIFF_ODD(reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
498 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
502 ARIA_SUBST_DIFF_EVEN(reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
503 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
506 ARIA_SUBST_DIFF_ODD(reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
507 ARIA_ADD_ROUND_KEY(rk, reg0, reg1, reg2, reg3); in ossl_aria_encrypt()
521 reg2 = rk->u[2] ^ MAKE_U32( in ossl_aria_encrypt()
[all …]
/freebsd/sys/arm/ti/am335x/
H A Dam335x_pmic.c142 struct tps65217_chgconfig2_reg reg2; in am335x_pmic_dump_chgconfig() local
176 am335x_pmic_read(dev, TPS65217_CHGCONFIG2_REG, (uint8_t *)&reg2, 1); in am335x_pmic_dump_chgconfig()
177 device_printf(dev, " Charge voltage: %s\n", tps65217_voreg_c[reg2.voreg]); in am335x_pmic_dump_chgconfig()
179 vprechg_c[reg2.vprechg]); in am335x_pmic_dump_chgconfig()
180 device_printf(dev, " Dynamic timer function: %s\n", d_e[reg2.dyntmr]); in am335x_pmic_dump_chgconfig()
193 struct tps65217_chgconfig2_reg reg2; in am335x_pmic_setvo() local
195 am335x_pmic_read(dev, TPS65217_CHGCONFIG2_REG, (uint8_t *)&reg2, 1); in am335x_pmic_setvo()
196 reg2.voreg = vo; in am335x_pmic_setvo()
197 am335x_pmic_write(dev, TPS65217_CHGCONFIG2_REG, (uint8_t *)&reg2, 1); in am335x_pmic_setvo()
/freebsd/crypto/openssl/crypto/perlasm/
H A Dx86gas.pl77 { my($addr,$reg1,$reg2,$idx)=@_;
80 if (!defined($idx) && 1*$reg2) { $idx=$reg2; $reg2=$reg1; undef $reg1; }
87 $reg2 = "%$reg2" if ($reg2);
91 if ($reg2)
93 $ret .= "($reg1,$reg2,$idx)";
H A Dx86nasm.pl43 { my($size,$addr,$reg1,$reg2,$idx)=@_;
46 if (!defined($idx) && 1*$reg2) { $idx=$reg2; $reg2=$reg1; undef $reg1; }
66 if ($reg2 ne "")
68 $ret .= "$reg2*$idx";
H A Dx86masm.pl46 { my($size,$addr,$reg1,$reg2,$idx)=@_;
49 if (!defined($idx) && 1*$reg2) { $idx=$reg2; $reg2=$reg1; undef $reg1; }
65 if ($reg2 ne "")
67 $ret .= "$reg2*$idx";
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/AsmParser/
H A DSystemZAsmParser.cpp428 Register &Reg2, const MCExpr *&Disp, const MCExpr *&Length,
988 // Parse a memory operand into Reg1, Reg2, Disp, and Length.
990 bool &HaveReg2, Register &Reg2, in parseAddress() argument
1017 // The restriction only applies to the first Register (i.e. Reg1). Reg2 is in parseAddress()
1065 if (parseIntegerRegister(Reg2, RegGR)) in parseAddress()
1068 if (isParsingATT() && parseRegister(Reg2)) in parseAddress()
1102 Register Reg1, Reg2; in parseAddress() local
1109 if (parseAddress(HaveReg1, Reg1, HaveReg2, Reg2, Disp, Length, HasLength, in parseAddress()
1128 // There must be no Reg2. in parseAddress()
1144 // If we have Reg2, it must be an address register. in parseAddress()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp683 unsigned Reg2 = *MRI.getLLVMRegNum(Inst2.getRegister(), true); in generateCompactUnwindEncoding() local
698 Reg2 = getXRegFromWReg(Reg2); in generateCompactUnwindEncoding()
700 if (Reg1 == AArch64::X19 && Reg2 == AArch64::X20 && in generateCompactUnwindEncoding()
703 else if (Reg1 == AArch64::X21 && Reg2 == AArch64::X22 && in generateCompactUnwindEncoding()
706 else if (Reg1 == AArch64::X23 && Reg2 == AArch64::X24 && in generateCompactUnwindEncoding()
709 else if (Reg1 == AArch64::X25 && Reg2 == AArch64::X26 && in generateCompactUnwindEncoding()
712 else if (Reg1 == AArch64::X27 && Reg2 == AArch64::X28 && in generateCompactUnwindEncoding()
717 Reg2 = getDRegFromBReg(Reg2); in generateCompactUnwindEncoding()
723 if (Reg1 == AArch64::D8 && Reg2 == AArch64::D9 && in generateCompactUnwindEncoding()
726 else if (Reg1 == AArch64::D10 && Reg2 == AArch64::D11 && in generateCompactUnwindEncoding()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Drockchip,rk806.yaml40 The input supply for dcdc-reg2.
76 The input supply for pldo-reg1, pldo-reg2 and pldo-reg3.
84 The input supply for nldo-reg1, nldo-reg2 and nldo-reg3.
171 vdd_npu_s0: dcdc-reg2 {
291 vdd1_1v8_ddr_s3: pldo-reg2 {
366 vdd2l_0v9_ddr_s3: nldo-reg2 {
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_hsi_rdma.h98 __le32 fbo_hi /* reg2 */;
155 __le32 fbo_hi /* reg2 */;
227 __le32 reg2 /* reg2 */; member
462 __le32 reg2 /* reg2 */; member
1008 __le32 reg2 /* reg2 */; member
1137 __le32 reg2 /* reg2 */; member
1233 __le32 reg2 /* reg2 */; member
1300 __le32 cq_prod /* reg2 */;
1529 __le32 reg2 /* reg2 */; member
1577 __le32 reg2 /* reg2 */; member
[all …]
H A Decore_hsi_iscsi.h292 __le32 reg2 /* reg2 */; member
411 __le32 rx_tcp_checksum_err_cnt /* reg2 */;
487 __le32 reg2 /* reg2 */; member
805 __le32 reg2 /* reg2 */; member
955 __le32 reg2 /* reg2 */; member
1040 __le32 reg2 /* reg2 */; member
1159 __le32 reg2 /* reg2 */; member
1204 __le32 reg2 /* reg2 */; member
H A Decore_hsi_roce.h656 __le32 snd_max_psn /* reg2 */;
761 __le32 reg2 /* reg2 */; member
844 __le32 reg2 /* reg2 */; member
914 __le32 reg2 /* reg2 */; member
1143 __le32 snd_una_psn /* reg2 */;
1375 __le32 psn /* reg2 */;
1423 __le32 reg2 /* reg2 */; member
1468 __le32 reg2 /* reg2 */; member
1695 __le32 snd_una_psn /* reg2 */;
1917 __le32 snd_max_psn /* reg2 */;
[all …]
H A Decore_hsi_fcoe.h463 __le32 reg2 /* reg2 */; member
641 __le32 reg2 /* reg2 */; member
1010 __le32 reg2 /* reg2 */; member
1219 __le32 reg2 /* reg2 */; member
1384 __le32 reg2 /* reg2 */; member
1429 __le32 reg2 /* reg2 */; member
H A Decore_hsi_iwarp.h294 __le32 reg2 /* reg2 */; member
413 __le32 unaligned_nxt_seq /* reg2 */;
700 __le32 reg2 /* reg2 */; member
850 __le32 unaligned_nxt_seq /* reg2 */;
1331 __le32 cq_prod /* reg2 */;
1378 __le32 reg2 /* reg2 */; member
1496 __le32 cq_prod /* reg2 */;
1543 __le32 reg2 /* reg2 */; member
H A Decore_hsi_eth.h285 __le32 reg2 /* reg2 */; member
373 __le32 reg2 /* reg2 */; member
463 __le32 reg2 /* reg2 */; member
546 __le32 reg2 /* reg2 */; member
811 __le32 reg2 /* reg2 */; member
967 __le32 reg2 /* reg2 */; member
1026 __le32 reg2 /* reg2 */; member
1106 __le32 reg2 /* reg2 */; member
1988 __le32 reg2 /* reg2 */; member
2477 __le32 reg2 /* reg2 */; member
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64LowerHomogeneousPrologEpilog.cpp202 /// If Reg2 is AArch64::NoRegister, emit STR instead.
205 const TargetInstrInfo &TII, unsigned Reg1, unsigned Reg2, in emitStore() argument
208 const bool IsPaired = Reg2 != AArch64::NoRegister; in emitStore()
210 assert(!(IsFloat ^ AArch64::FPR64RegClass.contains(Reg2))); in emitStore()
235 MIB.addReg(Reg2); in emitStore()
243 /// If Reg2 is AArch64::NoRegister, emit LDR instead.
246 const TargetInstrInfo &TII, unsigned Reg1, unsigned Reg2, in emitLoad() argument
249 const bool IsPaired = Reg2 != AArch64::NoRegister; in emitLoad()
251 assert(!(IsFloat ^ AArch64::FPR64RegClass.contains(Reg2))); in emitLoad()
276 MIB.addReg(Reg2, getDefRegState(true)); in emitLoad()
H A DAArch64PBQPRegAlloc.cpp142 bool haveSameParity(unsigned reg1, unsigned reg2) { in haveSameParity() argument
145 assert(AArch64InstrInfo::isFpOrNEON(reg2) && in haveSameParity()
146 "Expecting an FP register for reg2"); in haveSameParity()
148 return isOdd(reg1) == isOdd(reg2); in haveSameParity()
/freebsd/contrib/one-true-awk/testdir/
H A DT.recache27 reg2 = "A"
28 sub(reg1, x ~ reg2 ? "B" : "b", x)
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsAsmPrinter.h94 unsigned Reg1, unsigned Reg2);
97 unsigned Reg1, unsigned Reg2, unsigned Reg3);
100 unsigned Reg1, unsigned Reg2, unsigned FPReg1,
H A DMicroMipsSizeReduction.cpp377 // Returns true if the registers Reg1 and Reg2 are consecutive
378 static bool ConsecutiveRegisters(unsigned Reg1, unsigned Reg2) { in ConsecutiveRegisters() argument
388 if (Registers[i + 1] == Reg2) in ConsecutiveRegisters()
407 Register Reg2 = MI2->getOperand(0).getReg(); in ConsecutiveInstr() local
409 return ((Offset1 == (Offset2 - 4)) && (ConsecutiveRegisters(Reg1, Reg2))); in ConsecutiveInstr()
479 Register Reg2 = MI2->getOperand(1).getReg(); in ReduceXWtoXWP() local
481 if (Reg1 != Reg2) in ReduceXWtoXWP()
/freebsd/sys/contrib/dev/rtw88/
H A Dmain.c2355 const struct rtw_hw_reg *reg2, u8 nbytes) in rtw_swap_reg_nbytes() argument
2361 u8 v2 = rtw_read8(rtwdev, reg2->addr + i); in rtw_swap_reg_nbytes()
2364 rtw_write8(rtwdev, reg2->addr + i, v1); in rtw_swap_reg_nbytes()
2370 const struct rtw_hw_reg *reg2) in rtw_swap_reg_mask() argument
2375 v2 = rtw_read32_mask(rtwdev, reg2->addr, reg2->mask); in rtw_swap_reg_mask()
2376 rtw_write32_mask(rtwdev, reg2->addr, reg2->mask, v1); in rtw_swap_reg_mask()
2391 const struct rtw_hw_reg *reg1, *reg2; in rtw_port_switch_iter() local
2403 reg2 = &rtwvif_target->conf->net_type; in rtw_port_switch_iter()
2404 rtw_swap_reg_mask(rtwdev, reg1, reg2); in rtw_port_switch_iter()
2407 reg2 = &rtwvif_target->conf->mac_addr; in rtw_port_switch_iter()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dact8865-regulator.txt23 - vp2-supply: The input supply for REG2
43 REG1, REG2, REG3, REG4, REG5, REG6, REG7, REG8, REG9, REG10, REG11, REG12
H A Dactive-semi,act8846.yaml44 description: Handle to the VP2 input supply (REG2)
89 REG2 {
/freebsd/contrib/llvm-project/libunwind/src/
H A DDwarfParser.hpp455 uint64_t reg2; in parseFDEInstructions() local
540 reg2 = addressSpace.getULEB128(p, instructionsEnd); in parseFDEInstructions()
546 if (reg2 > kMaxRegisterNumber) { in parseFDEInstructions()
548 "malformed DW_CFA_register DWARF unwind, reg2 too big"); in parseFDEInstructions()
551 results->setRegister(reg, kRegisterInRegister, (int64_t)reg2, in parseFDEInstructions()
554 "DW_CFA_register(reg=%" PRIu64 ", reg2=%" PRIu64 ")\n", reg, reg2); in parseFDEInstructions()
/freebsd/sys/contrib/openzfs/module/zfs/
H A Dvdev_raidz_math_avx2.c56 #define R_01(REG1, REG2, ...) REG1, REG2 argument
57 #define _R_23(_0, _1, REG2, REG3, ...) REG2, REG3 argument
H A Dvdev_raidz_math_avx512bw.c60 #define R_01(REG1, REG2, ...) REG1, REG2 argument
61 #define _R_23(_0, _1, REG2, REG3, ...) REG2, REG3 argument

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