Searched full:r9a07g044_ssi0_rst_m2_reg (Results 1 – 4 of 4) sorted by relevance
125 resets = <&cpg R9A07G044_SSI0_RST_M2_REG>;
185 #define R9A07G044_SSI0_RST_M2_REG 50 macro
401 DEF_RST(R9A07G044_SSI0_RST_M2_REG, 0x870, 0),
259 resets = <&cpg R9A07G044_SSI0_RST_M2_REG>;