1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Trace, Profiling and Diagnostics Monitor - TPDM 9 10description: | 11 The TPDM or Monitor serves as data collection component for various dataset 12 types specified in the QPMDA spec. It covers Implementation defined ((ImplDef), 13 Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete 14 Single Bit (DSB). It performs data collection in the data producing clock 15 domain and transfers it to the data collection time domain, generally ATB 16 clock domain. 17 18 The primary use case of the TPDM is to collect data from different data 19 sources and send it to a TPDA for packetization, timestamping, and funneling. 20 21maintainers: 22 - Mao Jinlong <quic_jinlmao@quicinc.com> 23 - Tao Zhang <quic_taozha@quicinc.com> 24 25# Need a custom select here or 'arm,primecell' will match on lots of nodes 26select: 27 properties: 28 compatible: 29 contains: 30 enum: 31 - qcom,coresight-tpdm 32 required: 33 - compatible 34 35properties: 36 $nodename: 37 pattern: "^tpdm(@[0-9a-f]+)$" 38 compatible: 39 items: 40 - const: qcom,coresight-tpdm 41 - const: arm,primecell 42 43 reg: 44 minItems: 1 45 maxItems: 2 46 47 qcom,dsb-element-bits: 48 description: 49 Specifies the DSB(Discrete Single Bit) element size supported by 50 the monitor. The associated aggregator will read this size before it 51 is enabled. DSB element size currently only supports 32-bit and 64-bit. 52 enum: [32, 64] 53 54 qcom,cmb-element-bits: 55 description: 56 Specifies the CMB(Continuous Multi-Bit) element size supported by 57 the monitor. The associated aggregator will read this size before it 58 is enabled. CMB element size currently only supports 8-bit, 32-bit 59 and 64-bit. 60 enum: [8, 32, 64] 61 62 qcom,dsb-msrs-num: 63 description: 64 Specifies the number of DSB(Discrete Single Bit) MSR(mux select register) 65 registers supported by the monitor. If this property is not configured 66 or set to 0, it means this DSB TPDM doesn't support MSR. 67 $ref: /schemas/types.yaml#/definitions/uint32 68 minimum: 0 69 maximum: 32 70 71 qcom,cmb-msrs-num: 72 description: 73 Specifies the number of CMB MSR(mux select register) registers supported 74 by the monitor. If this property is not configured or set to 0, it means 75 this TPDM doesn't support CMB MSR. 76 $ref: /schemas/types.yaml#/definitions/uint32 77 minimum: 0 78 maximum: 32 79 80 clocks: 81 maxItems: 1 82 83 clock-names: 84 items: 85 - const: apb_pclk 86 87 out-ports: 88 description: | 89 Output connections from the TPDM to coresight funnel/TPDA. 90 $ref: /schemas/graph.yaml#/properties/ports 91 92 properties: 93 port: 94 description: Output connection from the TPDM to coresight 95 funnel/TPDA. 96 $ref: /schemas/graph.yaml#/properties/port 97 98required: 99 - compatible 100 - reg 101 - clocks 102 - clock-names 103 104additionalProperties: false 105 106examples: 107 # minimum TPDM definition. TPDM connect to coresight TPDA. 108 - | 109 tpdm@684c000 { 110 compatible = "qcom,coresight-tpdm", "arm,primecell"; 111 reg = <0x0684c000 0x1000>; 112 113 qcom,dsb-element-bits = <32>; 114 qcom,dsb-msrs-num = <16>; 115 116 clocks = <&aoss_qmp>; 117 clock-names = "apb_pclk"; 118 119 out-ports { 120 port { 121 tpdm_prng_out_tpda_qdss: endpoint { 122 remote-endpoint = 123 <&tpda_qdss_in_tpdm_prng>; 124 }; 125 }; 126 }; 127 }; 128 129 tpdm@6c29000 { 130 compatible = "qcom,coresight-tpdm", "arm,primecell"; 131 reg = <0x06c29000 0x1000>; 132 133 qcom,cmb-element-bits = <64>; 134 qcom,cmb-msrs-num = <32>; 135 136 clocks = <&aoss_qmp>; 137 clock-names = "apb_pclk"; 138 139 out-ports { 140 port { 141 tpdm_ipcc_out_funnel_center: endpoint { 142 remote-endpoint = <&funnel_center_in_tpdm_ipcc>; 143 }; 144 }; 145 }; 146 }; 147... 148