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/linux/drivers/soc/qcom/
H A Dqcom_aoss.c73 * @qdss_clk: QDSS clock hw struct
282 static const char *buf = "{class: clock, res: qdss, val: 1}"; in qmp_qdss_clk_prepare()
290 static const char *buf = "{class: clock, res: qdss, val: 0}"; in qmp_qdss_clk_unprepare()
305 .name = "qdss", in qmp_qdss_clk_add()
312 dev_err(qmp->dev, "failed to register qdss clock\n"); in qmp_qdss_clk_add()
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,aoss-qmp.yaml73 The single clock represents the QDSS clock.
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sdm670-tlmm.yaml76 pll_reset, pri_mi2s, pri_mi2s_ws, prng_rosc, qdss_cti, qdss, qlink_enable,
H A Dqcom,sm6125-tlmm.yaml83 pri_mi2s, pri_mi2s_ws, prng_rosc, qca_sb, qdss_cti, qdss, qlink_enable,
H A Dqcom,sc7280-pinctrl.yaml88 qdss, qdss_cti, qlink0_enable, qlink0_request, qlink0_wmss,
H A Dqcom,sm7150-tlmm.yaml87 pri_mi2s_ws, prng_rosc, qdss, qdss_cti, qlink_enable,
H A Dqcom,sc7180-pinctrl.yaml87 pll_bypassnl, pll_reset, prng_rosc, qdss, qdss_cti,
H A Dqcom,sdm845-pinctrl.yaml86 pri_mi2s, pri_mi2s_ws, prng_rosc, qdss, qdss_cti, qlink_enable,
H A Dqcom,sm8150-pinctrl.yaml87 pri_mi2s, pri_mi2s_ws, prng_rosc, qdss, qdss_cti,
H A Dqcom,msm8998-pinctrl.yaml95 qdss_cti1_a, qdss_cti1_b, qdss, qlink_enable, qlink_request,
/linux/Documentation/devicetree/bindings/net/wireless/
H A Dqcom,ath10k.yaml273 - const: qdss
/linux/drivers/clk/qcom/
H A Dclk-smd-rpm.c442 DEFINE_CLK_SMD_RPM_BRANCH(qdss, QCOM_SMD_RPM_MISC_CLK, 1, 19200000);
443 DEFINE_CLK_SMD_RPM_QDSS(qdss, QCOM_SMD_RPM_MISC_CLK, 1);
/linux/arch/arm64/boot/dts/qcom/
H A Dsdx75.dtsi369 qdss_mem: qdss@88500000 {
H A Dsdm630.dtsi1050 "qdss",