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/linux/drivers/gpu/drm/vmwgfx/device_include/
H A Dsvga3d_dx.h132 #pragma pack(push, 1)
139 #pragma pack(push, 1)
145 #pragma pack(push, 1)
151 #pragma pack(push, 1)
159 #pragma pack(push, 1)
165 #pragma pack(push, 1)
171 #pragma pack(push, 1)
181 #pragma pack(push, 1)
189 #pragma pack(push, 1)
207 #pragma pack(push, 1)
[all …]
H A Dsvga3d_cmd.h335 #pragma pack(push, 1)
342 #pragma pack(push, 1)
348 #pragma pack(push, 1)
359 #pragma pack(push, 1)
372 #pragma pack(push, 1)
378 #pragma pack(push, 1)
384 #pragma pack(push, 1)
390 #pragma pack(push, 1)
401 #pragma pack(push, 1)
420 #pragma pack(push, 1)
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/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dwndwc37e.c42 struct nvif_push *push = &wndw->wndw.push; in wndwc37e_csc_set() local
45 if ((ret = PUSH_WAIT(push, 13))) in wndwc37e_csc_set()
48 PUSH_MTHD(push, NVC37E, SET_CSC_RED2RED, asyw->csc.matrix, 12); in wndwc37e_csc_set()
55 struct nvif_push *push = &wndw->wndw.push; in wndwc37e_ilut_clr() local
58 if ((ret = PUSH_WAIT(push, 2))) in wndwc37e_ilut_clr()
61 PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_INPUT_LUT, 0x00000000); in wndwc37e_ilut_clr()
68 struct nvif_push *push = &wndw->wndw.push; in wndwc37e_ilut_set() local
71 if ((ret = PUSH_WAIT(push, 4))) in wndwc37e_ilut_set()
74 PUSH_MTHD(push, NVC37E, SET_CONTROL_INPUT_LUT, in wndwc37e_ilut_set()
97 struct nvif_push *push = &wndw->wndw.push; in wndwc37e_blend_set() local
[all …]
H A Dheadc37d.c33 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc37d_or() local
52 if ((ret = PUSH_WAIT(push, 2))) in headc37d_or()
55 PUSH_MTHD(push, NVC37D, HEAD_SET_CONTROL_OUTPUT_RESOURCE(i), in headc37d_or()
67 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc37d_procamp() local
71 if ((ret = PUSH_WAIT(push, 2))) in headc37d_procamp()
74 PUSH_MTHD(push, NVC37D, HEAD_SET_PROCAMP(i), in headc37d_procamp()
88 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc37d_dither() local
92 if ((ret = PUSH_WAIT(push, 2))) in headc37d_dither()
95 PUSH_MTHD(push, NVC37D, HEAD_SET_DITHER_CONTROL(i), in headc37d_dither()
107 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc37d_curs_clr() local
[all …]
H A Dhead907d.c39 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head907d_or() local
43 if ((ret = PUSH_WAIT(push, 3))) in head907d_or()
46 PUSH_MTHD(push, NV907D, HEAD_SET_CONTROL_OUTPUT_RESOURCE(i), in head907d_or()
60 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head907d_procamp() local
64 if ((ret = PUSH_WAIT(push, 2))) in head907d_procamp()
67 PUSH_MTHD(push, NV907D, HEAD_SET_PROCAMP(i), in head907d_procamp()
80 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head907d_dither() local
84 if ((ret = PUSH_WAIT(push, 2))) in head907d_dither()
87 PUSH_MTHD(push, NV907D, HEAD_SET_DITHER_CONTROL(i), in head907d_dither()
98 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head907d_ovly() local
[all …]
H A Dbase507c.c38 struct nvif_push *push = &wndw->wndw.push; in base507c_update() local
41 if ((ret = PUSH_WAIT(push, 2))) in base507c_update()
44 PUSH_MTHD(push, NV507C, UPDATE, interlock[NV50_DISP_INTERLOCK_CORE]); in base507c_update()
45 return PUSH_KICK(push); in base507c_update()
51 struct nvif_push *push = &wndw->wndw.push; in base507c_image_clr() local
54 if ((ret = PUSH_WAIT(push, 4))) in base507c_image_clr()
57 PUSH_MTHD(push, NV507C, SET_PRESENT_CONTROL, in base507c_image_clr()
61 PUSH_MTHD(push, NV507C, SET_CONTEXT_DMA_ISO, 0x00000000); in base507c_image_clr()
68 struct nvif_push *push = &wndw->wndw.push; in base507c_image_set() local
71 if ((ret = PUSH_WAIT(push, 13))) in base507c_image_set()
[all …]
H A Dhead507d.c32 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head507d_procamp() local
36 if ((ret = PUSH_WAIT(push, 2))) in head507d_procamp()
39 PUSH_MTHD(push, NV507D, HEAD_SET_PROCAMP(i), in head507d_procamp()
51 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head507d_dither() local
55 if ((ret = PUSH_WAIT(push, 2))) in head507d_dither()
58 PUSH_MTHD(push, NV507D, HEAD_SET_DITHER_CONTROL(i), in head507d_dither()
69 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head507d_ovly() local
87 if ((ret = PUSH_WAIT(push, 2))) in head507d_ovly()
90 PUSH_MTHD(push, NV507D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS(i), bounds); in head507d_ovly()
97 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head507d_base() local
[all …]
H A Dhead827d.c32 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head827d_curs_clr() local
36 if ((ret = PUSH_WAIT(push, 4))) in head827d_curs_clr()
39 PUSH_MTHD(push, NV827D, HEAD_SET_CONTROL_CURSOR(i), in head827d_curs_clr()
44 PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_CURSOR(i), 0x00000000); in head827d_curs_clr()
51 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head827d_curs_set() local
55 if ((ret = PUSH_WAIT(push, 5))) in head827d_curs_set()
58 PUSH_MTHD(push, NV827D, HEAD_SET_CONTROL_CURSOR(i), in head827d_curs_set()
69 PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_CURSOR(i), asyh->curs.handle); in head827d_curs_set()
76 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head827d_core_set() local
80 if ((ret = PUSH_WAIT(push, 9))) in head827d_core_set()
[all …]
H A Dbase907c.c31 struct nvif_push *push = &wndw->wndw.push; in base907c_image_set() local
34 if ((ret = PUSH_WAIT(push, 10))) in base907c_image_set()
37 PUSH_MTHD(push, NV907C, SET_PRESENT_CONTROL, in base907c_image_set()
42 PUSH_MTHD(push, NV907C, SET_CONTEXT_DMAS_ISO(0), asyw->image.handle, 1); in base907c_image_set()
44 PUSH_MTHD(push, NV907C, SURFACE_SET_OFFSET(0, 0), asyw->image.offset[0] >> 8, in base907c_image_set()
68 struct nvif_push *push = &wndw->wndw.push; in base907c_xlut_clr() local
71 if ((ret = PUSH_WAIT(push, 6))) in base907c_xlut_clr()
74 PUSH_MTHD(push, NV907C, SET_BASE_LUT_LO, in base907c_xlut_clr()
77 PUSH_MTHD(push, NV907C, SET_OUTPUT_LUT_LO, in base907c_xlut_clr()
80 PUSH_MTHD(push, NV907C, SET_CONTEXT_DMA_LUT, 0x00000000); in base907c_xlut_clr()
[all …]
H A Dheadc57d.c33 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_display_id() local
36 if ((ret = PUSH_WAIT(push, 2))) in headc57d_display_id()
39 PUSH_NVSQ(push, NVC57D, 0x2020 + (head->base.index * 0x400), display_id); in headc57d_display_id()
46 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_or() local
65 if ((ret = PUSH_WAIT(push, 2))) in headc57d_or()
68 PUSH_MTHD(push, NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE(i), in headc57d_or()
81 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_procamp() local
85 if ((ret = PUSH_WAIT(push, 2))) in headc57d_procamp()
89 PUSH_MTHD(push, NVC57D, HEAD_SET_PROCAMP(i), in headc57d_procamp()
99 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in headc57d_olut_clr() local
[all …]
H A Dcore507d.c36 struct nvif_push *push = &core->chan.push; in core507d_update() local
39 if ((ret = PUSH_WAIT(push, (ntfy ? 2 : 0) + 3))) in core507d_update()
43 PUSH_MTHD(push, NV507D, SET_NOTIFIER_CONTROL, in core507d_update()
49 PUSH_MTHD(push, NV507D, UPDATE, interlock[NV50_DISP_INTERLOCK_BASE] | in core507d_update()
58 return PUSH_KICK(push); in core507d_update()
83 struct nvif_push *push = &disp->core->chan.push; in core507d_read_caps() local
86 ret = PUSH_WAIT(push, 6); in core507d_read_caps()
90 PUSH_MTHD(push, NV507D, SET_NOTIFIER_CONTROL, in core507d_read_caps()
95 PUSH_MTHD(push, NV507D, GET_CAPABILITIES, 0x00000000); in core507d_read_caps()
97 PUSH_MTHD(push, NV507D, SET_NOTIFIER_CONTROL, in core507d_read_caps()
[all …]
H A Dwndwc57e.c35 struct nvif_push *push = &wndw->wndw.push; in wndwc57e_image_set() local
38 if ((ret = PUSH_WAIT(push, 17))) in wndwc57e_image_set()
41 PUSH_MTHD(push, NVC57E, SET_PRESENT_CONTROL, in wndwc57e_image_set()
46 PUSH_MTHD(push, NVC57E, SET_SIZE, in wndwc57e_image_set()
64 PUSH_MTHD(push, NVC57E, SET_CONTEXT_DMA_ISO(0), asyw->image.handle, 1); in wndwc57e_image_set()
65 PUSH_MTHD(push, NVC57E, SET_OFFSET(0), asyw->image.offset[0] >> 8); in wndwc57e_image_set()
67 PUSH_MTHD(push, NVC57E, SET_POINT_IN(0), in wndwc57e_image_set()
71 PUSH_MTHD(push, NVC57E, SET_SIZE_IN, in wndwc57e_image_set()
75 PUSH_MTHD(push, NVC57E, SET_SIZE_OUT, in wndwc57e_image_set()
84 struct nvif_push *push = &wndw->wndw.push; in wndwc57e_csc_clr() local
[all …]
H A Dcorec37d.c36 struct nvif_push *push = &core->chan.push; in corec37d_wndw_owner() local
40 if ((ret = PUSH_WAIT(push, windows * 2))) in corec37d_wndw_owner()
44 PUSH_MTHD(push, NVC37D, WINDOW_SET_CONTROL(i), in corec37d_wndw_owner()
54 struct nvif_push *push = &core->chan.push; in corec37d_update() local
57 if ((ret = PUSH_WAIT(push, (ntfy ? 2 * 2 : 0) + 5))) in corec37d_update()
61 PUSH_MTHD(push, NVC37D, SET_NOTIFIER_CONTROL, in corec37d_update()
67 PUSH_MTHD(push, NVC37D, SET_INTERLOCK_FLAGS, interlock[NV50_DISP_INTERLOCK_CURS], in corec37d_update()
69 PUSH_MTHD(push, NVC37D, UPDATE, 0x00000001 | in corec37d_update()
74 PUSH_MTHD(push, NVC37D, SET_NOTIFIER_CONTROL, in corec37d_update()
78 return PUSH_KICK(push); in corec37d_update()
[all …]
H A Dhead917d.c25 #include "nvif/push.h"
33 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head917d_dither() local
37 if ((ret = PUSH_WAIT(push, 2))) in head917d_dither()
40 PUSH_MTHD(push, NV917D, HEAD_SET_DITHER_CONTROL(i), in head917d_dither()
51 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head917d_base() local
70 if ((ret = PUSH_WAIT(push, 2))) in head917d_base()
73 PUSH_MTHD(push, NV917D, HEAD_SET_BASE_CHANNEL_USAGE_BOUNDS(i), bounds); in head917d_base()
80 struct nvif_push *push = &nv50_disp(head->base.base.dev)->core->chan.push; in head917d_curs_set() local
84 ret = PUSH_WAIT(push, 5); in head917d_curs_set()
88 PUSH_MTHD(push, NV917D, HEAD_SET_CONTROL_CURSOR(i), in head917d_curs_set()
[all …]
/linux/tools/testing/selftests/kvm/lib/x86_64/
H A Dhandlers.S2 push %r15
3 push %r14
4 push %r13
5 push %r12
6 push %r11
7 push %r10
8 push %r9
9 push %r8
11 push %rdi
12 push %rsi
[all …]
/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_chan.c39 MODULE_PARM_DESC(vram_pushbuf, "Create DMA push buffers in VRAM");
106 nvif_object_dtor(&chan->push.ctxdma); in nouveau_channel_del()
107 nouveau_vma_del(&chan->push.vma); in nouveau_channel_del()
108 nouveau_bo_unmap(chan->push.buffer); in nouveau_channel_del()
109 if (chan->push.buffer && chan->push.buffer->bo.pin_count) in nouveau_channel_del()
110 nouveau_bo_unpin(chan->push.buffer); in nouveau_channel_del()
111 nouveau_bo_fini(chan->push.buffer); in nouveau_channel_del()
118 nouveau_channel_kick(struct nvif_push *push) in nouveau_channel_kick() argument
120 struct nouveau_channel *chan = container_of(push, typeof(*chan), chan.push); in nouveau_channel_kick()
121 chan->dma.cur = chan->dma.cur + (chan->chan.push.cur - chan->chan.push.bgn); in nouveau_channel_kick()
[all …]
H A Dnouveau_bo5039.c43 struct nvif_push *push = &chan->chan.push; in nv50_bo_move_m2mf() local
54 ret = PUSH_WAIT(push, 18 + 6 * (src_tiled + dst_tiled)); in nv50_bo_move_m2mf()
63 PUSH_MTHD(push, NV5039, SET_SRC_MEMORY_LAYOUT, in nv50_bo_move_m2mf()
80 PUSH_MTHD(push, NV5039, SET_SRC_MEMORY_LAYOUT, in nv50_bo_move_m2mf()
85 PUSH_MTHD(push, NV5039, SET_DST_MEMORY_LAYOUT, in nv50_bo_move_m2mf()
102 PUSH_MTHD(push, NV5039, SET_DST_MEMORY_LAYOUT, in nv50_bo_move_m2mf()
106 PUSH_MTHD(push, NV5039, OFFSET_IN_UPPER, in nv50_bo_move_m2mf()
112 PUSH_MTHD(push, NV5039, OFFSET_IN, lower_32_bits(src_offset), in nv50_bo_move_m2mf()
126 PUSH_MTHD(push, NV5039, NO_OPERATION, 0x00000000); in nv50_bo_move_m2mf()
139 struct nvif_push *push = &chan->chan.push; in nv50_bo_move_init() local
[all …]
H A Dnouveau_exec.c74 * To execute a push buffer the UAPI provides the DRM_NOUVEAU_EXEC ioctl. EXEC
134 ret = nouveau_dma_wait(chan, exec_job->push.count + 1, 16); in nouveau_exec_job_run()
140 for (i = 0; i < exec_job->push.count; i++) { in nouveau_exec_job_run()
141 struct drm_nouveau_exec_push *p = &exec_job->push.s[i]; in nouveau_exec_job_run()
172 kfree(exec_job->push.s); in nouveau_exec_job_free()
207 for (i = 0; i < __args->push.count; i++) { in nouveau_exec_job_init()
208 struct drm_nouveau_exec_push *p = &__args->push.s[i]; in nouveau_exec_job_init()
222 job->push.count = __args->push.count; in nouveau_exec_job_init()
223 if (__args->push.count) { in nouveau_exec_job_init()
224 job->push.s = kmemdup(__args->push.s, in nouveau_exec_job_init()
[all …]
H A Dnouveau_bo0039.c50 struct nvif_push *push = &chan->chan.push; in nv04_bo_move_m2mf() local
58 ret = PUSH_WAIT(push, 3); in nv04_bo_move_m2mf()
62 PUSH_MTHD(push, NV039, SET_CONTEXT_DMA_BUFFER_IN, src_ctxdma, in nv04_bo_move_m2mf()
69 ret = PUSH_WAIT(push, 11); in nv04_bo_move_m2mf()
73 PUSH_MTHD(push, NV039, OFFSET_IN, src_offset, in nv04_bo_move_m2mf()
86 PUSH_MTHD(push, NV039, NO_OPERATION, 0x00000000); in nv04_bo_move_m2mf()
99 struct nvif_push *push = &chan->chan.push; in nv04_bo_move_init() local
102 ret = PUSH_WAIT(push, 4); in nv04_bo_move_init()
106 PUSH_MTHD(push, NV039, SET_OBJECT, handle); in nv04_bo_move_init()
107 PUSH_MTHD(push, NV039, SET_CONTEXT_DMA_NOTIFIES, chan->cli->drm->ntfy.handle); in nv04_bo_move_init()
/linux/tools/testing/selftests/tc-testing/tc-tests/actions/
H A Dvlan.json295 "name": "Add vlan push action with invalid protocol type",
311 "cmdUnderTest": "$TC actions add action vlan push protocol ABCD",
314 "matchPattern": "action order [0-9]+: vlan.*push",
320 "name": "Add vlan push action with default protocol and priority",
336 "cmdUnderTest": "$TC actions add action vlan push id 123 index 18",
339 …"matchPattern": "action order [0-9]+: vlan.*push id 123 protocol 802.1Q priority 0 pipe.*index 18 …
347 "name": "Add vlan push action with protocol 802.1Q and priority 3",
363 …"cmdUnderTest": "$TC actions add action vlan push id 77 protocol 802.1Q priority 3 continue index …
366 …"matchPattern": "action order [0-9]+: vlan.*push id 77 protocol 802.1Q priority 3 continue.*index …
374 "name": "Add vlan push action with protocol 802.1AD",
[all …]
/linux/arch/arc/include/asm/
H A Dentry-compact.h49 push r9
58 push r0
59 push r1
60 push r2
61 push r3
62 push r4
63 push r5
64 push r6
65 push r7
66 push r8
[all …]
/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm730-gsj-gpio.dtsi9 drive-push-pull;
14 drive-push-pull;
19 drive-push-pull;
24 drive-push-pull;
29 drive-push-pull;
34 drive-push-pull;
39 drive-push-pull;
44 drive-push-pull;
59 drive-push-pull;
64 drive-push-pull;
[all …]
/linux/arch/x86/kvm/vmx/
H A Dvmenter.S40 push %_ASM_BP
49 push $__KERNEL_DS
50 push %rbp
53 push $__KERNEL_CS
80 push %_ASM_BP
83 push %r15
84 push %r14
85 push %r13
86 push %r12
88 push %edi
[all …]
/linux/arch/mips/include/asm/
H A Dasmmacro.h85 .set push
109 .set push
144 .set push
168 .set push
250 .set push
259 .set push
268 .set push
277 .set push
286 .set push
295 .set push
[all …]
/linux/arch/x86/entry/
H A Dentry_64_fred.S61 push %rbp
79 * Start to push a FRED stack frame, which is always 64 bytes:
94 push $0 /* Reserved, must be 0 */
95 push $0 /* Event data, 0 for IRQ/NMI */
96 push %rdi /* fred_ss handed in by the caller */
97 push %rbp
100 push %rax
105 * used here to push the return RIP, otherwise there is no chance to
106 * push an error code before invoking the IRQ/NMI handler.
108 * Use LEA to get the return RIP and push it, then push an error code.
[all …]

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